1

Digital Verification Engineer Jobs (NOW HIRING)

The Role We're searching for an ASIC Digital Verification Manager to lead and deliver functional ... As both a leader and technical authority, you will mentor engineers, set a high bar for ...

As a Wireless Radio Verification Engineer, you'll ensure first-time-right silicon success through ... This role emphasizes digital verification while bridging to RF/analog domains-you'll work closely ...

As a Wireless Radio Verification Engineer, you'll ensure first-time-right silicon success through ... This role emphasizes digital verification while bridging to RF/analog domains-you'll work closely ...

Design Verification Engineer

Waltham, MA · On-site

$146K - $179K/yr

Preferred Qualifications Skilled in many aspects of digital verification such as constrained random ... programming skills with knowledge of data structures and algorithms Experience with Python, Perl ...

Digital Design Engineer

San Diego, CA · On-site

$190K - $240K/yr

Verify the digital system and blocks in collaboration with the digital verification engineer. * Develop low-power audio signal processing architectures. Qualifications, Education, and Experience ...

next page

Showing results 1-20

Digital Verification Engineer information

See salary details

$105.5K

$149.2K

$167K

How much do digital verification engineer jobs pay per year?

As of Jul 12, 2026, the average yearly pay for digital verification engineer in the United States is $149,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $166,000.00 per year, depending on experience, location, and employer.

What is a Digital Verification Engineer job?

A Digital Verification Engineer is responsible for ensuring the correctness of digital designs before manufacturing. They develop and implement testbenches using hardware description languages like SystemVerilog and methodologies like UVM. Their role involves writing test cases, debugging failures, and improving verification efficiency. The goal is to identify design issues early in the development cycle, reducing costly revisions.

What does a digital verification engineer do?

A digital verification engineer designs and develops test environments to ensure digital hardware and integrated circuits function correctly. They create test plans, write simulation testbenches using hardware description languages like VHDL or Verilog, and analyze simulation results to identify and fix design issues. Proficiency with verification tools and scripting languages is essential for this role.

What are the key skills and qualifications needed to thrive in the Digital Verification Engineer position, and why are they important?

To thrive as a Digital Verification Engineer, you need a solid background in digital design, computer engineering, and experience with verification methodologies, often supported by a Bachelor’s or Master’s degree in a related field. Proficiency with hardware description languages (such as Verilog, VHDL), simulation tools (like ModelSim, Questa), scripting languages (Python, Perl), and familiarity with standard verification methodologies (UVM, SystemVerilog) are typically required. Attention to detail, strong analytical thinking, and effective communication skills are crucial soft skills for collaborating with design teams and troubleshooting complex systems. These abilities ensure accurate verification outcomes, minimize design errors, and facilitate seamless teamwork in fast-paced semiconductor environments.

What engineers make $300,000 a year?

Senior engineers in specialized fields such as software engineering, electrical engineering, and systems engineering can earn $300,000 or more annually, especially with extensive experience, advanced skills, and working in high-demand industries like technology, finance, or aerospace. Roles often require advanced degrees, certifications, and leadership responsibilities.

Are verification engineers in demand?

Verification engineers are in high demand due to the increasing complexity of digital systems and the need for thorough testing to ensure reliability. Skills in hardware description languages like VHDL or Verilog, along with experience in simulation tools, enhance job prospects in this field.

What are some common daily responsibilities for a Digital Verification Engineer?

As a Digital Verification Engineer, your daily tasks typically include developing and maintaining testbenches, writing and executing test cases, and analyzing simulation results to identify potential design issues. You’ll work closely with design engineers to review specifications and debug hardware or firmware discrepancies, ensuring that the digital designs meet all functional and timing requirements. Collaborating within cross-functional teams and participating in regular code reviews are also standard parts of the workflow. This hands-on and collaborative environment helps accelerate product development and ensures high-quality deliverables.

What engineer makes $500,000 a year?

Highly experienced digital verification engineers working in senior or lead roles at large technology companies can earn salaries approaching or exceeding $500,000 annually, especially with bonuses and stock options. These roles typically require advanced skills in hardware design, verification tools, and extensive industry experience. Compensation varies based on location, company size, and individual expertise.
What cities are hiring for Digital Verification Engineer jobs? Cities with the most Digital Verification Engineer job openings:
What are the most commonly searched types of Digital Verification Engineer jobs? The most popular types of Digital Verification Engineer jobs are:
What states have the most Digital Verification Engineer jobs? States with the most job openings for Digital Verification Engineer jobs include:
Infographic showing various Digital Verification Engineer job openings in the United States as of July 2026, with employment types broken down into 87% Full Time, 11% Part Time, and 2% Contract. Highlights an 90% Physical, 2% Hybrid, and 8% Remote job distribution, with an average salary of $149,150 per year, or $71.7 per hour.
Senior Digital & Mixed-Signal Verification Engineer

Senior Digital & Mixed-Signal Verification Engineer

Mythic

Palo Alto, CA • Hybrid

$125K - $250K/yr

Full-time

Re-posted 15 days ago


Job description

About Us:
Mythic's platform delivers the power of desktop GPU in a single low-power chip, supporting inference for large deep neural networks. Mythic's technology is based upon an entirely new hybrid digital/analog flash calculation using non-volatile memory arrays which has been under development since 2012.  This step change in performance enables a range of new applications in many markets, including safety and security, autonomous vehicles, VR/AR, robotics, and media.  Mythic's AI hardware combines knowledge across many domains, including AI, compilers, computer architecture, analog circuits, and non-volatile memories. Mythic will enable the future of AI by building analog-compute hardware platforms that are 100-1000x more efficient than conventional all-digital systems
 
About the role:
We are looking for an experienced digital and mixed-signal verification engineer who excels working in large complex systems with and enjoys utilizing a broad set of skills. This person will do everything from RNM creation to verifying top-level algorithms, all while ensuring interfaces, specifications, and features are clear between multiple teams. This role is largely responsible for ensuring Mythic's analog compute core can be accurately and thoroughly verified by the digital and mixed-signal verification flow, and is expected to contribute to methodology.
Required experience includes:
  • Significant experience with verification of RNMs in mixed-signal / SoC verification
  • Extensive digital verification background 
  • UVM expertise
  • Verification (and ownership a plus) of RTL for mixed-signal controllers and FSMs (for Data Converters, PLLs, Power Converters, etc.)
  • Experience tracking and communicating mixed-signal interface requirements/specifications
  • Ability to work cross-functional teams with humility
  • Excellent communication skills, especially resolving ambiguity
Bonus attributes:
  • Project leadership experience
  • Experience in Virtuoso 
  • Cadence tool setup and infrastructure knowledge (reasonable ability to debug)
  • Strength in linux (reasonable ability to debug)
$125,000 - $250,000 a year
Salary will be dependent upon candidate experience and location
apply for this job