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Pcie Verification Engineer Jobs (NOW HIRING)

Insilico

Design Verification Engineer

Irvine, CA · On-site

$146K - $178K/yr

Job Title: Design Verification Engineer Location: Santa Clara, CA Duration: 06 months (High ... PCIE verification background 2. 400G MAC verification background Qualifications Additional ...

Insilico

Design Verification Engineer

Irvine, CA · On-site

$146K - $178K/yr

... PCIE verification background 2. 400G MAC verification background Additional Information All your information will be kept confidential according to EEO guidelines.

R3 Tek

Verification Engineer

San Francisco, CA · On-site

$160K/yr

Verification Engineer Location: San Francisco Bay Area, CA Employment Type: Contract Required ... in PCIe Gen3, Gen4 protocols is necessary 2) Expertise in SPI, JTAG, and Transceiver PHY is ...

Apply Early

ARM

Staff Verification Engineer

Austin, TX · Hybrid

$191K - $258K/yr

Arm's Solutions Engineering team is looking for experienced PCIe and CXL experts in verifying and ... New team members will join hands with other Architects, RTL design and verification engineers ...

R3 Tek

Verification Engineer

San Francisco, CA · On-site

$160K/yr

Verification Engineer Location: San Francisco Bay Area, CA Employment Type: Contract /Contract to ... in PCIe Gen3, Gen4 protocols is necessary 2) Expertise in SPI, JTAG , and Transceiver PHY is ...

Apply Early

ARM

Staff Verification Engineer

Austin, TX · On-site

$191K - $258K/yr

Arm's Solutions Engineering team is looking for experienced PCIe and CXL experts in verifying and ... New team members will join hands with other Architects, RTL design and verification engineers ...

7Rays Semiconductors

Design Verification Engineer

San Jose, CA · On-site

$159K - $194K/yr

We are seeking a highly motivated Design Verification Engineer to join our Interface IP DV team ... PCIe * Ethernet * CPU subsystems (ARC/ARM) * Low-power peripherals * Sensors * Understand vendor IP ...

Embtel Inc

Verification Engineer (Remote)

Campbell, CA · On-site

$157K/yr

Staff Verification Engineer Office Located in Campbell, CA ( 100 % remote considered) Duration ... Ethernet, PCIe, DDR is mandatory. Expertise in formal verification flows and techniques. Strong ...

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JS Consulting

Senior Verification Engineer

New York, NY · On-site

$114K - $157K/yr

Job Title- Senior Verification Engineer Project Location - On-site 5 days Lake Ronkonkoma NY (Long ... Validate high-speed interfaces and protocols including PCIe, 1G/10G Ethernet, and TSN. * Support DO ...

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Cornelis Networks

PCIe ASIC Design Engineer

Austin, TX · On-site +1

Collaborate with IP vendors, architecture, verification, physical design, and software teams to ... Provide mentorship to junior engineers and help define PCIe subsystem development best practices.

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All JobsPcie Verification Engineer Jobs

Pcie Verification Engineer information

See salary details

$80K

$142.6K

$203.5K

How much do pcie verification engineer jobs pay per year?

As of Jul 5, 2026, the average yearly pay for pcie verification engineer in the United States is $142,619.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.

What does a PCIe Verification Engineer do?

A PCIe Verification Engineer is responsible for ensuring that PCI Express (PCIe) hardware and systems function correctly and comply with industry standards. They develop and execute test plans, create verification environments, and use simulation tools to find and resolve design issues. Their work is crucial for validating the performance, reliability, and interoperability of PCIe-based products such as computer motherboards, servers, and storage devices. This role typically requires a strong background in digital design, hardware description languages (HDL), and PCIe protocol knowledge.

What are the key skills and qualifications needed to thrive as a PCIe Verification Engineer, and why are they important?

To thrive as a PCIe Verification Engineer, you need a strong background in digital design, computer architecture, and verification methodologies, typically backed by a degree in electrical or computer engineering. Proficiency with hardware description languages (HDL) like Verilog/SystemVerilog, UVM methodology, simulation tools, and familiarity with PCIe protocol analyzers is essential. Analytical thinking, attention to detail, and effective communication are crucial soft skills for debugging complex issues and collaborating with cross-functional teams. These competencies ensure reliable product validation, compliance with industry standards, and efficient project delivery in high-speed interface development.

What are some common challenges faced by PCIe Verification Engineers during the verification process?

PCIe Verification Engineers often encounter challenges such as handling the complexity of the PCIe protocol, ensuring compliance with evolving standards, and debugging intricate issues that arise during simulation. The verification process may involve working with large-scale testbenches, managing interoperability testing with different vendors’ devices, and identifying corner-case bugs. Collaboration with both design and software teams is crucial to resolve issues effectively and ensure robust system-level functionality.

What is the difference between Pcie Verification Engineer vs Hardware Verification Engineer?

AspectPcie Verification EngineerHardware Verification Engineer
Required CredentialsBachelor's in Electrical Engineering or Computer Engineering; knowledge of PCIe protocolsBachelor's in Electrical Engineering or Computer Engineering; knowledge of hardware protocols
Work EnvironmentDesign teams, FPGA/ASIC verification labsHardware design and testing labs, FPGA/ASIC environments
Industry UsageSemiconductor, computer hardware, embedded systemsSemiconductor, consumer electronics, aerospace
Common Search/ComparisonYesYes

The Pcie Verification Engineer focuses specifically on verifying PCIe interfaces and protocols within hardware designs, while the Hardware Verification Engineer has a broader scope, testing various hardware components and systems. Both roles require similar technical skills and often work in overlapping environments, but their focus areas differ significantly.

More about Pcie Verification Engineer jobs
What cities are hiring for Pcie Verification Engineer jobs? Cities with the most Pcie Verification Engineer job openings:
What states have the most Pcie Verification Engineer jobs? States with the most job openings for Pcie Verification Engineer jobs include:
What job categories do people searching Pcie Verification Engineer jobs look for? The top searched job categories for Pcie Verification Engineer jobs are:
Pcie Verification Engineer jobs near you
Infographic showing various Pcie Verification Engineer job openings in the United States as of June 2026, with employment types broken down into 8% Full Time, and 92% Part Time. Highlights an 92% Physical, 5% Hybrid, and 3% Remote job distribution, with an average salary of $142,619 per year, or $68.6 per hour.

Design Verification Engineer

Insilico

Irvine, CA • On-site

$146K - $178K/yr

Contractor

Posted 13 days ago

Job description

Company Description
Insilico is an End-to-End specialized VLSI, Embedded Design & Software services and solutions company. It operates in the "Compute" & "Connectivity" space.
Insilico is founded by industry veterans, who are strong leaders and practitioners with diverse experience in all the relevant aspects of technology and execution. The management and its entire team, handpicked from among the best talents in the industry, can adapt to the evolving technologies and growing market challenges internationally. Insilico has very flexible business models to suit a plethora of client needs.
With a current clientele of top semiconductor companies, Insilico has a wide and diversified spectrum of service offerings in expansive domains within the ambit of Embedded Design & Software, and in almost all areas of VLSI design, from Spec-to-Silicon, on a wide range of ASICs & CPUs/GPUs in all the latest technologies, including 7nm.
Being an integral part of a larger business eco-system, Insilico has the foundation of strong financials, validated processes, robust infrastructure and a global network of reputable clientele.
Insilico's service portfolio caters to products that empower the world of Communication, Networking, CPU/Servers, Automobile, Bio-Medicals, Consumer Electronics and a wide range of IOTs.
Headquartered in the US, it has operations in India & APAC.
Job Description
Job Title: Design Verification Engineer
Location: Santa Clara, CA
Duration: 06 months (High Possibility of an extension)
Job Description:
Senior DV engineer responsible for defining and implementing verification methodology and verifying in any of the following key areas of our next generation ASIC:
1. PCIE verification background
2. 400G MAC verification background
Qualifications
Additional Information
All your information will be kept confidential according to EEO guidelines.

Apply