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Design Verification Engineer Jobs (NOW HIRING)

Apple

Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

Description As a Design Verification Engineer, you'll be at the center of our silicon design group's verification efforts, ensuring the quality and reliability of next-generation cellular systems.

Mythic

Design Verification Engineer

Palo Alto, CA

$120K - $225K/yr

We're hiring experienced Design Verification Engineers from junior to senior levels to play a key role in developing and verifying the designs that will bring our next-generation AI processors to ...

INA Solution Inc

Design Verification Engineer

San Diego, CA · Remote

$139K - $169K/yr

Design Verification Engineer Location: Remote anywhere in the USA and Canada Duration: Full-time We are looking for humble geniuses, who believe that engineering has the potential to make the ...

Purple Hires Inc

Design Verification Engineer

Plano, TX · On-site

$130K - $158K/yr

and other details - We are seeking an ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define ...

indie

Design Verification Engineer

Aliso Viejo, CA · On-site

$145K - $177K/yr

As a Design Verification Engineer, you will be responsible for developing and executing comprehensive verification strategies for next-generation automotive camera video and vision processors. You ...

Apple

Design Verification Engineer

Austin, TX

$175K - $308K/yr

Description As a Design Verification Engineer, you'll be at the center of our silicon design group's verification efforts, ensuring the quality and reliability of next-generation cellular systems.

Apple

Design Verification Engineer

Austin, TX

$122K - $214K/yr

Description As a Design Verification Engineer, you'll be at the center of our silicon design group's verification efforts, ensuring the quality and reliability of next-generation cellular systems.

Qualcomm

GSoC Design Verification Engineer

San Diego, CA · On-site

$144K - $176K/yr

As part of the Global SoC organization, our ASIC Design Verification Engineers bring deep expertise in CPUs, memory systems, High Bandwidth Compute (HBC), AI inference acceleration, and ASIC design ...

Insilico

Design Verification Engineer

Irvine, CA · On-site

$146K - $178K/yr

Design Verification Engineer Location: Santa Clara, CA Duration: 06 months (High Possibility of an extension) Senior DV engineer responsible for defining and implementing verification methodology and ...

Apple

Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple's premier SOCs. This is a critical job within Apple's Hardware Technology and we'd love ...

Apple

Design Verification Engineer

Austin, TX

$122K - $214K/yr

Description As a Design Verification Engineer, you'll be at the center of our silicon design group's verification efforts, ensuring the quality and reliability of next-generation cellular systems.

Insilico

Design Verification Engineer

Irvine, CA · On-site

$146K - $178K/yr

Design Verification Engineer Location: Santa Clara, CA Duration: 06 months (High Possibility of an extension) Senior DV engineer responsible for defining and implementing verification methodology and ...

Apple

Design Verification Engineer

Austin, TX

$175K - $308K/yr

Description As a Design Verification Engineer, you'll be at the center of our silicon design group's verification efforts, ensuring the quality and reliability of next-generation cellular systems.

Broadcom

Design Verification Engineer

Fort Collins, CO · On-site

$134K - $164K/yr

Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the design of complex custom ASICs and embedded IP, is looking for an experienced verification engineer ...

Apple

Design Verification Engineer

Austin, TX

$175K - $308K/yr

Description As a Design Verification Engineer, you'll be at the center of our silicon design group's verification efforts, ensuring the quality and reliability of next-generation cellular systems.

Epitec

Design Verification Engineer III

Sunnyvale, CA · On-site

$159K - $194K/yr

Design Verification Engineer III Contract Duration: 6 months, possible extension Location: Sunnyvale, CA Work Arrangement: Hybrid (3 days onsite) Summary Design Verification Engineer for wearables ...

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Design Verification Engineer information

See salary details

$105.5K

$149.2K

$167K

How much do design verification engineer jobs pay per year?

As of Aug 19, 2026, the average yearly pay for design verification engineer in the United States is $149,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $166,000.00 per year, depending on experience, location, and employer.

What is a design verification engineer?

A Design Verification Engineer ensures that hardware designs function correctly by developing and executing test plans, writing verification code (often in SystemVerilog with UVM), and debugging design issues. They work closely with design and validation teams to confirm specifications are met before manufacturing. Their role is critical in preventing costly design flaws and ensuring high-quality semiconductor products.

What skills and qualifications are needed to be a design verification engineer?

Design Verification Engineers require a solid background in digital design concepts, computer engineering, and electrical engineering, usually supported by a relevant bachelor’s or master’s degree. Expertise with hardware description languages like Verilog or VHDL, simulation tools, and familiarity with Unix/Linux environments are typical technical requirements, with certifications in FPGA/ASIC design considered advantageous. Strong analytical thinking, problem-solving skills, teamwork, and effective communication help these engineers collaborate closely with design, validation, and development teams. These competencies are vital to ensuring design correctness, catching flaws early, and driving efficient, reliable hardware development.

What are the most common challenges faced by design verification engineers in their daily work?

Design Verification Engineers often face the challenge of thoroughly validating complex digital designs within tight project deadlines. Debugging intricate issues, dealing with evolving specifications, and ensuring complete coverage during simulation can require a great deal of attention to detail and persistence. Collaboration with designers, validation teams, and often cross-functional groups is critical to resolving ambiguities and preventing errors from reaching production. Adapting to new verification methodologies or tools is also common as technologies and standards advance. These challenges offer valuable learning opportunities and play a crucial role in producing robust, high-quality hardware products.

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Design Verification Engineer jobs near you
Infographic showing various Design Verification Engineer job openings in the United States as of August 2026, with employment types broken down into 89% Full Time, 7% Part Time, and 4% Contract. Highlights an 83% Physical, 5% Hybrid, and 12% Remote job distribution, with an average salary of $149,150 per year, or $71.7 per hour.

Design Verification Engineer

Apple

Austin, TX • On-site

$134K - $164K/yr

Full-time

Re-posted 7 days ago

Apple rating

8.0

Company rating: 8.0 out of 10

Based on 677 frontline employees who took The Breakroom Quiz

7th of 30 rated technology retailers

Job description

Apple is where individual imaginations gather together, committing to the values that lead to great work. Every new product we build, service we create, or Apple Store experience we deliver is the result of us making each other's ideas stronger. That happens because every one of us shares a belief that we can make something wonderful and share it with the world, changing lives for the better. It's the diversity of our people and their thinking that inspires the innovation that runs through everything we do. When we bring everybody in, we can do the best work of our lives. Here, you'll do more than join something - you'll add something.
Do you have a passion for innovation and technical excellence? Do you thrive on solving complex problems that push the boundaries of what's possible? Join our team to verify innovative, high-throughput cellular baseband modems and transceiver link controllers that power communication for millions of users worldwide.
Description
As a Design Verification Engineer, you'll be at the center of our silicon design group's verification efforts, ensuring the quality and reliability of next-generation cellular systems. Working on innovative baseband modems and RF link controllers for Apple's SOCs, you'll craft highly reusable UVM verification environments that set the standard for quality and efficiency. You'll develop comprehensive coverage-driven and directed test cases that thoroughly validate complex IP and subsystem designs, working closely with multi-functional teams throughout the process.
In this role, you'll drive methodology innovation by deploying sophisticated tools and techniques that elevate verification practices and ensure tape-out readiness. Collaborating with product development teams across Apple, you'll help deliver cellular systems that redefine industry capabilities and enhance customer experiences globally. This position offers exceptional opportunities to deepen your expertise across cellular protocols, complex IP and subsystem architectures, advanced fabric protocols, and sophisticated debug methodologies. You'll gain experience with best-in-class design verification practices, co-verification techniques with models and firmware, and industry-standard low-power architectures.
We're looking for engineers with hands-on ASIC design verification experience using reusable verification methodologies such as UVM. The ideal candidate excels at detailed test planning, adapts optimally to evolving requirements, knowledge of the latest ML based tools to improve productivity and is driven to achieve the highest quality standards. You thrive in collaborative environments and are eager to address the verification challenges inherent in complex, high-performance cellular systems. If you want to contribute to products that impact customers worldwide while advancing your technical expertise, we'd love to hear from you.
Minimum Qualifications
BS and a minimum of 10 years relevant industry experience.
Strong knowledge of System Verilog and UVM.
Skilled in System C, C/C++, Python/perl.
Highly proficient in developing and establishing DV Methodologies.
Experience in using LLMs and MCPs.
Experience with developing Python-based automation solutions.
Experience with constraint random testing, SVA, Coverage driven verification.
Strong test planning and problem-solving skills.
Preferred Qualifications
Master of Science degree in Electrical Engineering/Computer Science.
Experience in C/C++ modeling for design verification.
Knowledge of 4G/5G cellular physical layer operation (3GPP).
Experience with verification of embedded processor cores.
Hands-on verification experience of Bus Fabric, NOC, AHB, AXI, based bus architecture in UVM environment.
Experience using LLMs to improve efficiency and quality of verification.
Understanding of prompt engineering and LLM workflow optimization.

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About Apple

Sourced by ZipRecruiter

Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.

Industry

Computer and electronic product manufacturing

Company size

10,000+ Employees

Headquarters location

Cupertino, CA, US

Year founded

1976

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