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Formal Design Verification Engineer Jobs (NOW HIRING)

GPU Formal Design Verification Engineer

Austin, TX

$134.80K - $164.50K/yr

Experience with CPU or GPU design architectures, VLSI circuits, and digital logic design. Experience with formal verification tools, such as JasperGold, IFV, etc. Experience in programming/scripting ...

GPU Formal Design Verification Engineer

Austin, TX · On-site

$134.80K - $164.50K/yr

Experience with CPU or GPU design architectures, VLSI circuits, and digital logic design.Experience with formal verification tools, such as JasperGold, IFV, etc.Experience in programming/scripting ...

GPU Formal Design Verification Engineer

Austin, TX

$134.80K - $164.50K/yr

... Engineer will be responsible for the pre-silicon RTL verification applying formal and property ... Description In this role you will: - Work with the design team to review and enhance specifications ...

GPU Formal Design Verification Engineer

Austin, TX · On-site

$134.80K - $164.50K/yr

... formal verification reviews with design and verification teams. BS degree in Computer Science, Computer Engineering, Electrical Engineering or equivalent field.Experience in programming/scripting ...

DESIGN VERIFICATION ENGINEER

Sunnyvale, TX · On-site

$60K - $148.50K/yr

Exposure to RTL design, software development, formal verification, or other related domains. Good ... Coordinate with RTL engineers to implement logic design for better clock gating and verify the ...

Design Verification Engineer

Austin, TX

$134.80K - $164.50K/yr

Experience in other related domains such as formal verification, RTL design, or software development EDUCATION: Bachelor or Master's in Electrical Engineering, Computer Engineering, or Computer ...

Design Verification Engineer

Austin, TX

$134.80K - $164.50K/yr

Experience in other related domains such as formal verification, RTL design, or software development EDUCATION: Bachelor or Master's in Electrical Engineering, Computer Engineering, or Computer ...

DESIGN VERIFICATION ENGINEER

Sunnyvale, TX · On-site

$60K - $148.50K/yr

Exposure to RTL design, software development, formal verification, or other related domains. * Good ... Coordinate with RTL engineers to implement logic design for better clock gating and verify the ...

Design Verification Engineer

Santa Clara, CA · On-site

$159.70K - $195K/yr

We are seeking a skilled Design Verification Engineer to join our hardware engineering team. The ... Experience with SoC-level verification , assertion-based verification , or formal verification

Design Verification Engineer

San Jose, CA · On-site

$142.60K - $206.50K/yr

About the Role We are seeking a highly experienced Design Verification Engineer to join Altera ... Perform formal property verification (FPV) and equivalence checking to complement simulation-based ...

Design Verification Engineer

San Jose, CA

$159.40K - $194.60K/yr

About the Role We are seeking a highly experienced Design Verification Engineer to join Altera ... Perform formal property verification (FPV) and equivalence checking to complement simulation-based ...

Design Verification Engineer

Austin, TX · On-site

$134.80K - $164.50K/yr

Experience in other related domains such as formal verification, RTL design, or software development EDUCATION: Bachelor or Master's in Electrical Engineering, Computer Engineering, or Computer ...

Design Verification Engineer

Austin, TX · On-site

$134.80K - $164.50K/yr

Experience in other related domains such as formal verification, RTL design, or software development EDUCATION: Bachelor or Master's in Electrical Engineering, Computer Engineering, or Computer ...

Design Verification Engineer

Sunnyvale, CA

$159.60K - $194.80K/yr

Your job responsibilities as a Design Verification Engineer will help the team to verify the ... Formal Verification (Model Checking, Equivalence Checking). * Excellent communication skills in ...

Design Verification Engineer

Sunnyvale, CA · On-site

$159.60K - $194.80K/yr

Your job responsibilities as a Design Verification Engineer will help the team to verify the ... Formal Verification (Model Checking, Equivalence Checking). * Excellent communication skills in ...

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Formal Design Verification Engineer information

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$105.5K

$149.2K

$167K

How much do formal design verification engineer jobs pay per year?

As of May 31, 2026, the average yearly pay for formal design verification engineer in the United States is $149,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $166,000.00 per year, depending on experience, location, and employer.
GPU Formal Design Verification Engineer

GPU Formal Design Verification Engineer

Apple

Austin, TX

$134.80K - $164.50K/yr

Full-time

Posted 16 days ago


Apple rating

8.1

Company rating: 8.1 out of 10

Based on 661 frontline employees who took The Breakroom Quiz

6th of 30 rated technology retailers


Job description

Do you love creating elegant solutions to highly complex challenges? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC)! You’ll ensure Apple products and services can seamlessly and expertly handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices!
The Graphics Verification Engineer will be responsible for the pre-silicon RTL verification applying formal and property checking methods. This includes deep understanding of the micro-architectural details of their block and how it works within the broader GPU design.
Description
In this role you will:
- Work with the design team to review and enhance specifications.
- Develop verification plans in coordination with design leads, verification leads and micro-architects.
- Develop and drive to completion formal verification across multiple design blocks.
- Conduct formal verification reviews with design and verification teams.
- Handle deliverables and work with multi-functional teams to support product requirements.
- Create automated flows and infrastructure for formal verification.
- Work with other block and core level engineers to ensure seamless verification flow.
Preferred Qualifications
Experience with HDLs such as Verilog/System Verilog and temporal logic assertion-based languages such as SVA.
Experience in formal verification and analysis of pipelined micro-architectures, MMUs, and cache coherency control mechanisms.
Experience with abstraction techniques and formal verification technologies.
Experience in reviewing and interpreting design specifications.
Experience using academic formal verification tools.
Knowledge of constrained random verification methods.
Ability to collaborate across multiple teams.
Minimum Qualifications
BS degree in Computer Science, Computer Engineering, Electrical Engineering or equivalent field + 3 years of relevant experience.
Experience with CPU or GPU design architectures, VLSI circuits, and digital logic design.
Experience with formal verification tools, such as JasperGold, IFV, etc.
Experience in programming/scripting languages.

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About Apple

Sourced by ZipRecruiter

Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.

Industry

Computer and electronic product manufacturing

Company size

10,000+ Employees

Headquarters location

Cupertino, CA, US

Year founded

1976