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Design Verification Engineer Jobs (NOW HIRING)

Design Verification Engineer

Austin, TX · On-site

$134.80K - $164.50K/yr

Design Verification Engineer ID: 1058 Location: Austin, TX More about this job > Description Design Verification Engineer Looking for new challenges? Would you like the variety of a contract position ...

Design Verification Engineer

Austin, TX

$134.80K - $164.50K/yr

Design Verification Engineer ID: 1063 Location: Austin, TX More about this job > Description Design Verification Engineer Looking for new challenges? Would you like the variety of a contract position ...

Design Verification Engineer

Austin, TX · Hybrid

$134.80K - $164.50K/yr

Design Verification Engineer #368877 Duration: 12+ months (Possible Extension-Long Term Project) Location: San Jose, CA / Austin, TX (Hybrid-3 Days onsite) Description * As a Design Verification ...

Design verification Engineer

Allentown, PA · On-site

$134.20K - $163.80K/yr

Role- Design verification Engineer Location - Allentown, PA Duration - Full-time Visa Status - US Citizen / Green Card Description: As a design verification engineer, you will be responsible for ...

Design Verification Engineer

Austin, TX · On-site

$134.80K - $164.50K/yr

Design Verification Engineer Looking for new challenges? Would you like the variety of a contract position along with long term stability and benefits? Correct Designs can give it all to you. Correct ...

Design Verification Engineer

Sunnyvale, CA · On-site

$159.60K - $194.80K/yr

Description We are looking for an experienced design verification engineer to join our SoC team at Baidu's Sunnyvale office. The successful candidate will be a motivated self-starter who will thrive ...

Design Verification Engineer

San Jose, CA · On-site

$142.60K - $206.50K/yr

About the Role We are seeking a highly experienced Design Verification Engineer to join Altera's Design Verification organization. In this critical role, you will be responsible for verifying the ...

Design Verification Engineer

Austin, TX · On-site

$134.80K - $164.50K/yr

Design Verification Engineer Looking for new challenges? Would you like the variety of a contract position along with long term stability and benefits? Correct Designs can give it all to you. Correct ...

Design Verification Engineer

San Jose, CA

$159.40K - $194.60K/yr

About the Role We are seeking a highly experienced Design Verification Engineer to join Altera's Design Verification organization. In this critical role, you will be responsible for verifying the ...

Design Verification Engineer

Santa Clara, CA · On-site

$159.70K - $195K/yr

We are seeking a skilled Design Verification Engineer to join our hardware engineering team. The ideal candidate will be responsible for verifying complex digital designs using advanced verification ...

Design Verification Engineer

Sunnyvale, CA · On-site

$159.60K - $194.80K/yr

Description We are looking for an experienced design verification engineer to join our SoC team at Baidu's Sunnyvale office. The successful candidate will be a motivated self-starter who will thrive ...

Design Verification Engineer

San Diego, CA

$144.40K - $176.20K/yr

Design Verification Engineer Job Type : Full time Location : San Diego And Bay Area : Strong verification skills: test planning, problem solving, debug, adversarial testing. Multimedia Camera Image ...

We're hiring experienced Design Verification Engineers from junior to senior levels to play a key role in developing and verifying the designs that will bring our next-generation AI processors to ...

We're hiring experienced Design Verification Engineers from junior to senior levels to play a key role in developing and verifying the designs that will bring our next-generation AI processors to ...

Senior Design Verification Engineer

Austin, TX · On-site

$134.80K - $164.50K/yr

Senior Design Verification Engineer ID: 1061 Location: Austin, TX More about this job > Description Senior Design Verification Engineer Looking for new challenges? Would you like the variety of a ...

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Design Verification Engineer information

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$105.5K

$149.2K

$167K

How much do design verification engineer jobs pay per year?

As of May 29, 2026, the average yearly pay for design verification engineer in the United States is $149,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $166,000.00 per year, depending on experience, location, and employer.

What is a Design Verification Engineer job?

A Design Verification Engineer ensures that hardware designs function correctly by developing and executing test plans, writing verification code (often in SystemVerilog with UVM), and debugging design issues. They work closely with design and validation teams to confirm specifications are met before manufacturing. Their role is critical in preventing costly design flaws and ensuring high-quality semiconductor products.

What are the key skills and qualifications needed to thrive in the Design Verification Engineer position, and why are they important?

Design Verification Engineers require a solid background in digital design concepts, computer engineering, and electrical engineering, usually supported by a relevant bachelor’s or master’s degree. Expertise with hardware description languages like Verilog or VHDL, simulation tools, and familiarity with Unix/Linux environments are typical technical requirements, with certifications in FPGA/ASIC design considered advantageous. Strong analytical thinking, problem-solving skills, teamwork, and effective communication help these engineers collaborate closely with design, validation, and development teams. These competencies are vital to ensuring design correctness, catching flaws early, and driving efficient, reliable hardware development.

What are the most common challenges faced by Design Verification Engineers in their daily work?

Design Verification Engineers often face the challenge of thoroughly validating complex digital designs within tight project deadlines. Debugging intricate issues, dealing with evolving specifications, and ensuring complete coverage during simulation can require a great deal of attention to detail and persistence. Collaboration with designers, validation teams, and often cross-functional groups is critical to resolving ambiguities and preventing errors from reaching production. Adapting to new verification methodologies or tools is also common as technologies and standards advance. These challenges offer valuable learning opportunities and play a crucial role in producing robust, high-quality hardware products.
What cities are hiring for Design Verification Engineer jobs? Cities with the most Design Verification Engineer job openings:
What are the most commonly searched types of Design Verification Engineer jobs? The most popular types of Design Verification Engineer jobs are:
Who are the top companies hiring for Design Verification Engineer jobs? The top employers for Design Verification Engineer jobs are:
What states have the most Design Verification Engineer jobs? States with the most job openings for Design Verification Engineer jobs include:
What job categories do people searching Design Verification Engineer jobs look for? The top searched job categories for Design Verification Engineer jobs are:
Infographic showing various Design Verification Engineer job openings in the United States as of May 2026, with employment types broken down into 87% Full Time, 9% Part Time, and 4% Contract. Highlights an 81% Physical, 2% Hybrid, and 17% Remote job distribution, with an average salary of $149,150 per year, or $71.7 per hour.
Design Verification Engineer

Design Verification Engineer

Correct Designs

Austin, TX • On-site

$134.80K - $164.50K/yr

Other

Medical, Retirement

Posted 14 days ago


Job description

Current Openings >> Design Verification Engineer
Design Verification Engineer
Summary
Title: Design Verification Engineer ID: 1058 Location: Austin, TX
More about this job >
Description

Design Verification Engineer

Looking for new challenges?  Would you like the variety of a contract position along with long term stability and benefits? Correct Designs can give it all to you.

Correct Designs is currently seeking talented Verification Engineers with prior System Verilog UVM experience to work with our major clients both in Austin, TX, and nationwide. Opportunities span from projects in AI and Machine Learning, processor fabric subsystems, SOC/ASIC products for vision processing, aerospace FPGAs, medical electronics, RISC-V based SoC, ARM based peripherals, and mixed signal DSPs. Successful candidates for this role will support verification of advanced CPU/GPU based SOCs.  

Correct Designs is NOT the typical contracting, staff augmentation firm.  Our engineers have respected long term roles with generous hourly rates in excellent team environments.  A typical contract may last 3 years, although we have shorter and even longer term work available. We are well respected in the Design Verification community with clients always seeking new CDI engineers. If you need a few months off between contracts you can take that break and know there will be plenty of work available when you return.  If you like the stability of always working, simply move to the next contract with little time off. Correct Designs does provide health care and retirement plan benefits.

We are based in Austin, Texas with clients throughout the US.  There are opportunities for both in-person and remote work. 

Our current positions are filled but we have clients looking for skilled CDI engineers on a regular bases.  Please submit your resume so we can match you up with upcoming projects.
Whether you are an experienced veteran looking for new challenges, or a talented engineer seeking to broaden your experience, we can offer exciting options for your career.  
Correct Designs uses E-Verify to confirm work status eligibility.
 

RESPONSIBILITIES:

  • Verify complex design blocks using equally complex SV/UVM verification environments
  • Develop and execute pre-silicon verification test plans
  • Develop directed and random verification tests to validate block and IP functionality
  • Develop verification components and tools
  • Develop verification functional coverage using industry standard coverage analysis tools/methods
  • Debug regression fails 
  • Replicate functional issues found in external environments or post-silicon; review/enhance tests to verify bug fixes

 REQUIRED SKILLS AND EXPERIENCE:

  • 3 or more years of proven verification experience in a hardware development setting
  • Strong background in SystemVerilog and UVM verification methodologies
  • Strong debug skills and experience with debug tools such as DVE/Verdi
  • Proficiency in Object Oriented programming, computer architecture and data structures
  • Strong analytical/problem solving skills and pronounced attention to details
  • Strong interpersonal and communication skills
  • Must be comfortable working across geographies

DESIRED SKILLS:

  • Experience architecting/developing verification environments and infrastructure, including scripting using Perl, Ruby, Make, or similar
  • Experience in other related domains such as formal verification, RTL design, or software development

 EDUCATION:

Bachelor or Master's in Electrical Engineering, Computer Engineering, or Computer Science

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