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Design Verification Engineer Jobs in Dallas, TX (NOW HIRING)

Fiori Technology Solutions is currently hiring for a Design Verification Engineer. This is fulltime permanent position. We are looking to fill multiple Design Verification openings. We are ...

Design Verification Engineer

Plano, TX · On-site

$130K - $158K/yr

and other details - We are seeking an ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define ...

Sr. Design Verification Engineer

Dallas, TX · On-site

$134K - $164K/yr

About the role We are looking to add a Sr. Design Verification Engineer to our team in Dallas, TX. What you'll do * Read and understand IP specification * Write and edit C testcases to run on mature ...

Design Verification Engineer | PI

Dallas, TX · On-site

$123K - $151K/yr

Bachelors of Electrical Engineering or related field * 5+ years of design verification experience Preferred Qualifications: * Strong understanding and hands on experience with: * Leading verification ...

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Design Verification Engineer information

See Dallas, TX salary details

$104.8K

$148.2K

$165.9K

How much do design verification engineer jobs pay per year?

As of Aug 23, 2026, the average yearly pay for design verification engineer in Dallas, TX is $148,172.00, according to ZipRecruiter salary data. Most workers in this role earn between $135,100.00 and $164,900.00 per year, depending on experience, location, and employer.

What is a design verification engineer?

A Design Verification Engineer ensures that hardware designs function correctly by developing and executing test plans, writing verification code (often in SystemVerilog with UVM), and debugging design issues. They work closely with design and validation teams to confirm specifications are met before manufacturing. Their role is critical in preventing costly design flaws and ensuring high-quality semiconductor products.

What skills and qualifications are needed to be a design verification engineer?

Design Verification Engineers require a solid background in digital design concepts, computer engineering, and electrical engineering, usually supported by a relevant bachelor’s or master’s degree. Expertise with hardware description languages like Verilog or VHDL, simulation tools, and familiarity with Unix/Linux environments are typical technical requirements, with certifications in FPGA/ASIC design considered advantageous. Strong analytical thinking, problem-solving skills, teamwork, and effective communication help these engineers collaborate closely with design, validation, and development teams. These competencies are vital to ensuring design correctness, catching flaws early, and driving efficient, reliable hardware development.

What are the most common challenges faced by design verification engineers in their daily work?

Design Verification Engineers often face the challenge of thoroughly validating complex digital designs within tight project deadlines. Debugging intricate issues, dealing with evolving specifications, and ensuring complete coverage during simulation can require a great deal of attention to detail and persistence. Collaboration with designers, validation teams, and often cross-functional groups is critical to resolving ambiguities and preventing errors from reaching production. Adapting to new verification methodologies or tools is also common as technologies and standards advance. These challenges offer valuable learning opportunities and play a crucial role in producing robust, high-quality hardware products.

What are the most commonly searched types of Design Verification Engineer jobs in Dallas, TX?

The most popular types of Design Verification Engineer jobs in Dallas, TX are:

What are popular job titles related to Design Verification Engineer jobs in Dallas, TX?

For Design Verification Engineer jobs in Dallas, TX, the most frequently searched job titles are:

What job categories do people searching Design Verification Engineer jobs in Dallas, TX look for?

The top searched job categories for Design Verification Engineer jobs in Dallas, TX are:

What cities near Dallas, TX are hiring for Design Verification Engineer jobs?

Cities near Dallas, TX with the most Design Verification Engineer job openings:

Infographic showing various Design Verification Engineer job openings in Dallas, TX as of August 2026, with employment types broken down into 88% Full Time, 8% Part Time, and 4% Contract. Highlights an 84% Physical, 5% Hybrid, and 11% Remote job distribution, with an average salary of $148,172 per year, or $71.2 per hour.

Design Verification Engineer

Optimalsemi

Dallas, TX • On-site

$120 - $150/hr

Other

Posted 18 days ago


Job description

Fiori Technology Solutions is currently hiring for a Design Verification Engineer. This is fulltime permanent position.

We are looking to fill multiple Design Verification openings. We are headquartered in Dallas, USA and have office in Hyderabad, India.

Welcome to a growing team that tests and validates new semiconductor packages. Our exciting IC product lines require thorough and accurate testing to develop detailed wafer maps which identify components that are suitable for production and manufacturing. In this role, you will be a member of a team with an open and collaborative work environment.

Skills and Qualifications Required:
  • Roles requiring both 3+ and 8+ years industry experience.
  • Bachelor’s or Master’s degree in related engineering field.
  • Ability to work independently and across geographies
Specific responsibilities include:
  • Digital verification for complex SoC with MCUs (ARM CM0+/CM3/4/CM33) with complex peripherals, hardware accelerators, memory architectures, bus architectures
  • Familiar with SoC development flow and environments
  • Have experience with mixed signal circuits: ADCs/DACs, OSCs, clock trees, power management circuits together with digital Ips
  • Basic understanding of UVM and testcase development in UVM environment
  • Working experience with mixed simulation environment (Digital + Analog model)
  • Nice to have: Exposure to DPLL/Synthesizer kind of design will make it easier to ramp up.
  • Nice to have: Exposure to cadence simulation tools and debugging (simulation, regression, coverage analysis, GLS)

For more information regarding FTS please visit our website https://fiorit.com. We provide an open door policy; please feel free to follow up by email info@fiorit.com or by phone +91 7416614439 and ask for a Talent Manager to assist you.

India Office Plot No 133, Sri Hari Nilayam,
Vaishali Nagar, Madinaguda,
Hyderabad - 500049

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