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Design Verification Engineer Jobs in Washington (NOW HIRING)

Geologics

Digital Design Engineer

Manassas, VA

$67/hr

Digital Design Engineer Client: Defense-Aerospace Hourly Rate: up to $67/hr W2, non-benefited ... Responsible for definition, design, verification and documentation * Determines architecture ...

Geologics

Digital Design Engineer

Manassas, VA

$67/hr

Digital Design Engineer Client: Defense-Aerospace Hourly Rate: up to $67/hr W2, non-benefited ... Responsible for definition, design, verification and documentation * Determines architecture ...

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All JobsDesign Verification Engineer JobsDesign Verification Engineer Jobs in Washington

Design Verification Engineer information

See Washington salary details

$119.5K

$168.9K

$189.1K

How much do design verification engineer jobs pay per year?

As of Jun 23, 2026, the average yearly pay for design verification engineer in Washington is $168,926.00, according to ZipRecruiter salary data. Most workers in this role earn between $154,000.00 and $188,000.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive in the Design Verification Engineer position, and why are they important?

Design Verification Engineers require a solid background in digital design concepts, computer engineering, and electrical engineering, usually supported by a relevant bachelor’s or master’s degree. Expertise with hardware description languages like Verilog or VHDL, simulation tools, and familiarity with Unix/Linux environments are typical technical requirements, with certifications in FPGA/ASIC design considered advantageous. Strong analytical thinking, problem-solving skills, teamwork, and effective communication help these engineers collaborate closely with design, validation, and development teams. These competencies are vital to ensuring design correctness, catching flaws early, and driving efficient, reliable hardware development.

What engineers make $500,000?

Senior engineers in specialized fields such as software engineering, petroleum engineering, and certain aerospace roles can earn $500,000 or more annually, especially with experience, bonuses, and stock options. High-level positions often require advanced skills, certifications, and leadership responsibilities.

How much does a design verification engineer earn?

A design verification engineer's salary typically ranges from $70,000 to $130,000 annually, depending on experience, location, and industry. Senior roles or those with specialized skills in hardware description languages and verification tools can earn higher salaries, often exceeding $150,000.

How much do design verification engineers make in the US?

Design verification engineers in the US typically earn a median annual salary of around $100,000 to $130,000, depending on experience, location, and industry. Entry-level positions may start lower, while experienced engineers with specialized skills or certifications can earn higher salaries, especially in high-demand sectors like semiconductor or electronics design.

What is a Design Verification Engineer job?

A Design Verification Engineer ensures that hardware designs function correctly by developing and executing test plans, writing verification code (often in SystemVerilog with UVM), and debugging design issues. They work closely with design and validation teams to confirm specifications are met before manufacturing. Their role is critical in preventing costly design flaws and ensuring high-quality semiconductor products.

What are the most common challenges faced by Design Verification Engineers in their daily work?

Design Verification Engineers often face the challenge of thoroughly validating complex digital designs within tight project deadlines. Debugging intricate issues, dealing with evolving specifications, and ensuring complete coverage during simulation can require a great deal of attention to detail and persistence. Collaboration with designers, validation teams, and often cross-functional groups is critical to resolving ambiguities and preventing errors from reaching production. Adapting to new verification methodologies or tools is also common as technologies and standards advance. These challenges offer valuable learning opportunities and play a crucial role in producing robust, high-quality hardware products.

What is a design verification engineer?

A design verification engineer is responsible for ensuring that electronic or hardware designs meet specified requirements and function correctly. They develop and execute test plans, use simulation tools, and analyze results to identify and fix design issues before production. This role often requires knowledge of scripting, testing methodologies, and industry standards such as ISO or IEEE.
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Design Verification Engineer jobs near you
Infographic showing various Design Verification Engineer job openings in Washington as of June 2026, with employment types broken down into 93% Full Time, 3% Part Time, 1% Temporary, and 3% Contract. Highlights an 82% Physical, 5% Hybrid, and 13% Remote job distribution, with an average salary of $168,926 per year, or $81.2 per hour.

Senior FPGA Verification Engineer

Galaxy Technology Hires LLC

Columbia, MD • On-site

$126K - $162K/yr

Full-time

Posted 2 days ago

Job description

Senior FPGA Verification Engineer (Columbia)
Columbia, MD - *Relocation Assistance Provided*
The Company
Our client is one of the largest, successful aerospace, defense and technology innovators in the world. They operate in over 100 countries and provide strategic solutions to the US, in order to protect and defend our freedoms worldwide, with advancing space access, supporting national security, civil service, and transportation safety. Their employees are passionate about their customers and their mission, as they enjoy working with cutting-edge technologies and advancements that are positively impacting our society.
The Job
Our client is seeking Digital Verification Engineers to support their development of secure tactical communication products. The candidate will function primarily in an FPGA verification role, working in a cooperative team environment to verify and test embedded FPGA firmware for radio communication systems. Successful candidates must have familiarity with a coverage-driven verification methodology from planning through closure as well as knowledge of industry standard interfaces. Candidates will be required to analyze requirements, create test specifications/plans, write tests in System Verilog within a UVM test bench framework, and verify designs meet requirements. Candidates will work with cross functional teams to verify FPGA designs for radio product development projects.
Functions
  • Perform FPGA design verification and validation of embedded electronic communication
  • Assist in the development of high-level and detailed verification test plans consistent with system requirements and specifications
  • Develop self-checking test benches for FPGA design verification and validation using System Verilog.
  • Develop Agents, Test sequences, Cover groups, Predictors, Scoreboards.
  • Develop randomized and directed tests to achieve closure on functional coverage and provide feedback to team to reach functional coverage goals
  • Develop high-level and detailed verification test plans and test benches consistent with system requirements and specifications
  • Work with cross functional teams as needed to define and verify product and design requirements.
  • Prepare design and implementation reviews. Present technical briefings and status to internal and external customers.

Qualifications
  • Education:
    • Bachelor's Degree and minimum 6 years of prior relevant experience
    • Graduate Degree and a minimum of 4 years of prior related experience
    • In lieu of a degree, minimum of 10 years of prior relevant experience developing and verifying FPGA/ASIC based embedded system solutions.

Preferred Additional Skills
  • Demonstrated ability to analyze and debug FPGA firmware and related hardware issues
  • Working knowledge of Ethernet Standard and design experience related to Ethernet packet processing.
  • Experience with cryptographic algorithms and cryptographic solutions for embedded communication systems
  • Experience with Mentor Graphics Verification tools
  • FPGA/ASIC RTL Design experience
  • Proficiency in Object Oriented Programming (C++, JAVA)
  • Proven proficiency in FPGA/ASIC verification using System Verilog
  • Working knowledge of UVM/OVM methodology
  • Experience with Advanced Functional Verification tools to report functional coverage
  • Experience with scripting languages (Bash, Perl, Python, Tcl)
  • Familiarity in working within Linux OS
  • Familiarity with industry standard interfaces (Ethernet, AXI, SPI)
  • Solid technical writing skills and ability to communicate complex technical concepts/solutions both inside and outside of the organization.
  • Highly motivated, self-starter, who works well in team environments

Security Clearance
Please be aware this position requires one to be eligible for a security clearance. Security clearances may only be granted to U.S. citizens. In addition, applicants who accept a conditional offer of employment may be subject to government security investigation(s) and must meet eligibility requirements for access to classified information.

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