1

Design Verification Engineer Jobs in Irvine, CA (NOW HIRING)

Design Verification Engineer

Aliso Viejo, CA · On-site

$145K - $177K/yr

As a Design Verification Engineer, you will be responsible for developing and executing comprehensive verification strategies for next-generation automotive camera video and vision processors. You ...

Design Verification Engineer

Irvine, CA · On-site

$146K - $178K/yr

Design Verification Engineer Location: Santa Clara, CA Duration: 06 months (High Possibility of an extension) Senior DV engineer responsible for defining and implementing verification methodology and ...

Design Verification Engineer

Irvine, CA · On-site

$146K - $178K/yr

Design Verification Engineer Location: Santa Clara, CA Duration: 06 months (High Possibility of an extension) Senior DV engineer responsible for defining and implementing verification methodology and ...

Design Verification Engineer

Irvine, CA · On-site

$146K - $178K/yr

Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the design of complex custom ASICs and embedded IP, is looking for an experienced verification engineer ...

Overview Broadcom is seeking experienced Design Verification engineers to work on PCIe and host interface technologies. The role involves verifying new designs that evolve rapidly, using constrained ...

Wireless Design Verification Engineer

Irvine, CA · On-site

$146K - $178K/yr

As a Senior Wireless Design Verification Engineer, you'll ensure first-time-right silicon success through sophisticated testbenches, comprehensive scenarios, and cutting-edge verification ...

We are looking for highly skilled and efficient Constrained Random Design Verification engineers that want to verify new designs that can evolve rapidly at every generation in a very dynamic market ...

We are looking for highly skilled and efficient Constrained Random Design Verification engineers that want to verify new designs that can evolve rapidly at every generation in a very dynamic market ...

Wireless SOC Verification Engineer

Irvine, CA · On-site

$146K - $178K/yr

As a Design Verification Engineer on our team, you'll be at the center of the verification effort within our silicon design group responsible for crafting and productizing state of the art Wireless ...

Design Verification Engineer - Early Career

Irvine, CA · On-site

$146K - $178K/yr

Report verification coverage of design features and parameters. * Drive the verification coverage to reach 100% goal. What We're Looking For * Bachelor's Degree in Electrical Engineering, Computer ...

next page

Showing results 1-20

Design Verification Engineer information

See Irvine, CA salary details

$113.2K

$160.1K

$179.3K

How much do design verification engineer jobs pay per year?

As of Aug 21, 2026, the average yearly pay for design verification engineer in Irvine, CA is $160,096.00, according to ZipRecruiter salary data. Most workers in this role earn between $146,000.00 and $178,200.00 per year, depending on experience, location, and employer.

What is a design verification engineer?

A Design Verification Engineer ensures that hardware designs function correctly by developing and executing test plans, writing verification code (often in SystemVerilog with UVM), and debugging design issues. They work closely with design and validation teams to confirm specifications are met before manufacturing. Their role is critical in preventing costly design flaws and ensuring high-quality semiconductor products.

What skills and qualifications are needed to be a design verification engineer?

Design Verification Engineers require a solid background in digital design concepts, computer engineering, and electrical engineering, usually supported by a relevant bachelor’s or master’s degree. Expertise with hardware description languages like Verilog or VHDL, simulation tools, and familiarity with Unix/Linux environments are typical technical requirements, with certifications in FPGA/ASIC design considered advantageous. Strong analytical thinking, problem-solving skills, teamwork, and effective communication help these engineers collaborate closely with design, validation, and development teams. These competencies are vital to ensuring design correctness, catching flaws early, and driving efficient, reliable hardware development.

What are the most common challenges faced by design verification engineers in their daily work?

Design Verification Engineers often face the challenge of thoroughly validating complex digital designs within tight project deadlines. Debugging intricate issues, dealing with evolving specifications, and ensuring complete coverage during simulation can require a great deal of attention to detail and persistence. Collaboration with designers, validation teams, and often cross-functional groups is critical to resolving ambiguities and preventing errors from reaching production. Adapting to new verification methodologies or tools is also common as technologies and standards advance. These challenges offer valuable learning opportunities and play a crucial role in producing robust, high-quality hardware products.

What are the most commonly searched types of Design Verification Engineer jobs in Irvine, CA?

The most popular types of Design Verification Engineer jobs in Irvine, CA are:

What are popular job titles related to Design Verification Engineer jobs in Irvine, CA?

For Design Verification Engineer jobs in Irvine, CA, the most frequently searched job titles are:

What job categories do people searching Design Verification Engineer jobs in Irvine, CA look for?

The top searched job categories for Design Verification Engineer jobs in Irvine, CA are:

What cities near Irvine, CA are hiring for Design Verification Engineer jobs?

Cities near Irvine, CA with the most Design Verification Engineer job openings:

Infographic showing various Design Verification Engineer job openings in Irvine, CA as of August 2026, with employment types broken down into 50% Full Time, and 50% Contract. Highlights an 50% In-person, and 50% Remote job distribution, with an average salary of $160,096 per year, or $77 per hour.

Design Verification Engineer

indie

Aliso Viejo, CA • On-site

$145K - $177K/yr

Full-time

Re-posted 11 hours ago


Job description

Imagine being part of a team that's redefining the future of mobility-where your ideas don't just sit in a lab but power next-generation technology. At indie, we are developing cutting-edge semiconductors, photonics, and radar sensors and systems for automotive, industrial, and adjacent markets. Our innovations are at the heart of advanced intelligent sensing and user experience applications, pushing the boundaries of what's possible.
If you're passionate about groundbreaking technology and want to make a real impact alongside a fast-paced team that thrives on creativity and collaboration, we'd love to have you on board!
As a Design Verification Engineer, you will be responsible for developing and executing comprehensive verification strategies for next-generation automotive camera video and vision processors. You will work collaboratively with cross-functional teams to drive verification from architecture through silicon bring-up and product validation.
Responsibilities
  • Develop test strategies to verify next-generation camera processors.
  • Develop and review block- and chip-level verification environments and test plans.
  • Work closely with design engineers to develop test benches and test plans that meet coverage goals.
  • Participate in selecting best-in-class third-party protocol verification IP.
  • Help enhance the overall DV methodology by analyzing third-party verification tools.
  • Debug simulation failures and collaborate with designers to identify root-cause issues.
  • Develop tests that help achieve functional safety goals to meet ISO 26262 compliance.
  • Work with the systems and software teams on emulation platforms.
  • Participate in the bring-up and debug of ASICs.
  • Provide support to the Product Engineering team to meet all product validation and qualification goals.
Minimum Qualifications
  • BSEE, BSCE, or BSCS.
  • 3 years of industry experience in design verification.
  • Experience with test planning, test bench architecture, and assertions.
  • Constrained random verification experience using SystemVerilog and UVM.
  • Experience with coverage-driven verification (code, functional, and assertion coverage).
  • Strong programming skills in C/C++ and scripting experience with Python, Tcl, and Perl.

indie Semiconductor and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.
We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
Concerning agencies: indie Semiconductor does not accept unsolicited resumes and will not be responsible for fees related to such.