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Design Verification Engineer Jobs in Concord, CA

Design Verification Engineer

San Francisco, CA · On-site

$160K - $195K/yr

We have an opportunity for an outstandingly hardworking design verification engineer. As a member of our wide-ranging group, you will have the rare and extraordinary opportunity to craft upcoming ...

Design Verification Engineer

San Francisco, CA · On-site

$160K - $195K/yr

We have an opportunity for an outstandingly hardworking design verification engineer. As a member of our wide-ranging group, you will have the rare and extraordinary opportunity to craft upcoming ...

Design Verification Engineer

San Francisco, CA · On-site

$160K - $195K/yr

We have an opportunity for an outstandingly hardworking design verification engineer! As a member of our wide-ranging group, you will have the rare and extraordinary opportunity to craft upcoming ...

PHY Design Verification Engineer

San Francisco, CA · On-site

$160K - $195K/yr

As a PHY Design Verification Engineer, you will be responsible for pre-silicon RTL verification of wireless PHY and its interfaces with the rest of the wireless communication SoC. You will interact ...

Wireless Design Verification Engineer

San Francisco, CA · On-site

$160K - $195K/yr

As a Wireless Design Verification Engineer, you will be responsible for pre-silicon RTL verification of wireless MAC and its interfaces with the rest of the wireless SoC. You will interact with DV ...

Wireless Design Verification Engineer

San Francisco, CA · On-site

$160K - $195K/yr

As a Wireless Design Verification Engineer, you will be responsible for pre-silicon RTL verification of wireless MAC and its interfaces with the rest of the wireless SoC. You will interact with DV ...

PHY Design Verification Engineer

San Francisco, CA · On-site

$160K - $195K/yr

As a PHY Design Verification Engineer, you will be responsible for pre-silicon RTL verification of wireless PHY and its interfaces with the rest of the wireless communication SoC. You will interact ...

Design Verification Engineer

San Francisco, CA · On-site

$129.30 - $225.30/hr

... engineer who will enable us to produce fully functional first silicon for IP designs. The ... care, execute verification plans, including design bring‑up, DV environment bring‑up ...

We're looking for experienced Design Verification (DV) Engineers to ensure functional correctness and robust design for our cutting-edge ML accelerators. You will play a key role in verifying complex ...

Mixed-Signal Verification Engineer

San Francisco, CA · On-site

$160K - $195K/yr

As a Mixed Signal Design Verification Engineer, you will be responsible for the verification of RF and mixed-signal blocks and their interfaces within the wireless SoC. You will interact with the ...

Mixed-Signal Verification Engineer

San Francisco, CA · On-site

$160K - $195K/yr

As a Mixed Signal Design Verification Engineer, you will be responsible for the verification of RF and mixed-signal blocks and their interfaces within the wireless SoC. You will interact with the ...

We're looking for verification engineers to contribute to and own blocks, sub-systems and ... Experience owning verification of a multi-die/multi-chiplet/MCM design * Experience in verification ...

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Showing results 1-20

Design Verification Engineer information

See Concord, CA salary details

$115.8K

$163.7K

$183.2K

How much do design verification engineer jobs pay per year?

As of Aug 28, 2026, the average yearly pay for design verification engineer in Concord, CA is $163,658.00, according to ZipRecruiter salary data. Most workers in this role earn between $149,200.00 and $182,100.00 per year, depending on experience, location, and employer.

What is a design verification engineer?

A Design Verification Engineer ensures that hardware designs function correctly by developing and executing test plans, writing verification code (often in SystemVerilog with UVM), and debugging design issues. They work closely with design and validation teams to confirm specifications are met before manufacturing. Their role is critical in preventing costly design flaws and ensuring high-quality semiconductor products.

What skills and qualifications are needed to be a design verification engineer?

Design Verification Engineers require a solid background in digital design concepts, computer engineering, and electrical engineering, usually supported by a relevant bachelor’s or master’s degree. Expertise with hardware description languages like Verilog or VHDL, simulation tools, and familiarity with Unix/Linux environments are typical technical requirements, with certifications in FPGA/ASIC design considered advantageous. Strong analytical thinking, problem-solving skills, teamwork, and effective communication help these engineers collaborate closely with design, validation, and development teams. These competencies are vital to ensuring design correctness, catching flaws early, and driving efficient, reliable hardware development.

What are the most common challenges faced by design verification engineers in their daily work?

Design Verification Engineers often face the challenge of thoroughly validating complex digital designs within tight project deadlines. Debugging intricate issues, dealing with evolving specifications, and ensuring complete coverage during simulation can require a great deal of attention to detail and persistence. Collaboration with designers, validation teams, and often cross-functional groups is critical to resolving ambiguities and preventing errors from reaching production. Adapting to new verification methodologies or tools is also common as technologies and standards advance. These challenges offer valuable learning opportunities and play a crucial role in producing robust, high-quality hardware products.

What are popular job titles related to Design Verification Engineer jobs in Concord, CA?

For Design Verification Engineer jobs in Concord, CA, the most frequently searched job titles are:

What cities near Concord, CA are hiring for Design Verification Engineer jobs?

Cities near Concord, CA with the most Design Verification Engineer job openings:

Infographic showing various Design Verification Engineer job openings in Concord, CA as of August 2026, with employment types broken down into 86% Full Time, 9% Part Time, and 5% Contract. Highlights an 85% Physical, 5% Hybrid, and 10% Remote job distribution, with an average salary of $163,658 per year, or $78.7 per hour.

Design Verification Engineer

Apple

San Francisco, CA • On-site

$160K - $195K/yr

Full-time

Re-posted 11 days ago


Apple rating

8.1

Company rating: 8.1 out of 10

Based on 678 frontline employees who took The Breakroom Quiz

7th of 30 rated technology retailers


Job description

At Apple, we work to craft products that enrich people's lives. Do you love working on challenges that no one has solved yet and changing the game? We have an opportunity for an outstandingly hardworking design verification engineer. As a member of our wide-ranging group, you will have the rare and extraordinary opportunity to craft upcoming products that will delight and encourage millions of Apple's customers every single day.
This role is for a digital-focused DV engineer who will enable us to produce fully functional first silicon for IP designs. The responsibilities include all phases of pre-silicon verification including but not limited to: establishing DV methodology, test-plan development, verification environment development including stimulus and checkers, test-writing, debug, coverage, sign-off for RTL freeze and tape-out.
Description
In this role, you will be responsible for ensuring bug-free first silicon for part of the SoC / IP and are encouraged to develop detailed test and coverage plans based on the micro-architecture You are responsible for developing verification methodology suitable for the IP, ensuring a scalable and portable environment. You will get to develop verification environment, including all the respective components such as stimulus, checkers, assertions, trackers, coverage. Furthermore, you will learn to develop verification plans for all features under your care, execute verification plans, including design bring-up, DV environment bring- up, regression enabling all features under your care, and debug of the test failures. You will also learn to develop block, IP and SoC level test-benches track and report DV progress using a variety of metrics, including bugs and coverage.
Minimum Qualifications
Minimum requirement of a bachelor's degree
Preferred Qualifications
BS degree in technical subject area and a minimum 3 years relevant industry experience or equivalent strongly preferred
Deep knowledge of SystemVerilog and UVM
Deep knowledge in developing scalable and portable test-benches
Proven experience with verification methodologies and tools such as simulators, waveform viewers
Build and run automation, coverage collection, gate level simulations
Some UVM knowledge, C/C++ level knowledge
Deep experience with serial protocols such as PCIe or USB, parallel protocol such as DDR
Basic knowledge of formal verification methodology
Some experience with power-aware (UPF) or similar verification methodology
Knowledge of one of the scripting languages such as Python, Perl, TCL

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About Apple

Sourced by ZipRecruiter

Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.

Industry

Computer and electronic product manufacturing

Company size

10,000+ Employees

Headquarters location

Cupertino, CA, US

Year founded

1976