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Design Verification Engineer Jobs in Folsom, CA (NOW HIRING)

Solidigm

Design Verification Engineer

Rancho Cordova, CA · On-site

$121K - $194K/yr

Strong independent debugging and problem-solving skills, with proficiency in programming or scripting for design and verification automation. * Excellent written and verbal communication skills, with ...

Intel

GPU Design Verification Engineer

Folsom, CA · On-site

$105K - $149K/yr

Collaborates with GPU architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and ...

New

Intel Corporation

GPU Design Verification Engineer

Folsom, CA · On-site

$106 - $149/hr

Collaborates with GPU architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and ...

Posted today

Intel

Senior SoC Design Verification Engineer

Folsom, CA · On-site

$145K - $177K/yr

About the Role As a Senior SoC Design Verification Engineer , you will lead verification efforts for complex system-on-chip (SoC) designs that enable Intel's next generation of client computing and ...

Intel

Design Verification Architect

Folsom, CA · On-site

$164K - $232K/yr

... design in the most optimal manner. Architects testbenches and develops Universal Verification ... engineers * Strong problem-solving skills with disciplined execution and a proactive mindset

Intel Corporation

Design Verification Architect

Folsom, CA · On-site

$164 - $232/hr

Position Overview Defines, architects, and documents verification strategy and methodologies for implementing and verifying the pre-silicon design in the most optimal manner. Architects testbenches ...

Intel

CPU Pre-Silicon Verification Engineer

Folsom, CA · On-site

$145K/yr

The Role and Impact As a CPU Pre-Silicon Verification Engineer , you will help ensure the quality ... Working across architecture, design, verification, and platform teams, you will identify and ...

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Design Verification Engineer information

See Folsom, CA salary details

$112.8K

$159.5K

$178.6K

How much do design verification engineer jobs pay per year?

As of Sep 4, 2026, the average yearly pay for design verification engineer in Folsom, CA is $159,486.00, according to ZipRecruiter salary data. Most workers in this role earn between $145,400.00 and $177,500.00 per year, depending on experience, location, and employer.

What is a design verification engineer?

A Design Verification Engineer ensures that hardware designs function correctly by developing and executing test plans, writing verification code (often in SystemVerilog with UVM), and debugging design issues. They work closely with design and validation teams to confirm specifications are met before manufacturing. Their role is critical in preventing costly design flaws and ensuring high-quality semiconductor products.

What skills and qualifications are needed to be a design verification engineer?

Design Verification Engineers require a solid background in digital design concepts, computer engineering, and electrical engineering, usually supported by a relevant bachelor’s or master’s degree. Expertise with hardware description languages like Verilog or VHDL, simulation tools, and familiarity with Unix/Linux environments are typical technical requirements, with certifications in FPGA/ASIC design considered advantageous. Strong analytical thinking, problem-solving skills, teamwork, and effective communication help these engineers collaborate closely with design, validation, and development teams. These competencies are vital to ensuring design correctness, catching flaws early, and driving efficient, reliable hardware development.

What are the most common challenges faced by design verification engineers in their daily work?

Design Verification Engineers often face the challenge of thoroughly validating complex digital designs within tight project deadlines. Debugging intricate issues, dealing with evolving specifications, and ensuring complete coverage during simulation can require a great deal of attention to detail and persistence. Collaboration with designers, validation teams, and often cross-functional groups is critical to resolving ambiguities and preventing errors from reaching production. Adapting to new verification methodologies or tools is also common as technologies and standards advance. These challenges offer valuable learning opportunities and play a crucial role in producing robust, high-quality hardware products.

What are the most commonly searched types of Design Verification Engineer jobs in Folsom, CA?

The most popular types of Design Verification Engineer jobs in Folsom, CA are:

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Design Verification Engineer jobs near you
Infographic showing various Design Verification Engineer job openings in Folsom, CA as of August 2026, with employment types broken down into 42% Full Time, and 58% Contract. Highlights an 100% In-person job distribution, with an average salary of $159,486 per year, or $76.7 per hour.

Design Verification Engineer

Solidigm

Rancho Cordova, CA • On-site

$121K - $194K/yr

Full-time

Medical, Dental, Vision, Life, Retirement

Posted 8 days ago

Job description

Company Description
Join a multibillion-dollar global company that brings together amazing technology, people, and operational scale to become a powerhouse in the memory industry. Headquartered in Rancho Cordova, California, Solidigm combines elements of an established, successful technology company with the spirit, agility, and entrepreneurial mindset of a start-up. In addition to the U.S. headquarters and other facilities in the U.S., the company has international presence in Asia, Europe, and the Americas. Solidigm will continue to lead the world in innovating new Memory technologies with aspirations to be the #1 NAND memory company in the world. At Solidigm, we view problems as opportunities to define innovative solutions that hold the power to change the world and unleash the potential technological needs that the future holds. At Solidigm, we are One Team that fosters a diverse, equitable, and inclusive culture that embraces individual uniqueness and empowers us to bring our best selves to deliver excellence in support of Solidigm's vision and mission to be the go-to partner for optimized data storage solutions. You can be part of the takeoff of an innovative business that develops cutting-edge products, delivers strong business value for customers, provides an engaging workplace for its employees, and serves a greater impact on the world. This is a golden opportunity for the right applicant to join us and help design, build, and lead Solidigm. We want a diverse team of dedicated professionals who will not just be Solidigm team members but contribute to how we shape the future of the organization. We are seeking applicants who will grow and thrive in our culture; be customer inspired, trusting, innovative, team-oriented, inclusive, results driven, collaborative, passionate, and flexible.
Job Description
This role is responsible for pre-silicon verification of advanced 3D NAND designs, including UVM-based verification, functional coverage, assertions, mixed-signal modeling and simulation, debugging, and verification-flow automation.
Key responsibilities
  • Create and maintain verification test plans based on design specifications.
  • Develop UVM-based directed and constrained-random tests, debug simulation failures, and quickly identify design, testbench, or test issues.
  • Define functional coverage models and perform coverage analysis and closure.
  • Create and maintain SystemVerilog Assertions (SVA) for 3D NAND designs based on verification requirements.
  • Develop, maintain, and enhance the UVM-based verification environment to support evolving design and verification requirements.
  • Develop and maintain mixed-signal full-chip models and verification environments, including analog behavioral models, cell-level testbenches, and full-chip mixed-signal netlists and testbenches.
  • Develop scripts and tools to automate verification workflows, regression execution, results processing, and data collection.

Qualifications
  • Master's degree with 3+ years of relevant experience, or bachelor's degree with 5+ years, in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • Prior experience in pre-silicon verification of memory products is required.
  • Hands-on experience with UVM, SystemVerilog Assertions, and formal property verification.
  • Hands-on experience with mixed-signal verification, modeling, and simulation, supported by strong knowledge of digital and analog circuit design.
  • Strong data analysis capabilities, with the ability to communicate technical findings clearly through written reports and presentations.
  • Strong independent debugging and problem-solving skills, with proficiency in programming or scripting for design and verification automation.
  • Excellent written and verbal communication skills, with the ability to collaborate effectively across design, verification, modeling, and cross-functional teams.
  • Preferred qualifications include memory-industry verification experience, full-chip and regression verification, code and functional coverage closure, Python, Perl, or shell scripting, AI-assisted workflows, and commercial simulation, formal, and mixed-signal tools.

Additional Information
This position is also eligible to participate in Solidigm's restricted stock unit (RSU), restricted cash unit (RCU), and cash bonus programs. In addition, Solidigm offers a benefits package that includes medical, dental, vision, supplemental life and AD&D insurance; short- and long-term disability; healthcare and dependent care flexible spending accounts, and a company match on eligible 401(k) plan contributions.
The compensation range for this role is $121,280- $194,100. Actual compensation is influenced by a variety of factors including but not limited to skills, experience, qualifications, and geographic location.
This is a Hybrid role reporting out of Rancho Cordova, California 3 days per week.
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