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Vice President Design Verification Engineer Jobs

Correct Designs

Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

Design Verification Engineer ID: 1063 Location: Austin, TX More about this job > Description Design Verification Engineer Looking for new challenges? Would you like the variety of a contract position ...

COGENT Infotech

Design Verification Engineer

Saratoga, CA · On-site

$150K - $183K/yr

Design Verification Engineer Location: Saratoga, CA (Onsite)-5 days We are seeking a Design Verification Engineer with 8+ years of experience in semiconductor verification. The ideal candidate will ...

Correct Designs

Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

Design Verification Engineer ID: 1058 Location: Austin, TX More about this job > Description Design Verification Engineer Looking for new challenges? Would you like the variety of a contract position ...

Texas Instruments

Design Verification Engineer

Dallas, TX · On-site

$150 - $200/hr

Texas Instruments is seeking a Design Verification Engineer to join our Analog Power Products organization in Dallas. In this role, you will develop and execute verification strategies that ensure ...

Texas Instruments Incorporated

$125 - $150/hr

Texas Instruments is seeking a Design Verification Engineer to join our Analog Power Products organization in Dallas. In this role, you will develop and execute verification strategies that ensure ...

Texas Instruments

$100 - $125/hr

Texas Instruments is seeking a Design Verification Engineer to join our Analog Power Products organization in Dallas. In this role, you will develop and execute verification strategies that ensure ...

Voltai

Design Verification Engineer

Palo Alto, CA · On-site

$159K - $195K/yr

About the Team Backed by Silicon Valley's top investors, Stanford University, and CEOs/Presidents ... As a Senior Verification Engineer, your role isn't just verifying chips but redefining how teams ...

Voltai

Design Verification Engineer

Palo Alto, CA · On-site

$150 - $200/hr

About the Team Backed by Silicon Valley's top investors, Stanford University, and CEOs/Presidents ... As a Senior Verification Engineer, your role isn't just verifying chips but redefining how teams ...

Sivaltech

Design Verification Engineer

San Diego, CA · On-site

$144K - $176K/yr

Design Verification Engineer Location: Bay Area, CA (Onsite/Hybrid) Experience: 8+ Years Job Summary We are seeking an experienced Design Verification Engineer with strong expertise in ASIC/SoC ...

SIGNin Solutions Inc.

Design Verification Engineer

San Jose, CA · On-site

$159K - $194K/yr

Etched Design Verification Engineer 6 Openings Location: San Jose, CA & Austin, TX - onsite Please find the JD: Job Summary We are seeking a Design Verification Engineer to join our Interface IP DV ...

New

Voltai, Inc

Design Verification Engineer

Palo Alto, CA · On-site

$159K - $195K/yr

About the Team Backed by Silicon Valley's top investors, Stanford University, and CEOs/Presidents ... As a Senior Verification Engineer, your role isn't just verifying chips but redefining how teams ...

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Vice President Design Verification Engineer information

See salary details

$105.5K

$149.2K

$167K

How much do vice president design verification engineer jobs pay per year?

As of Sep 9, 2026, the average yearly pay for vice president design verification engineer in the United States is $149,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $166,000.00 per year, depending on experience, location, and employer.

What does a vice president design verification engineer do?

A Vice President Design Verification Engineer is a senior executive responsible for overseeing the verification of electronic design projects, ensuring that hardware and integrated circuits meet all functional and quality requirements before production. They lead teams of engineers, set verification strategies, and manage processes to identify and fix design flaws early in the development cycle. Additionally, they collaborate with other executive leaders to align verification goals with overall business objectives and technological advancements. Their role is critical in ensuring the reliability, performance, and compliance of complex electronic systems.

What are the key skills and qualifications needed to thrive as a vice president design verification engineer?

To thrive as a Vice President Design Verification Engineer, you need extensive experience in hardware design verification, a strong background in electrical engineering or a related field, and leadership capabilities, often supported by an advanced degree. Proficiency with verification methodologies such as UVM, SystemVerilog, formal verification tools, and project management systems is typically required. Exceptional communication, strategic thinking, and team leadership are critical soft skills that set outstanding candidates apart. These skills and qualities ensure rigorous product validation, efficient team performance, and successful delivery of complex semiconductor projects.

What are the main challenges a vice president design verification engineer faces when leading large verification teams across multiple projects?

One of the main challenges in this role is ensuring alignment and consistency in verification methodologies across diverse project teams, often distributed globally. Balancing resource allocation, maintaining high-quality standards, and managing tight project timelines are also significant responsibilities. Additionally, fostering effective collaboration between design, verification, and software teams is essential to quickly resolve issues and achieve project milestones. Strong leadership and communication skills are crucial for driving innovation while maintaining operational excellence.

What is the difference between Vice President Design Verification Engineer vs Senior Design Verification Engineer?

AspectVice President Design Verification EngineerSenior Design Verification Engineer
CredentialsTypically requires a master's or PhD in Electrical Engineering or Computer Science, with extensive industry experienceBachelor's or master's degree in related field, with several years of verification experience
Work EnvironmentExecutive leadership, strategic planning, cross-department collaborationHands-on verification tasks, test plan development, simulation and debugging
Industry UsageUsed in large tech and semiconductor companies at an executive levelCommon in semiconductor, electronics, and hardware design companies

The Vice President Design Verification Engineer focuses on strategic oversight and leadership at an executive level, while the Senior Design Verification Engineer handles detailed verification tasks and technical execution. Both roles require strong technical backgrounds, but differ in scope and responsibilities.

What cities are hiring for Vice President Design Verification Engineer jobs?

Cities with the most Vice President Design Verification Engineer job openings:

What are the most commonly searched types of Design Verification Engineer jobs?

The most popular types of Design Verification Engineer jobs are:

What states have the most Vice President Design Verification Engineer jobs?

States with the most job openings for Vice President Design Verification Engineer jobs include:

What are popular job titles related to Vice President Design Verification Engineer jobs?

For Vice President Design Verification Engineer jobs, the most frequently searched job titles are:

Vice President Design Verification Engineer jobs near you
Infographic showing various Vice President Design Verification Engineer job openings in the United States as of September 2026, with employment types broken down into 1% Internship, 89% Full Time, 7% Part Time, and 3% Contract. Highlights an 81% Physical, 4% Hybrid, and 15% Remote job distribution, with an average salary of $149,150 per year, or $71.7 per hour.

Design Verification Engineer

Austin, TX • On-site

Correct Designs
11 - 50 employees
Learn more about Correct Designsexternal

$134K - $164K/yr

Contractor

Medical, Retirement

Re-posted 27 days ago

Job description

Current Openings >> Design Verification Engineer
Design Verification Engineer
Summary
Title: Design Verification Engineer ID: 1063 Location: Austin, TX
More about this job >
Description

Design Verification Engineer

Looking for new challenges?  Would you like the variety of a contract position along with long term stability and benefits? Correct Designs can give it all to you.

Correct Designs is currently seeking talented Verification Engineers with prior System Verilog UVM experience to work with our major clients both in Austin, TX, and nationwide. Opportunities span from projects in AI and Machine Learning, processor fabric subsystems, SOC/ASIC products for vision processing, aerospace FPGAs, medical electronics, RISC-V based SoC, ARM based peripherals, and mixed signal DSPs. Successful candidates for this role will support verification of advanced CPU/GPU based SOCs.  

Correct Designs is NOT the typical contracting, staff augmentation firm.  Our engineers have respected long term roles with generous hourly rates in excellent team environments.  A typical contract may last 3 years, although we have shorter and even longer term work available. We are well respected in the Design Verification community with clients always seeking new CDI engineers. If you need a few months off between contracts you can take that break and know there will be plenty of work available when you return.  If you like the stability of always working, simply move to the next contract with little time off. Correct Designs does provide health care and retirement plan benefits.

We are based in Austin, Texas with clients throughout the US.  There are opportunities for both in-person and remote work. 
Whether you are an experienced veteran looking for new challenges, or a talented engineer seeking to broaden your experience, we can offer exciting options for your career.  
Correct Designs uses E-Verify to confirm work status eligibility.
 

RESPONSIBILITIES:

  • Verify complex design blocks using equally complex SV/UVM verification environments
  • Develop and execute pre-silicon verification test plans
  • Develop directed and random verification tests to validate block and IP functionality
  • Develop verification components and tools
  • Develop verification functional coverage using industry standard coverage analysis tools/methods
  • Debug regression fails 
  • Replicate functional issues found in external environments or post-silicon; review/enhance tests to verify bug fixes

 REQUIRED SKILLS AND EXPERIENCE:

  • 3 or more years of proven verification experience in a hardware development setting
  • Strong background in SystemVerilog and UVM verification methodologies
  • Strong debug skills and experience with debug tools such as DVE/Verdi
  • Proficiency in Object Oriented programming, computer architecture and data structures
  • Strong analytical/problem solving skills and pronounced attention to details
  • Strong interpersonal and communication skills
  • Must be comfortable working across geographies

DESIRED SKILLS:

  • Experience architecting/developing verification environments and infrastructure, including scripting using Perl, Ruby, Make, or similar
  • Experience in other related domains such as formal verification, RTL design, or software development

 EDUCATION:

Bachelor or Master's in Electrical Engineering, Computer Engineering, or Computer Science

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