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Vice President Design Verification Engineer Jobs

Page Mechanical Group, Inc.

VP, Design

Stamford, CT · On-site

$180 - $320/hr

  • Medical

  • Dental

  • Vision

  • Retirement

The VP of Design will create cohesion across the brand while ensuring that Men's and Women's each ... cost engineering. * Proven ability to partner with senior Merchandising, Product Development ...

Correct Designs

Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

  • Medical

  • Retirement

Design Verification Engineer Looking for new challenges? Would you like the variety of a contract position along with long term stability and benefits? Correct Designs can give it all to you. Correct ...

Redolent, Inc.

Design Verification Engineer

Santa Clara, CA · On-site

$159K - $195K/yr

We are seeking a skilled Design Verification Engineer to join our hardware engineering team. The ideal candidate will be responsible for verifying complex digital designs using advanced verification ...

Baidu USA

Design Verification Engineer

Sunnyvale, CA · On-site

$159K - $194K/yr

Description We are looking for an experienced design verification engineer to join our SoC team at Baidu's Sunnyvale office. The successful candidate will be a motivated self-starter who will thrive ...

Correct Designs

Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

  • Medical

  • Retirement

Design Verification Engineer Looking for new challenges? Would you like the variety of a contract position along with long term stability and benefits? Correct Designs can give it all to you. Correct ...

Mirafra Technology

Design Verification Engineer

San Diego, CA · On-site

$144K - $176K/yr

Design Verification Engineer Job Type : Full time Location : San Diego And Bay Area : Strong verification skills: test planning, problem solving, debug, adversarial testing. Multimedia Camera Image ...

Intel

Design Verification Engineer

Santa Clara, CA · On-site

$141K - $200K/yr

  • Medical

  • Retirement

  • PTO

Intel is seeking a Design Verification Engineer for the Silicon Chassis team. In this role, you will contribute to verification of next-generation interconnect and chassis IPs that scale across ...

Intel Corporation

Design Verification Engineer

Santa Clara, CA · On-site

$141K - $200K/yr

  • Medical

  • Retirement

  • PTO

Intel is seeking a Design Verification Engineer for the Silicon Chassis team. In this role, you will contribute to verification of next-generation interconnect and chassis IPs that scale across ...

INA Solution Inc

Design verification engineer

San Diego, CA · Remote

$139K - $169K/yr

Design Verification Engineer Location: Remote anywhere in the USA and Canada Duration: Full-time (REMOTE) VISA: ONLY USC AND GC We are looking for humble geniuses, who believe that engineering has ...

iFlow Inc

Design Verification Engineer

Santa Clara, CA · On-site

$159K - $195K/yr

Design Verification Engineer Location:Santa Clara CA Duration: Long term Experience:8-15 Years Description : Key Responsibilities: Strong understanding of SV and UVM and good debugging skills.

Baidu USA

Design Verification Engineer

Sunnyvale, CA · On-site

$159K - $194K/yr

Description We are looking for an experienced design verification engineer to join our SoC team at Baidu's Sunnyvale office. The successful candidate will be a motivated self-starter who will thrive ...

Correct Designs

Senior Design Verification Engineer

Austin, TX

$134K - $164K/yr

  • Medical

  • Retirement

Senior Design Verification Engineer ID: 1061 Location: Austin, TX More about this job > Description Senior Design Verification Engineer Looking for new challenges? Would you like the variety of a ...

SambaNova

Design Verification Engineer

San Jose, CA · On-site

$159K - $194K/yr

About the role SambaNova Systems is looking for a talented and motivated Design Verification Engineer, DFT to help us build state of the art RDU chips for machine learning and artificial intelligence.

New

Correct Designs

Senior Design Verification Engineer

Austin, TX

$134K - $164K/yr

  • Medical

  • Retirement

Senior Design Verification Engineer ID: 1064 Location: Austin, TX More about this job > Description Senior Design Verification Engineer Looking for new challenges? Would you like the variety of a ...

Mythic

Design Verification Engineer

Palo Alto, CA · On-site

$120K - $225K/yr

We're hiring experienced Design Verification Engineers from junior to senior levels to play a key role in developing and verifying the designs that will bring our next-generation AI processors to ...

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Vice President Design Verification Engineer information

See salary details

$105.5K

$149.2K

$167K

How much do vice president design verification engineer jobs pay per year?

As of Aug 19, 2026, the average yearly pay for vice president design verification engineer in the United States is $149,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $166,000.00 per year, depending on experience, location, and employer.

What does a vice president design verification engineer do?

A Vice President Design Verification Engineer is a senior executive responsible for overseeing the verification of electronic design projects, ensuring that hardware and integrated circuits meet all functional and quality requirements before production. They lead teams of engineers, set verification strategies, and manage processes to identify and fix design flaws early in the development cycle. Additionally, they collaborate with other executive leaders to align verification goals with overall business objectives and technological advancements. Their role is critical in ensuring the reliability, performance, and compliance of complex electronic systems.

What are the key skills and qualifications needed to thrive as a vice president design verification engineer?

To thrive as a Vice President Design Verification Engineer, you need extensive experience in hardware design verification, a strong background in electrical engineering or a related field, and leadership capabilities, often supported by an advanced degree. Proficiency with verification methodologies such as UVM, SystemVerilog, formal verification tools, and project management systems is typically required. Exceptional communication, strategic thinking, and team leadership are critical soft skills that set outstanding candidates apart. These skills and qualities ensure rigorous product validation, efficient team performance, and successful delivery of complex semiconductor projects.

What are the main challenges a vice president design verification engineer faces when leading large verification teams across multiple projects?

One of the main challenges in this role is ensuring alignment and consistency in verification methodologies across diverse project teams, often distributed globally. Balancing resource allocation, maintaining high-quality standards, and managing tight project timelines are also significant responsibilities. Additionally, fostering effective collaboration between design, verification, and software teams is essential to quickly resolve issues and achieve project milestones. Strong leadership and communication skills are crucial for driving innovation while maintaining operational excellence.

What is the difference between Vice President Design Verification Engineer vs Senior Design Verification Engineer?

AspectVice President Design Verification EngineerSenior Design Verification Engineer
CredentialsTypically requires a master's or PhD in Electrical Engineering or Computer Science, with extensive industry experienceBachelor's or master's degree in related field, with several years of verification experience
Work EnvironmentExecutive leadership, strategic planning, cross-department collaborationHands-on verification tasks, test plan development, simulation and debugging
Industry UsageUsed in large tech and semiconductor companies at an executive levelCommon in semiconductor, electronics, and hardware design companies

The Vice President Design Verification Engineer focuses on strategic oversight and leadership at an executive level, while the Senior Design Verification Engineer handles detailed verification tasks and technical execution. Both roles require strong technical backgrounds, but differ in scope and responsibilities.

What cities are hiring for Vice President Design Verification Engineer jobs?

Cities with the most Vice President Design Verification Engineer job openings:

What are the most commonly searched types of Design Verification Engineer jobs?

The most popular types of Design Verification Engineer jobs are:

What states have the most Vice President Design Verification Engineer jobs?

States with the most job openings for Vice President Design Verification Engineer jobs include:

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Vice President Design Verification Engineer jobs near you
Infographic showing various Vice President Design Verification Engineer job openings in the United States as of August 2026, with employment types broken down into 89% Full Time, 7% Part Time, and 4% Contract. Highlights an 83% Physical, 5% Hybrid, and 12% Remote job distribution, with an average salary of $149,150 per year, or $71.7 per hour.

Design verification Engineer

Scadea Solutions Inc

Allentown, PA • On-site

$134K - $163K/yr

Full-time

Re-posted 11 days ago

Job description

Company Description
About Us :
Scadea Solutions is a global talent acquisition and executive search company. We work exclusively with some of the most reputed and admired clients across various sectors and geographies. This is a very urgent role.
Job Description
Role- Design verification Engineer
Location - Allentown, PA
Duration - Full-time
Visa Status - US Citizen / Green Card
Description:
As a design verification engineer, you will be responsible for understanding expected design functionality, Develop test plans and functional validation tests to verify system will meet design requirements. You will be working closely with design engineers, architects and other team members to ensure high quality test plans and flawless test plan execution.
Minimum Qualifications:
• 5+ years of related industry experience in ASIC/SOC verification
• Must have hands-on experience and expert level knowledge on HVL based verification
Duties:
• Subsystem Level & SoC Level verification
• Verification plan creation for various blocks
• Enhance Test Bench if needed
• Develop the SoC/Subsystem Test case suite in various stages like RTL,GLS releases.
• Integrate System Verilog, OVM Test bench components like Scoreboard, Monitors and Bus Function Models.
• Develop System Level Scenario's for full Chip.
• Debug the complex chip simulations and deliver bug free chip
• Perform Code and functional coverage analysis for Various Subsystems
• Meet Quality requirements before various RTL release stages
Nice to have:
• Working experience of git version management tool
• Working experience on VCS, Questa CDC, Verdi
• Ability to deliver high quality output against deadlines and to
• work effectively in cross-site team environment
Qualifications
Additional Information
Required Skills:
Job Description:
Performs highly complex application programming/systems development and support Performs highly complex configuration of business rules and technical parameters of software products Review business requirements and develop application design documentation Build technical components (Maximo objects, TRM Rules, Java extensions, etc) based on detailed design.
Performs unit testing of components along with completing necessary documentation. Supports product test, user acceptance test, etc as a member of the fix-it team. Employs consistent measurement techniques Include testing in project plans and establish controls to require adherence to test plans Manages the interrelationships among various projects or work objectives

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