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Part Time Design Verification Engineer Jobs (NOW HIRING)

Weekday AI

ASIC/SoC Design & Verification Engineer

$70 - $100/hr

This is a fully remote, part-time engagement requiring approximately 20-40 hours per week ... hardware engineering concepts, debugging, verification strategies, and design trade-offs.

Harley-Davidson

Engineer Design

Wauwatosa, WI · On-site

$74K - $112K/yr

Harley-Davidson Motor Company Full or Part-Time: Full Time Shift: SHIFT1 At Harley-Davidson, we are ... Collaborate with development and test teams to drive robust systems verification plan that meets ...

Harley-Davidson

Engineer Design

Wauwatosa, WI · On-site

$74K - $112K/yr

Harley-Davidson Motor Company Full or Part-Time: Full Time Shift: SHIFT1 At Harley-Davidson, we are ... Collaborate with development and test teams to drive robust systems verification plan that meets ...

Harley-Davidson

Engineer Design

Wauwatosa, WI

$74K - $112K/yr

Harley-Davidson Motor Company Full or Part-Time: Full Time Shift: SHIFT1 At Harley-Davidson, we are ... Collaborate with development and test teams to drive robust systems verification plan that meets ...

Shield AI

Electrical Engineer I (SD)

San Diego, CA

Full lifecycle ownership: concept, design, verification, integration, flight test, and ... Military fellows and part-time employees are not eligible for benefits. Please speak to your talent ...

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Part Time Design Verification Engineer information

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$105.5K

$149.2K

$167K

How much do part time design verification engineer jobs pay per year?

As of Aug 26, 2026, the average yearly pay for part time design verification engineer in the United States is $149,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $166,000.00 per year, depending on experience, location, and employer.

What is a part time design verification engineer?

Part time design verification engineers are professionals who work reduced or flexible hours to ensure that hardware or software designs function correctly and meet required specifications. They use various verification techniques such as simulation, formal verification, and testbenches to detect and resolve bugs in the design process. These engineers often collaborate with design and development teams to ensure product quality, but work on a part-time basis, which can mean fewer hours per week or a flexible schedule compared to full-time roles.

What are the key skills and qualifications needed to thrive as a part time design verification engineer?

To thrive as a Part Time Design Verification Engineer, you need a solid background in digital design principles, hardware description languages like Verilog or VHDL, and typically a degree in electrical or computer engineering. Familiarity with industry-standard verification tools such as UVM, SystemVerilog, and simulation environments is highly valued. Strong analytical thinking, attention to detail, and effective communication are crucial soft skills for identifying issues and collaborating with design teams. These competencies ensure accurate validation of hardware designs, minimize errors, and support timely project delivery in a flexible work arrangement.

What are some common challenges faced by part time design verification engineers, and how can they be addressed?

Part-time design verification engineers often face challenges related to staying updated with fast-moving project timelines and maintaining clear communication with full-time team members. To address these challenges, it's important to establish a consistent work schedule, make use of collaborative tools for tracking project status, and participate actively in regular meetings or sync-ups. Additionally, documenting progress and any issues encountered can help ensure a smooth handoff and keep the verification process efficient. Open communication with supervisors about workload and expectations also helps in balancing responsibilities effectively.

What is the difference between Part Time Design Verification Engineer vs Part Time Test Engineer?

AspectPart Time Design Verification EngineerPart Time Test Engineer
Primary FocusVerifying hardware or chip designs against specificationsTesting software or hardware products for functionality and quality
Skills & CertificationsKnowledge of hardware description languages, verification tools, and digital designTesting methodologies, scripting, and debugging skills
Work EnvironmentDesign labs, hardware development teams, semiconductor companiesQuality assurance labs, electronics companies, software firms

While both roles involve quality assurance, the Part Time Design Verification Engineer focuses on verifying hardware designs, whereas the Part Time Test Engineer concentrates on testing products for functionality. The verification engineer works closely with design teams to ensure correctness before manufacturing, while the test engineer validates products post-development. Both roles require technical skills but differ in their specific focus areas within the electronics and hardware industry.

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Cities with the most Part Time Design Verification Engineer job openings:

What are the most commonly searched types of Design Verification Engineer jobs?

The most popular types of Design Verification Engineer jobs are:

What job categories do people searching Part Time Design Verification Engineer jobs look for?

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Part Time Design Verification Engineer jobs near you
Infographic showing various Part Time Design Verification Engineer job openings in the United States as of August 2026, with employment types broken down into 90% Full Time, 7% Part Time, and 3% Contract. Highlights an 81% Physical, 5% Hybrid, and 14% Remote job distribution, with an average salary of $149,150 per year, or $71.7 per hour.

ASIC/SoC Design & Verification Engineer

Weekday AI

Remote

$70 - $100/hr

Part-time

Posted 29 days ago

Job description

This role is for one of our clients
Compensation: $70-$100 per hour
Join a cutting-edge AI initiative focused on advancing how next-generation AI systems understand real-world hardware engineering. We are seeking experienced ASIC and SoC Design & Verification Engineers to contribute their expertise in digital design, RTL development, functional verification, and silicon implementation to improve AI model capabilities.
Whether you're an early-career engineer, a PhD researcher, or a seasoned professional who has successfully taken chips through tapeout, this opportunity allows you to apply your practical engineering knowledge to help train and evaluate frontier AI systems.
This is a fully remote, part-time engagement requiring approximately 20-40 hours per week, depending on your availability.
Requirements
Key Responsibilities
  • Design realistic chip architecture, RTL, debugging, and verification challenges based on real engineering experience.
  • Develop complete reference solutions, including RTL implementations, verification environments, testbenches, and supporting documentation using Verilog/SystemVerilog.
  • Evaluate AI-generated hardware solutions, identify strengths and weaknesses, and provide detailed technical feedback.
  • Analyze where AI models struggle with hardware engineering concepts, debugging, verification strategies, and design trade-offs.
  • Collaborate with fellow hardware engineers to maintain consistency, technical accuracy, and high-quality engineering standards across all evaluation tasks.
  • Help improve AI understanding of modern digital design methodologies, verification practices, and semiconductor development workflows.
Required Qualifications
  • Hands-on experience in ASIC and/or SoC design, functional verification, or digital hardware development, preferably involving production silicon or tapeout projects.
  • Strong proficiency in SystemVerilog and Verilog.
  • Experience working with industry-standard EDA tools such as Synopsys VCS, Cadence Xcelium, Siemens Questa, VC Formal, Verdi, or equivalent open-source tools including Icarus Verilog, Verilator, Cocotb, Yosys, and OpenROAD.
  • Strong understanding of system-level hardware concepts including interface protocols, clock-domain crossing (CDC), handshaking, backpressure, and multi-module data flow.
  • Deep expertise in one or more of the following areas:
    • RTL Design and Microarchitecture
    • Functional Verification (UVM, SVA, Cocotb, testbench development)
    • IP Integration and SoC Bring-up (AXI, PCIe, DDR, NoC, ARM-based systems)
    • Formal Verification and Coverage Closure
    • Timing Closure, Synthesis, Power, Performance, and Area (PPA) Optimization
    • Analog/Mixed-Signal Design Verification
    • Hardware Specification Development and Technical Documentation
  • Ability to commit 20-40 hours per week with reliable weekday availability.
  • Strong written communication skills and the ability to work independently in a remote environment.
Preferred Qualifications
  • Experience participating in AI model training, evaluation, data annotation, or technical benchmarking projects.
  • Graduate research or industry experience in semiconductor design, verification, or computer architecture.
  • Familiarity with modern AI-assisted engineering tools and automated hardware design workflows.
  • Experience mentoring engineers or reviewing complex technical designs.
Why Join
  • Help shape how advanced AI systems understand and solve real-world semiconductor engineering challenges.
  • Apply your practical chip design and verification expertise to improve the next generation of AI models.
  • Work alongside experienced hardware engineers, researchers, and AI specialists on high-impact projects.
  • Enjoy the flexibility of a fully remote engagement with opportunities for continued collaboration based on performance.
Equal Opportunity
We are committed to creating an inclusive environment and welcome applications from qualified professionals of all backgrounds. Reasonable accommodations are available throughout the application and engagement process.
Contract & Engagement Details
  • Independent contractor engagement.
  • Fully remote with flexible working hours.
  • Expected commitment of approximately 20-40 hours per week.
  • Project duration may be extended, shortened, or concluded based on project requirements and individual performance.
  • Work does not require access to confidential or proprietary information from any current or former employer.
  • Payments are issued weekly based on approved work completed.
  • At this time, we are unable to support H1-B or STEM OPT candidates.

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