Are you looking to expand your chip design career and challenge yourself in a technical and multi ... Perl, JSON and Python) Using GenAI tools (e.g., large language models, AI-assisted code generation ...
Are you looking to expand your chip design career and challenge yourself in a technical and multi ... Perl, JSON and Python) Using GenAI tools (e.g., large language models, AI-assisted code generation ...
FE RTL Infrastructure - CAD Engineer
Beaverton, OR · On-site
$172K/yr
An important key aspect of this position is driving innovation through building generative AI ... Apple's chip design efforts. Minimum Qualifications Minimum of BS degree + 3 years of relevant ...
FE RTL Infrastructure - CAD Engineer
Beaverton, OR · On-site
$172K/yr
An important key aspect of this position is driving innovation through building generative AI ... Apple's chip design efforts. Minimum Qualifications Minimum of BS degree + 3 years of relevant ...
More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a ... Good architecture and RTL design knowledge * Strong expertise in modern C++, compiler, build ...
More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a ... Good architecture and RTL design knowledge * Strong expertise in modern C++, compiler, build ...
More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a ... Good architecture and RTL design knowledge * Strong expertise in modern C++, compiler, build ...
More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a ... Good architecture and RTL design knowledge * Strong expertise in modern C++, compiler, build ...
Founding RTL Design Engineer (San Francisco)
San Francisco, CA · On-site
$180K - $250K/yr
... AI training environments that will scale hardware engineering knowledge. They say chip design never ... Has 4-10+ years of RTL design or verification experience using System Verilog and industry-standard ...
Founding RTL Design Engineer (San Francisco)
San Francisco, CA · On-site
$180K - $250K/yr
... AI training environments that will scale hardware engineering knowledge. They say chip design never ... Has 4-10+ years of RTL design or verification experience using System Verilog and industry-standard ...
Design Verification Intern -RISCV CPU
Austin, TX · On-site
$50 - $70/hr
... leading AI/ML architecture. You will be mentored by and work alongside a group of highly ... Debug RTL code and assist in making real design changes that impact chip development. * Build tools ...
Design Verification Intern -RISCV CPU
Austin, TX · On-site
$50 - $70/hr
... leading AI/ML architecture. You will be mentored by and work alongside a group of highly ... Debug RTL code and assist in making real design changes that impact chip development. * Build tools ...
FE RTL Infrastructure - CAD Engineer
Beaverton, OR · On-site
$172K/yr
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... An important key aspect of this position is driving innovation through building generative AI ...
FE RTL Infrastructure - CAD Engineer
Beaverton, OR · On-site
$172K/yr
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... An important key aspect of this position is driving innovation through building generative AI ...
FE RTL Infrastructure - CAD Engineer
Austin, TX · On-site
$164K/yr
An important key aspect of this position is driving innovation through building generative AI ... Apple's chip design efforts. Minimum Qualifications Minimum of BS degree + 10 years of relevant ...
FE RTL Infrastructure - CAD Engineer
Austin, TX · On-site
$164K/yr
An important key aspect of this position is driving innovation through building generative AI ... Apple's chip design efforts. Minimum Qualifications Minimum of BS degree + 10 years of relevant ...
More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a ... Good architecture and RTL design knowledge * Strong expertise in modern C++, compiler, build ...
More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a ... Good architecture and RTL design knowledge * Strong expertise in modern C++, compiler, build ...
More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a ... Good architecture and RTL design knowledge * Strong expertise in modern C++, compiler, build ...
More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a ... Good architecture and RTL design knowledge * Strong expertise in modern C++, compiler, build ...
Head of Hardware
Palo Alto, CA · On-site
$145K - $191K/yr
... AI-driven chip design in a fast-paced, cutting-edge environment. Key Responsibilities * Lead ... Oversee all hardware engineering efforts, setting the vision and strategy for RTL development and ...
Quick apply
Head of Hardware
Palo Alto, CA · On-site
$145K - $191K/yr
... AI-driven chip design in a fast-paced, cutting-edge environment. Key Responsibilities * Lead ... Oversee all hardware engineering efforts, setting the vision and strategy for RTL development and ...
Improve design with prevention of static glitch harzad. Minimum Qualifications * Bachelor's or master's degree on Electrical Engineering with at least 10 years of experience on ASIC chip design * RTL ...
Improve design with prevention of static glitch harzad. Minimum Qualifications * Bachelor's or master's degree on Electrical Engineering with at least 10 years of experience on ASIC chip design * RTL ...
Evaluate digital chip design workflows to enhance AI model training and evaluation . * Design and verify RTL components using Verilog/SystemVerilog . * Collaborate with architecture, verification ...
Quick apply
Evaluate digital chip design workflows to enhance AI model training and evaluation . * Design and verify RTL components using Verilog/SystemVerilog . * Collaborate with architecture, verification ...
Head of AI
$350K - $500K/yr
You should bring deep expertise in ML for chip design, as well as leadership experience in high ... Architect and deploy novel agent-based systems, including fine-tuning models for RTL Code ...
Quick apply
Head of AI
$350K - $500K/yr
You should bring deep expertise in ML for chip design, as well as leadership experience in high ... Architect and deploy novel agent-based systems, including fine-tuning models for RTL Code ...
Advanced Packaging Engineer
$200K - $350K/yr
Work with chip-design and software teams driving DensityAI's AI accelerator program from first ... RTL and PD flows Compensation Final offers depend on level, location, and skills relevant to the ...
Quick apply
Advanced Packaging Engineer
$200K - $350K/yr
Work with chip-design and software teams driving DensityAI's AI accelerator program from first ... RTL and PD flows Compensation Final offers depend on level, location, and skills relevant to the ...
Advanced Packaging Engineer
Mountain View, CA · On-site
$160K/yr
Work with chip-design and software teams driving DensityAI's AI accelerator program from first ... RTL and PD flows Compensation Final offers depend on level, location, and skills relevant to the ...
Advanced Packaging Engineer
Mountain View, CA · On-site
$160K/yr
Work with chip-design and software teams driving DensityAI's AI accelerator program from first ... RTL and PD flows Compensation Final offers depend on level, location, and skills relevant to the ...
... RTL design or Design Verification engineer, with a solid understanding of the modern chip design ... No prior applied-AI or ML research background is required -- we'll meet you where you are.
... RTL design or Design Verification engineer, with a solid understanding of the modern chip design ... No prior applied-AI or ML research background is required -- we'll meet you where you are.
SOC Intergration Engineer
Mountain View, CA · Remote
$175K - $450K/yr
... chip SOC RTL design. * Partner with SubSystem owners within the Design team to facilitate block ... Leverage hands-on experience with AI-driven tools to architect automation for SOC integration and ...
SOC Intergration Engineer
Mountain View, CA · Remote
$175K - $450K/yr
... chip SOC RTL design. * Partner with SubSystem owners within the Design team to facilitate block ... Leverage hands-on experience with AI-driven tools to architect automation for SOC integration and ...
Advanced Packaging Engineer
Mountain View, CA · On-site
$200K - $350K/yr
Work with chip-design and software teams driving DensityAI's AI accelerator program from first ... RTL and PD flows Compensation Final offers depend on level, location, and skills relevant to the ...
Advanced Packaging Engineer
Mountain View, CA · On-site
$200K - $350K/yr
Work with chip-design and software teams driving DensityAI's AI accelerator program from first ... RTL and PD flows Compensation Final offers depend on level, location, and skills relevant to the ...
... design, development and deployment of high performantagents'frameworks and tools. * Develop AI ... complex RTL quickly. * Excellent command of scripting using Python. * Excellent interpersonal ...
... design, development and deployment of high performantagents'frameworks and tools. * Develop AI ... complex RTL quickly. * Excellent command of scripting using Python. * Excellent interpersonal ...
Ai Chip Design Rtl information
See salary details
$80.5K - $89.8K
0% of jobs
$89.8K - $99K
0% of jobs
$99K - $108.3K
1% of jobs
$108.3K - $117.6K
0% of jobs
$117.6K - $126.9K
0% of jobs
$130.7K is the 25th percentile. Wages below this are outliers.
$126.9K - $136.1K
57% of jobs
$140.1K is the 75th percentile. Wages above this are outliers.
$136.1K - $145.4K
38% of jobs
$145.4K - $154.7K
0% of jobs
$154.7K - $164K
1% of jobs
$164K - $173.2K
1% of jobs
$173.2K - $182.5K
1% of jobs
$80.5K
$139.4K
$182.5K
How much do ai chip design rtl jobs pay per year?
What is a $900000 AI job?
What is the difference between Ai Chip Design Rtl vs Ai Chip Verification Engineer?
| Aspect | Ai Chip Design Rtl | Ai Chip Verification Engineer |
|---|---|---|
| Primary Focus | Developing and implementing Register Transfer Level (RTL) code for AI chips | Verifying and validating RTL designs to ensure functionality |
| Skills Required | HDL languages (Verilog/VHDL), digital design, FPGA/ASIC knowledge | Simulation, testbench creation, debugging, scripting skills |
| Work Environment | Design teams, hardware development labs, EDA tools | Verification teams, simulation environments, test setups |
| Certifications | Hardware design certifications, FPGA/ASIC training | Verification methodologies, UVM, SystemVerilog certifications |
While Ai Chip Design Rtl focuses on creating the hardware description code for AI chips, Ai Chip Verification Engineer ensures that the RTL design functions correctly through rigorous testing. Both roles require knowledge of HDL languages and work closely within hardware development teams, but their core responsibilities differ—design versus verification.
Will AI replace RTL designers?
What are some common challenges faced by AI Chip Design RTL engineers during the verification process?
Which 3 jobs will survive AI?
What are AI Chip Design RTL engineers?
What is the salary of RTL design?
What are the key skills and qualifications needed to thrive as an AI Chip Design RTL Engineer, and why are they important?

Apple rating
8.1
Based on 667 frontline employees who took The Breakroom Quiz
5th of 30 rated technology retailers
Job description
This role will build upon your solid foundation in digital logic circuits while introducing mixed signal and analog circuit design and features. You will work with a variety of flows fundamental to modern silicon engineering: modeling and integrating high-performance mixed-signal and analog IPs into high-speed digital circuits. This is an excellent opportunity to gain valuable experience in software methods and analysis, which are increasingly crucial across the semiconductor industry.
As a member of our dynamic team, you will have the exceptional opportunity to help create the next generation of products that will delight and inspire millions of Apple customers every day. You will work to specify, design, verify, and support lab bring-up of sophisticated digital and mixed-signal circuits.
Description
In this job you will be responsible for specifying and/or micro-architecting digital blocks in sophisticated mixed-signal circuits. You will be responsible for RTL coding of blocks specified by you or others. You will also participate in the design verification and bring-up of such blocks by writing meaningful assertions, debugging code, and otherwise interacting with the design verification team. You will contribute to the lab bring-up of those circuits by potentially writing test scripts, analyzing lab data, proposing experiments, etc.
Preferred Qualifications
Proven knowledge of RTL design, Verilog and SystemVerilog
Deep knowledge of front-end tools (Verilog simulators, linters, CDC, RDC, LEQ, UPF)
Low power design methodologies and techniques to reduce dynamic and static IC power
ECO design flows and methodologies
Proven understanding of mixed signal concepts and experience with analog circuit behavioral modeling
Proven knowledge of synthesis, static timing and DFT
Proven knowledge of SystemVerilog assertions, checkers, and other design verification techniques
Knowledge of scripting languages (i.e. Perl, JSON and Python)
Using GenAI tools (e.g., large language models, AI-assisted code generation) to design, validate, and optimize SystemVerilog RTL code
Digital signal processing fundamentals including signal processing concepts
Strong communication and presentation skills
Minimum Qualifications
BS and a minimum of 10 years relevant industry experience
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976