As part of the AI for Chip Design team, you will develop agentic AI solutions to craft the micro-architecture, implement the RTL, and deliver a fully verified, synthesis/timing clean design.
As part of the AI for Chip Design team, you will develop agentic AI solutions to craft the micro-architecture, implement the RTL, and deliver a fully verified, synthesis/timing clean design.
As part of the AI for Chip Design team, you will develop agentic AI solutions to craft the micro-architecture, implement the RTL, and deliver a fully verified, synthesis/timing clean design.
As part of the AI for Chip Design team, you will develop agentic AI solutions to craft the micro-architecture, implement the RTL, and deliver a fully verified, synthesis/timing clean design.
As part of the AI for Chip Design team, you will develop agentic AI solutions to craft the micro-architecture, implement the RTL, and deliver a fully verified, synthesis/timing clean design.
As part of the AI for Chip Design team, you will develop agentic AI solutions to craft the micro-architecture, implement the RTL, and deliver a fully verified, synthesis/timing clean design.
As part of the AI for Chip Design team, you will develop agentic AI solutions to craft the micro-architecture, implement the RTL, and deliver a fully verified, synthesis/timing clean design.
As part of the AI for Chip Design team, you will develop agentic AI solutions to craft the micro-architecture, implement the RTL, and deliver a fully verified, synthesis/timing clean design.
As part of the AI for Chip Design team, you will develop agentic AI solutions to craft the micro-architecture, implement the RTL, and deliver a fully verified, synthesis/timing clean design.
As part of the AI for Chip Design team, you will develop agentic AI solutions to craft the micro-architecture, implement the RTL, and deliver a fully verified, synthesis/timing clean design.
GPU Physical Design Engineer
Austin, TX · On-site
$134K - $138K/yr
This role requires a mix of strategic engineering along with hands-on experience in physical design and large chip integration, being responsible for implementing complete chip design from RTL to ...
GPU Physical Design Engineer
Austin, TX · On-site
$134K - $138K/yr
This role requires a mix of strategic engineering along with hands-on experience in physical design and large chip integration, being responsible for implementing complete chip design from RTL to ...
As part of the AI for Chip Design team, you will develop agentic AI solutions to craft the micro-architecture, implement the RTL, and deliver a fully verified, synthesis/timing clean design.
As part of the AI for Chip Design team, you will develop agentic AI solutions to craft the micro-architecture, implement the RTL, and deliver a fully verified, synthesis/timing clean design.
Hardware Engineer, Physical Design
Manhattan, NY · On-site
$125 - $150/hr
Experience at an AI chip company where design, verification, and PD were tightly coupled * Familiarity with RISC-V or other open ISAs * Experience with AI-assisted RTL or EDA tooling in your design ...
Hardware Engineer, Physical Design
Manhattan, NY · On-site
$125 - $150/hr
Experience at an AI chip company where design, verification, and PD were tightly coupled * Familiarity with RISC-V or other open ISAs * Experience with AI-assisted RTL or EDA tooling in your design ...
Knowledge of the chip design process and methodology for RTL quality. * Ability to present and explain novel methods to users. About the job In this role, you'll work to shape the future of AI/ML ...
Knowledge of the chip design process and methodology for RTL quality. * Ability to present and explain novel methods to users. About the job In this role, you'll work to shape the future of AI/ML ...
Microarchitect / RTL Design - Memory Subsystem Architecture & Design
Palo Alto, CA · On-site
$200 - $250/hr
About Architect Architect is a frontier AI lab for chip design. We build AI models and tools for on ... Own the memory subsystem RTL end-to-end : from DDR/HBM controller design through code generation ...
Microarchitect / RTL Design - Memory Subsystem Architecture & Design
Palo Alto, CA · On-site
$200 - $250/hr
About Architect Architect is a frontier AI lab for chip design. We build AI models and tools for on ... Own the memory subsystem RTL end-to-end : from DDR/HBM controller design through code generation ...
RTL Design Engineer
Cary, NC · On-site
Are you looking to expand your chip design career and challenge yourself in a technical and multi ... Perl, JSON and Python) Using GenAI tools (e.g., large language models, AI-assisted code generation ...
RTL Design Engineer
Cary, NC · On-site
Are you looking to expand your chip design career and challenge yourself in a technical and multi ... Perl, JSON and Python) Using GenAI tools (e.g., large language models, AI-assisted code generation ...
RTL Design Engineer
Melbourne, FL · On-site
Are you looking to expand your chip design career and challenge yourself in a technical and multi ... Perl, JSON and Python) Using GenAI tools (e.g., large language models, AI-assisted code generation ...
RTL Design Engineer
Melbourne, FL · On-site
Are you looking to expand your chip design career and challenge yourself in a technical and multi ... Perl, JSON and Python) Using GenAI tools (e.g., large language models, AI-assisted code generation ...
Are you looking to expand your chip design career and challenge yourself in a technical and multi ... Perl, JSON and Python) Using GenAI tools (e.g., large language models, AI-assisted code generation ...
Are you looking to expand your chip design career and challenge yourself in a technical and multi ... Perl, JSON and Python) Using GenAI tools (e.g., large language models, AI-assisted code generation ...
Senior C++ Software Engineer - Chip Design Tools
Santa Clara, CA · On-site
$150 - $200/hr
Good architecture and RTL design knowledge. * Strong expertise in modern C++, compiler, build ... NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work ...
Senior C++ Software Engineer - Chip Design Tools
Santa Clara, CA · On-site
$150 - $200/hr
Good architecture and RTL design knowledge. * Strong expertise in modern C++, compiler, build ... NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work ...
RTL Design Engineer
Cary, NC · On-site
Are you looking to expand your chip design career and challenge yourself in a technical and multi ... Perl, JSON and Python) Using GenAI tools (e.g., large language models, AI-assisted code generation ...
RTL Design Engineer
Cary, NC · On-site
Are you looking to expand your chip design career and challenge yourself in a technical and multi ... Perl, JSON and Python) Using GenAI tools (e.g., large language models, AI-assisted code generation ...
RTL Design Engineer
Waltham, MA · On-site
Are you looking to expand your chip design career and challenge yourself in a technical and multi ... Perl, JSON and Python) Using GenAI tools (e.g., large language models, AI-assisted code generation ...
RTL Design Engineer
Waltham, MA · On-site
Are you looking to expand your chip design career and challenge yourself in a technical and multi ... Perl, JSON and Python) Using GenAI tools (e.g., large language models, AI-assisted code generation ...
$200 - $250/hr
About Architect Architect is a frontier AI lab for chip design. We build AI models and tools for on ... Own the memory subsystem RTL end-to-end : from DDR/HBM controller design through code generation ...
$200 - $250/hr
About Architect Architect is a frontier AI lab for chip design. We build AI models and tools for on ... Own the memory subsystem RTL end-to-end : from DDR/HBM controller design through code generation ...
RTL Design Engineer
Cary, NC · On-site
Are you looking to expand your chip design career and challenge yourself in a technical and multi ... Perl, JSON and Python) Using GenAI tools (e.g., large language models, AI-assisted code generation ...
RTL Design Engineer
Cary, NC · On-site
Are you looking to expand your chip design career and challenge yourself in a technical and multi ... Perl, JSON and Python) Using GenAI tools (e.g., large language models, AI-assisted code generation ...
Lead RTL Design Engineer
Sunnyvale, CA · On-site
$200 - $250/hr
Drive all aspects of chip design, including Functional Specification, Micro-architecture, RTL ... Publish and open source their cutting-edge AI research. * Work on one of the fastest AI ...
Lead RTL Design Engineer
Sunnyvale, CA · On-site
$200 - $250/hr
Drive all aspects of chip design, including Functional Specification, Micro-architecture, RTL ... Publish and open source their cutting-edge AI research. * Work on one of the fastest AI ...
Are you looking to expand your chip design career and challenge yourself in a technical and multi ... Perl, JSON and Python) Using GenAI tools (e.g., large language models, AI-assisted code generation ...
Are you looking to expand your chip design career and challenge yourself in a technical and multi ... Perl, JSON and Python) Using GenAI tools (e.g., large language models, AI-assisted code generation ...
Ai Chip Design Rtl information
See salary details
$80.5K - $89.8K
0% of jobs
$89.8K - $99K
0% of jobs
$99K - $108.3K
1% of jobs
$108.3K - $117.6K
0% of jobs
$117.6K - $126.9K
0% of jobs
$130.7K is the 25th percentile. Wages below this are outliers.
$126.9K - $136.1K
57% of jobs
$140.1K is the 75th percentile. Wages above this are outliers.
$136.1K - $145.4K
38% of jobs
$145.4K - $154.7K
0% of jobs
$154.7K - $164K
1% of jobs
$164K - $173.2K
1% of jobs
$173.2K - $182.5K
1% of jobs
$80.5K
$139.4K
$182.5K
How much do ai chip design rtl jobs pay per year?
What is an AI Chip Design RTL engineer?
What skills and qualifications are needed to thrive as an AI Chip Design RTL engineer?
What are common challenges faced by AI Chip Design RTL engineers during the verification process?
What is the difference between Ai Chip Design Rtl vs Ai Chip Verification Engineer?
| Aspect | Ai Chip Design Rtl | Ai Chip Verification Engineer |
|---|---|---|
| Primary Focus | Developing and implementing Register Transfer Level (RTL) code for AI chips | Verifying and validating RTL designs to ensure functionality |
| Skills Required | HDL languages (Verilog/VHDL), digital design, FPGA/ASIC knowledge | Simulation, testbench creation, debugging, scripting skills |
| Work Environment | Design teams, hardware development labs, EDA tools | Verification teams, simulation environments, test setups |
| Certifications | Hardware design certifications, FPGA/ASIC training | Verification methodologies, UVM, SystemVerilog certifications |
While Ai Chip Design Rtl focuses on creating the hardware description code for AI chips, Ai Chip Verification Engineer ensures that the RTL design functions correctly through rigorous testing. Both roles require knowledge of HDL languages and work closely within hardware development teams, but their core responsibilities differ—design versus verification.
What cities are hiring for Ai Chip Design Rtl jobs?
Cities with the most Ai Chip Design Rtl job openings:
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States with the most job openings for Ai Chip Design Rtl jobs include:
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Senior ASIC Design Engineer - Agentic AI
Santa Clara, CA • On-site
Full-time
Re-posted 15 days ago
Nvidia rating
9.6
Based on 18 frontline employees who took The Breakroom Quiz
6th of 247 rated software companies
Job description
What you'll be doing:
- As a member of the GPU Design Methodology team, you will document and deliver design guidelines that will help the ASIC team implement high performance, area and power efficient RTL to achieve design targets and specifications.
- As part of the AI for Chip Design team, you will develop agentic AI solutions to craft the micro-architecture, implement the RTL, and deliver a fully verified, synthesis/timing clean design.
- Collaborate and coordinate with other designers as well as tool and flow owners to make sure design guidelines and agentic solutions meet their requirements.
- Make a difference by using AI technologies to tackle complex problems in chip design, driving innovation and meaningful impact across the industry.
- Drive impact by designing and deploying LLM-powered solutions for engineering assistants and multi-turn, multi-modal dialogue systems.
- Stay ahead by engaging with the latest advancements in machine learning and AI to create powerful solutions.
What we need to see:
- Master's or PhD degree in Electrical Engineering, Computer Science/Engineering, or a related field (or equivalent experience).
- 8+ years of meaningful work experience.
- Experience in micro-architecture and RTL development (Verilog) in complex designs.
- Deep understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis.
- Exposure to Digital systems and VLSI design, Computer Architecture, and Computer Arithmetic is required.
- Proficiency in rapid prototyping using Python with strong foundational knowledge of data structures, algorithms, and software engineering principles.
- Experience with fine-tuning large language models, building advanced multi-agent systems, RAG pipelines and vector databases.
- Strong analytical, communication, and interpersonal skills, with a proven track record to thrive in dynamic, product-focused, and distributed teams.
- A proactive approach to problem-solving and a willingness to acquire new skills and knowledge as needed to achieve results.
NVIDIA is widely considered to be one of the technology world's most desirable employers. We have some of the most forward-thinking people in the world working for us. We inspire our engineers to build solutions for the problems faced by our customers. Are you creative? Do you love the challenge of continuously crafting the fastest, most efficient GPUs while driving innovation across multiple fields? If so, we want to hear from you.
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5.
You will also be eligible for equity and benefits.
Applications for this job will be accepted at least until June 30, 2026.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
About Nvidia
Sourced by ZipRecruiter
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US