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Ai Chip Design Rtl Jobs in Virginia (NOW HIRING)

Lynk

Senior FPGA Design Engineer

Chantilly, VA · On-site

Design high-speed FPGA RTL designs for satellite communication systems * Understand the hardware ... Experience with SoC designs such as Xilinx Zynq and Xilinx Versal (preferably with AI Engine) is a ...

Leidos

FPGA Firmware Design Engineer

Arlington, VA

... RTL and incorporate client feedback into firmware revisions. This role will also support ... Experience with latest System on a Chip (SoC) implementations such as AMD/Xilinx Ultrascale ...

Leidos

FPGA Firmware Design Engineer

Arlington, VA · On-site

... RTL and incorporate client feedback into firmware revisions. This role will also support ... a Chip (SoC) implementations such as AMD/Xilinx Ultrascale+ /Versal series and Altera Agilex/MCP ...

Leidos

FPGA Firmware Design Engineer

Arlington, VA

$87.10K - $157.45K/yr

... RTL and incorporate client feedback into firmware revisions. This role will also support ... a Chip (SoC) implementations such as AMD/Xilinx Ultrascale+ /Versal series and Altera Agilex/MCP ...

CRDF Global

Emerging Technology Experts

Arlington, VA · On-site

Frontier models (large language models, foundation models), adversarial AI, AI red-teaming, ethics ... Chip design (EDA tools), lithography, fabrication, packaging and assembly/test, semiconductor ...

CRDF Global

Emerging Technology Experts

Arlington, VA · On-site

Frontier models (large language models, foundation models), adversarial AI, AI red-teaming, ethics ... Chip design (EDA tools), lithography, fabrication, packaging and assembly/test, semiconductor ...

NewGen Technologies

Electrical Engineer

Arlington, VA · On-site

Lead technical design and setup of Chip-Off Forensics Lab infrastructure at government facility ... We have helped secure borders, have used artificial intelligence (AI) to fight terror, aided the ...

NewGen Technologies

Electrical Engineer

Arlington, VA · On-site

Lead technical design and setup of Chip-Off Forensics Lab infrastructure at government facility ... We have helped secure borders, have used artificial intelligence (AI) to fight terror, aided the ...

NewGen

Electrical Engineer

Arlington, VA · On-site

Lead technical design and setup of Chip-Off Forensics Lab infrastructure at government facility ... We have helped secure borders, have used artificial intelligence (AI) to fight terror, aided the ...

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Ai Chip Design Rtl information

What are the key skills and qualifications needed to thrive as an AI Chip Design RTL Engineer, and why are they important?

To thrive as an AI Chip Design RTL Engineer, you need a solid background in digital design, computer architecture, and proficiency in Hardware Description Languages (HDLs) like Verilog or VHDL, often supported by a degree in electrical or computer engineering. Experience with simulation tools (e.g., ModelSim, Synopsys), ASIC/FPGA design flows, and relevant certifications are highly valued. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help you excel in collaborative and complex design environments. These competencies are crucial for creating efficient, reliable AI hardware that meets performance and power requirements in a fast-evolving field.

What are some common challenges faced by AI Chip Design RTL engineers during the verification process?

AI Chip Design RTL engineers often encounter challenges in ensuring their designs meet complex functional and performance requirements, especially given the rapid pace of AI hardware advancements. Verification can be particularly demanding due to the need to simulate and test intricate AI workloads, manage large datasets, and debug subtle timing or logic errors. Collaboration with verification teams, system architects, and software engineers is essential to address these issues efficiently and to ensure seamless integration of the RTL code into the broader chip design. Staying up-to-date with the latest verification tools and methodologies is also crucial for success in this role.

What are AI Chip Design RTL engineers?

AI Chip Design RTL (Register Transfer Level) engineers are specialists who design the digital logic for chips used in artificial intelligence applications. They use hardware description languages like Verilog or VHDL to create and validate the architecture and functionality of these chips before they are manufactured. Their work ensures that AI processors are efficient, high-performing, and meet the requirements of modern AI workloads. RTL engineers collaborate closely with verification, software, and hardware teams to optimize chip performance and power consumption.

What is the difference between Ai Chip Design Rtl vs Ai Chip Verification Engineer?

AspectAi Chip Design RtlAi Chip Verification Engineer
Primary FocusDeveloping and implementing Register Transfer Level (RTL) code for AI chipsVerifying and validating RTL designs to ensure functionality
Skills RequiredHDL languages (Verilog/VHDL), digital design, FPGA/ASIC knowledgeSimulation, testbench creation, debugging, scripting skills
Work EnvironmentDesign teams, hardware development labs, EDA toolsVerification teams, simulation environments, test setups
CertificationsHardware design certifications, FPGA/ASIC trainingVerification methodologies, UVM, SystemVerilog certifications

While Ai Chip Design Rtl focuses on creating the hardware description code for AI chips, Ai Chip Verification Engineer ensures that the RTL design functions correctly through rigorous testing. Both roles require knowledge of HDL languages and work closely within hardware development teams, but their core responsibilities differ—design versus verification.

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Ai Chip Design Rtl jobs near you
Senior FPGA Design Engineer

Senior FPGA Design Engineer

Lynk

Chantilly, VA • On-site

Full-time

Posted 2 days ago

Job description

About Lynk
Lynk is the inventor of satellite direct to device or D2D technology, and has the world's only commercial license from the FCC to operate a commercial D2D system. Today, Lynk allows mobile network operators' subscribers to send and receive text messages to and from space via standard unmodified, mobile devices. Lynk's service has been tested and proven on all seven continents, has regulatory approvals in more than 30 countries, and is currently being deployed commercially based on more than 40 MNO commercial service contracts covering approximately 50 countries.
Our technology will enable all 8 billion people on the planet to stay connected with the existing standard phone in their pocket. Everywhere. No matter what.
By joining Lynk, you will have the opportunity to directly touch the lives of billions. Your mission will be to bring mobile broadband to billions, pull hundreds of millions out of poverty, and save countless lives.
Job Summary
Lynk is developing cellular-based space payloads and seeks engineers with expertise and experience designing and developing custom software-defined radio (SDR) platforms. Aspects of the position require an understanding of FPGA hardware, firmware, digital signal processing, and algorithms for SDR-based satellite communication.
As a Senior FPGA Engineer, you will support the development of custom radio platforms for the primary (cellular service link) and secondary (TT&C / feeder link) communication links. The platform will initially be tested in a lab environment, then on the payload prototype in a lab environment that simulates orbit operations, and finally in space. The Senior FPGA Engineer will also be responsible for designing and implementing methods for ensuring successful testing, verification, and validation.
Core Responsibilities
As a Senior FPGA Engineer, your core responsibilities are as follows:
  • Design high-speed FPGA RTL designs for satellite communication systems
  • Understand the hardware-based requirements, e.g., FPGA size, speed, clock stability, I/O interfaces, sample rates, dynamic range, and radio chip architecture.
  • Design and evaluate digital signal processing (DSP) algorithms for FPGA.
  • Update or create host interface software to interact with FPGAs.
  • Implement device driver software in C, C++, or other languages for a Linux environment.
  • Test and validate hardware blocks both in simulation and on target.
  • Develop and maintain documentation and ICDs for in-house IP blocks and other related components.

Qualifications
  • A Bachelor's degree (or higher) in Electrical Engineering, Computer Engineering, or related field.
  • At least three years of recent experience working with Xilinx/Altera FPGAs.
  • Experience with high-speed interfaces such as JESD204C and PCI Express.
  • Experience with RFICs such as Analog Devices AD9371.
  • Experience with Linux device drivers.
  • Ability to create test benches for system validation and benchmarking.
  • Experience using lab equipment for testing and validation.
  • Experience with evaluating SDR platforms and specifications.
  • Experience with SoC designs such as Xilinx Zynq and Xilinx Versal (preferably with AI Engine) is a plus.
  • Knowledge of PHY and MAC layers of cellular standards (e.g., GSM, LTE, 5G) is a plus.

Job Location
Chantilly, VA

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