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Ai Chip Design Rtl Jobs in Virginia (NOW HIRING)

Booz Allen Hamilton, Inc.

Embedded FPGA Engineer

Mclean, VA · On-site

$131K - $168K/yr

Experience with porting and adapting vendor RF transceiver reference designs, such as RTL, IP cores ... AI-driven automation for FPGA design, simulation, synthesis, or testing * Master's degree in ...

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Ai Chip Design Rtl information

What is an AI Chip Design RTL engineer?

AI Chip Design RTL (Register Transfer Level) engineers are specialists who design the digital logic for chips used in artificial intelligence applications. They use hardware description languages like Verilog or VHDL to create and validate the architecture and functionality of these chips before they are manufactured. Their work ensures that AI processors are efficient, high-performing, and meet the requirements of modern AI workloads. RTL engineers collaborate closely with verification, software, and hardware teams to optimize chip performance and power consumption.

What skills and qualifications are needed to thrive as an AI Chip Design RTL engineer?

To thrive as an AI Chip Design RTL Engineer, you need a solid background in digital design, computer architecture, and proficiency in Hardware Description Languages (HDLs) like Verilog or VHDL, often supported by a degree in electrical or computer engineering. Experience with simulation tools (e.g., ModelSim, Synopsys), ASIC/FPGA design flows, and relevant certifications are highly valued. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help you excel in collaborative and complex design environments. These competencies are crucial for creating efficient, reliable AI hardware that meets performance and power requirements in a fast-evolving field.

What are common challenges faced by AI Chip Design RTL engineers during the verification process?

AI Chip Design RTL engineers often encounter challenges in ensuring their designs meet complex functional and performance requirements, especially given the rapid pace of AI hardware advancements. Verification can be particularly demanding due to the need to simulate and test intricate AI workloads, manage large datasets, and debug subtle timing or logic errors. Collaboration with verification teams, system architects, and software engineers is essential to address these issues efficiently and to ensure seamless integration of the RTL code into the broader chip design. Staying up-to-date with the latest verification tools and methodologies is also crucial for success in this role.

What is the difference between Ai Chip Design Rtl vs Ai Chip Verification Engineer?

AspectAi Chip Design RtlAi Chip Verification Engineer
Primary FocusDeveloping and implementing Register Transfer Level (RTL) code for AI chipsVerifying and validating RTL designs to ensure functionality
Skills RequiredHDL languages (Verilog/VHDL), digital design, FPGA/ASIC knowledgeSimulation, testbench creation, debugging, scripting skills
Work EnvironmentDesign teams, hardware development labs, EDA toolsVerification teams, simulation environments, test setups
CertificationsHardware design certifications, FPGA/ASIC trainingVerification methodologies, UVM, SystemVerilog certifications

While Ai Chip Design Rtl focuses on creating the hardware description code for AI chips, Ai Chip Verification Engineer ensures that the RTL design functions correctly through rigorous testing. Both roles require knowledge of HDL languages and work closely within hardware development teams, but their core responsibilities differ—design versus verification.

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Ai Chip Design Rtl jobs near you
Infographic showing various Ai Chip Design Rtl job openings in Virginia as of August 2026, with employment types broken down into 4% Internship, 85% Full Time, 7% Part Time, and 4% Contract. Highlights an 91% In-person, and 9% Remote job distribution.

Senior Principal FPGA & Digital Signals Processing Engineer

Research Innovations Inc

Alexandria, VA • On-site

$200 - $250/hr

Other

Medical, Retirement, PTO

Posted 24 days ago

Job description

Position Title: Senior Principal Field Programmable Gate Array & Digital Signal Processing Engineer

Location: Hybrid, in office in Alexandria, VA

Clearance Requirement: TS/SCI

Employment Type: Full Time

Research Innovations, Inc. (RII) is breaking through the big, slow status quo with transformative technology that fundamentally improves the world. We build advanced software solutions for government and military missions, applying agile development and user-centered design to solve complex, mission-critical problems.

Dragonfly is redefining tactical SIGINT and Electronic Warfare by combining advanced RF sensing, GPU-accelerated processing, artificial intelligence, and high-performance FPGA architectures into a portable, mission-ready platform. As the Principal FPGA & DSP Engineer, you will serve as the technical leader responsible for designing and delivering the next generation of real-time FPGA-based signal processing capabilities that enable rapid spectrum awareness, signal exploitation, and electronic warfare operations. Working closely with hardware, software, AI, and RF engineering teams, you will architect high-performance firmware solutions that transform advanced algorithms into deployable capabilities supporting the Department of Defense, Intelligence Community, and allied mission partners.

WHAT YOU WILL BE DOING
  • Lead the FPGA firmware architecture for Dragonfly, defining the optimal partitioning of signal processing across FPGA, GPU, and CPU to meet mission latency, throughput, and SWaP requirements.
  • Migrate GPU-based digital signal processing algorithms into efficient FPGA implementations, including floating-to-fixed point conversion, quantization analysis, word-length optimization, and bit-accurate verification.
  • Design reusable, portable FPGA IP that supports multiple AMD/Xilinx platforms including RFSoC, Versal, UltraScale+, and Zynq.
  • Develop real-time FPGA implementations for advanced RF signal processing including digital down conversion, filtering, FFTs, channelization, synchronization, demodulation, and protocol exploitation.
  • Implement and optimize wireless protocol processing for technologies such as Wi-Fi, Bluetooth/BLE, LoRa, LTE, and 5G NR.
  • Develop FPGA capabilities supporting direction finding (DF), beamforming, geolocation, and multi-channel phase-coherent signal processing.
  • Establish FPGA verification methodologies including simulation, automated regression testing, timing closure, hardware validation, and over-the-air testing.
  • Support hardware bring-up, integration, production validation, and field testing of Dragonfly systems.
  • Serve as the technical authority for FPGA firmware and DSP architecture, conducting design reviews, mentoring engineers, and establishing engineering best practices.
  • Contribute to product roadmap development, customer engagements, technical proposals, IRAD efforts, and emerging EW/SIGINT capability development.
WHAT YOU HAVE DONE
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field; Master's or PhD preferred.
  • 10+ years of FPGA development experience supporting RF, SDR, SIGINT, radar, wireless communications, or Electronic Warfare systems.
  • Demonstrated ownership of FPGA architecture from concept through deployed production systems.
  • Active Secret clearance required; ability to obtain or maintain TS/SCI preferred.
  • Expert proficiency with VHDL and/or SystemVerilog, RTL design, pipelining, finite state machines, clock domain crossing, and timing closure.
  • Extensive experience with AMD/Xilinx development tools including Vivado, Vitis, Vitis HLS, and RFSoC or Versal platforms.
  • Strong background in digital signal processing including FFTs, digital down/up conversion, FIR/IIR/CIC filters, multirate processing, fixed-point design, CORDIC, and AGC.
  • Experience implementing high-speed interfaces including AXI, PCIe, Ethernet, DDR memory, Aurora, and JESD204B/C.
  • Proficiency with MATLAB and/or Python for algorithm development and hardware verification, along with C/C++ development in Linux environments.
  • Experience with FPGA simulation, debugging, board bring-up, and RF laboratory validation using industry-standard tools.
  • Familiarity with Git, Agile development methodologies, and cross-functional hardware/software engineering teams.
EVEN BETTER
  • Experience developing CUDA or GPU-based DSP algorithms and migrating them to FPGA implementations.
  • Experience implementing beamforming, direction finding, geolocation, MUSIC/ESPRIT, TDOA, or FDOA algorithms.
  • Knowledge of LTE, 5G NR, Wi-Fi, Bluetooth/BLE, LoRa, or other modern communications waveforms.
  • Experience with High-Level Synthesis (HLS), Simulink, MATLAB HDL Coder, or Model Composer.
  • Familiarity with RFNoC, GNU Radio, OpenCPI, SOSA, or CMOSS architectures.

#LI-TC1

At RII, we believe that diversity in our workforce is critical to our success. We strive to hire great people from a wide variety of backgrounds, not just because it’s the right thing to do, but because it makes us stronger. We work to help your intellectual passions and creativity thrive. It’s one of our core values: Let your geek flag fly.

We also offer all employees comprehensive benefits including: flexible work schedules, health insurance coverage, paid time off, 401k with a company match, paid parental leave, access to wellness programs and much more. You get this all from day one, and all paid for by RII.

  • flexible work schedules
  • health insurance coverage
  • paid time off
  • 401k with a company match
  • paid parental leave
  • access to wellness programs
  • and much more

You get this all from day one, and all paid for by RII.

It’s all part of another of our core values: Stay human. It’s why our comfortable and colorful offices such as our headquarters, include a community game room, pantry, massage chair, and an escape room, among other amenities. It’s why we have community ambassadors and regular community events.

Research Innovations Incorporated is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other characteristic protected by applicable law.

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