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Ai Chip Design Rtl Jobs in Arizona (NOW HIRING)

Intel

CPU RTL Design Engineer

Phoenix, AZ

$141K - $269K/yr

... into full-chip designs. Your expertise will be pivotal in defining architecture and ... Write RTL and optimize logic for power, performance, area, and timing goals. * Ensure design ...

Broadcom, Inc.

RTL Design Engineer

Chandler, AZ · On-site

$127K - $203K/yr

... edge AI programs on advanced nodes. Joining a world-class team of engineers with a highly ... Design convergence to timing closure utilizing RTL optimization strategies. * Conduct formal ...

Viasat, Inc.

Senior Design Verification Engineer

Tempe, AZ · On-site

$176K - $264K/yr

... AI agentic tools. You will be asked to help evaluate and deploy new technologies for design ... Working with RTL, System and software engineers to determine appropriate coverage closure for chip ...

Broadcom

RTL Design Engineer

Chandler, AZ · On-site

$127K - $203K/yr

... edge AI programs on advanced nodes. Joining a world-class team of engineers with a highly ... Design convergence to timing closure utilizing RTL optimization strategies. * Conduct formal ...

PowerLattice

Principal Digital Design Engineer

Chandler, AZ · On-site +1

$200K - $250K/yr

... AI and advanced computing. About the Role We are seeking a highly skilled and hands-on Principal ... Write, review, and integrate high-quality RTL * Lead block- and chip-level integration, resolving ...

Viasat, Inc.

Senior Design Verification Engineer

Tempe, AZ · On-site

$176K - $264K/yr

... AI agentic tools. You will be asked to help evaluate and deploy new technologies for design ... Working with RTL, System and software engineers to determine appropriate coverage closure for chip ...

Cirrus Logic

Digital Design Engineer

Chandler, AZ · On-site

$133K/yr

In this role, you will contribute to the design of system-on-chip (SoC) devices, digital signal ... Develop RTL designs using Verilog and support integration into larger SoC environments. * Design ...

Renesas Electronics

Senior Digital Engineer

Chandler, AZ · On-site +1

$133K/yr

... RTL for digital CMOS circuit design. * Strong understanding of ASIC design methodology. * Strong understanding of Lint, CDC & RDC tools. * Strong understanding of block-level & chip-level ...

New

Cirrus Logic

Staff Digital Design Engineer

Chandler, AZ · On-site

$133K/yr

In this role, you will contribute to the design of system-on-chip (SoC) devices, digital signal ... Develop RTL designs using Verilog and support integration into larger SoC environments. * Design ...

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Ai Chip Design Rtl information

What is a $900000 AI job?

A $900,000 AI job typically refers to a high-level position in artificial intelligence, such as senior AI researcher, machine learning engineer, or AI architect, often requiring advanced skills in deep learning, neural networks, and hardware design like RTL for AI chips. Such roles usually involve leadership, extensive experience, and may include stock options or bonuses, with compensation reflecting expertise and impact on AI hardware development.

What is the difference between Ai Chip Design Rtl vs Ai Chip Verification Engineer?

AspectAi Chip Design RtlAi Chip Verification Engineer
Primary FocusDeveloping and implementing Register Transfer Level (RTL) code for AI chipsVerifying and validating RTL designs to ensure functionality
Skills RequiredHDL languages (Verilog/VHDL), digital design, FPGA/ASIC knowledgeSimulation, testbench creation, debugging, scripting skills
Work EnvironmentDesign teams, hardware development labs, EDA toolsVerification teams, simulation environments, test setups
CertificationsHardware design certifications, FPGA/ASIC trainingVerification methodologies, UVM, SystemVerilog certifications

While Ai Chip Design Rtl focuses on creating the hardware description code for AI chips, Ai Chip Verification Engineer ensures that the RTL design functions correctly through rigorous testing. Both roles require knowledge of HDL languages and work closely within hardware development teams, but their core responsibilities differ—design versus verification.

Will AI replace RTL designers?

AI chip design RTL (Register Transfer Level) development involves creating hardware descriptions that require expert knowledge of digital logic and hardware architecture. While AI tools can assist in automating certain tasks like code generation and verification, they are unlikely to fully replace RTL designers, as human expertise is essential for complex decision-making, optimization, and ensuring design correctness. RTL designers will continue to play a critical role in the chip design process, often working alongside AI-assisted tools to improve efficiency and innovation.

What are some common challenges faced by AI Chip Design RTL engineers during the verification process?

AI Chip Design RTL engineers often encounter challenges in ensuring their designs meet complex functional and performance requirements, especially given the rapid pace of AI hardware advancements. Verification can be particularly demanding due to the need to simulate and test intricate AI workloads, manage large datasets, and debug subtle timing or logic errors. Collaboration with verification teams, system architects, and software engineers is essential to address these issues efficiently and to ensure seamless integration of the RTL code into the broader chip design. Staying up-to-date with the latest verification tools and methodologies is also crucial for success in this role.

Which 3 jobs will survive AI?

AI Chip Design RTL professionals are likely to continue in demand due to the specialized technical skills required for hardware description languages like Verilog and VHDL, which are less easily automated. Jobs involving complex problem-solving, system integration, and hardware-software interface design, such as hardware engineers, system architects, and verification engineers, are also expected to persist. These roles require domain expertise and critical thinking that complement AI automation capabilities.

What are AI Chip Design RTL engineers?

AI Chip Design RTL (Register Transfer Level) engineers are specialists who design the digital logic for chips used in artificial intelligence applications. They use hardware description languages like Verilog or VHDL to create and validate the architecture and functionality of these chips before they are manufactured. Their work ensures that AI processors are efficient, high-performing, and meet the requirements of modern AI workloads. RTL engineers collaborate closely with verification, software, and hardware teams to optimize chip performance and power consumption.

What is the salary of RTL design?

The salary for an RTL (Register Transfer Level) design engineer typically ranges from $80,000 to $150,000 annually, depending on experience, location, and company size. Entry-level positions may start lower, while experienced engineers with specialized skills in hardware description languages like VHDL or Verilog can earn higher salaries.

What are the key skills and qualifications needed to thrive as an AI Chip Design RTL Engineer, and why are they important?

To thrive as an AI Chip Design RTL Engineer, you need a solid background in digital design, computer architecture, and proficiency in Hardware Description Languages (HDLs) like Verilog or VHDL, often supported by a degree in electrical or computer engineering. Experience with simulation tools (e.g., ModelSim, Synopsys), ASIC/FPGA design flows, and relevant certifications are highly valued. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help you excel in collaborative and complex design environments. These competencies are crucial for creating efficient, reliable AI hardware that meets performance and power requirements in a fast-evolving field.
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Senior CPU RTL Design Engineer - Power Management

Senior CPU RTL Design Engineer - Power Management

Intel

Phoenix, AZ

$164K - $269K/yr

Full-time

Medical, Retirement, PTO

Posted 17 days ago

Intel rating

8.7

Company rating: 8.7 out of 10

Based on 145 frontline employees who took The Breakroom Quiz

10th of 141 rated electronics manufacturers

Job description

Job Details:Job Description: 

About the Role

Join Intel's CPU Design Team within the Silicon & Platform Engineering (SPE) Group, where you will help architect and deliver next-generation, power-efficient, high-performance processors.

As a Senior CPU RTL Design Engineer - Power Management, you will play a critical role in designing and delivering CPU microarchitectures with strong emphasis on power management and energy-efficient design. This role is ideal for engineers who can contribute with minimal ramp-up and bring deep expertise in low-power CPU/SoC design.

You will partner closely with architecture, verification, and physical design teams to deliver industry-leading silicon.

What You'll Do

  • Define, design, and implement CPU microarchitecture features
  • Develop and deliver RTL (SystemVerilog/Verilog) for CPU IP blocks
  • Drive power, performance, and area (PPA) optimization, with a strong focus on:
    • Power-aware RTL design
    • Energy-efficient architectures
  • Design and validate multi-clock domain and CDC solutions
  • Contribute to CPU power management features, including:
    • Dynamic voltage and frequency scaling (DVFS)
    • Power/thermal management
    • Reset flows and power state transitions (P/C states)
  • Debug complex RTL and collaborate with verification teams
  • Partner with SoC integration teams for full-chip delivery
  • Contribute to design methodology improvements and scalability

Behavioral Traits that we are looking for:

  • Ownership & Accountability - operates independently with minimal guidance
  • Depth over keywords - demonstrates hands-on expertise (not just tool exposure)
  • Problem-solving rigor - able to debug and resolve complex design issues
  • Collaboration mindset - works effectively across cross-functional teams
  • Technical leadership - influences design decisions and drives best practices
  • Bias for action & urgency - maintains strong execution pace in fast-moving environment
Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Note:

For information on Intel's immigration sponsorship guidelines, please see

Intel U.S. Immigration Sponsorship Information

Minimum Qualifications and Experience:

Bachelor's degree in Electrical/Computer Engineering, Computer Science or related filed with 9+ years of relevant experience. Or a Master's degree in the same field with 7+ years of experience.

You experience mentioned above must be in the following:

  • Experience with power management concepts (e.g., DVFS, power states, budgeting)
  • Experience in low-power / power-aware CPU or SoC RTL design
  • RTL development (Verilog/SystemVerilog)
  • Debug and system-level design understanding

Preferred Qualifications and Experience:

  • Experience in multi-clock domain / CDC design
  • Comprehensive knowledge of Intel Architecture ISA and system architecture, including x86 assembly language.
  • Experience with high-speed circuit design and optimization, specifically for datapath, circuits, and arrays.
  • Familiarity with circuit planning and timing convergence processes.
  • Ability to leverage broad understanding of CPU architecture to deliver impactful solutions.
  • Proficient with static timing analysis, UPF and lint checks.
Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Texas, AustinAdditional Locations:US, Arizona, PhoenixBusiness group:Intel makes possible the most amazing experiences of the future. You may know us for our processors. But we do so much more. Intel invents at the boundaries of technology to make amazing experiences possible for business and society, and for every person on Earth. Harnessing the capability of the cloud, the ubiquity of the Internet of Things, the latest advances in memory and programmable solutions, and the promise of always-on 5G connectivity, Intel is disrupting industries and solving global challenges. Leading on policy, diversity, inclusion, education and sustainability, we create value for our stockholders, customers, and society.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $164,470.00-269,100.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968

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