Lead CPU Design Engineer
Phoenix, AZ · On-site
... chip (SoC) designs. Join us in transforming the world through technology while honing your ... Develop the logic design and register transfer level (RTL) coding for CPU features. * Perform ...
Phoenix, AZ · On-site
... chip (SoC) designs. Join us in transforming the world through technology while honing your ... Develop the logic design and register transfer level (RTL) coding for CPU features. * Perform ...
Phoenix, AZ · On-site
... chip (SoC) designs. Join us in transforming the world through technology while honing your ... Develop the logic design and register transfer level (RTL) coding for CPU features. * Perform ...
... chip (SoC) designs. Join us in transforming the world through technology while honing your ... Develop the logic design and register transfer level (RTL) coding for CPU features. * Perform ...
... chip (SoC) designs. Join us in transforming the world through technology while honing your ... Develop the logic design and register transfer level (RTL) coding for CPU features. * Perform ...
$105.65K - $200.34K/yr
Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU required to generate cell libraries, functional units, and the CPU IP block for integration in full chip ...
$105.65K - $200.34K/yr
Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU required to generate cell libraries, functional units, and the CPU IP block for integration in full chip ...
Phoenix, AZ · On-site
Develop logic design, register transfer level (RTL) coding, and simulation for CPU components, including cell libraries, functional units, and CPU IP blocks for full-chip integration. * Optimize ...
Phoenix, AZ · On-site
Develop logic design, register transfer level (RTL) coding, and simulation for CPU components, including cell libraries, functional units, and CPU IP blocks for full-chip integration. * Optimize ...
A leading technology company is seeking a SoC Logic Design Engineer to develop cutting-edge System-on-Chip designs that will drive innovation in computing. Responsibilities include creating RTL ...
A leading technology company is seeking a SoC Logic Design Engineer to develop cutting-edge System-on-Chip designs that will drive innovation in computing. Responsibilities include creating RTL ...
Chandler, AZ · On-site
$127.10K - $203.40K/yr
... edge AI programs on advanced nodes. Joining a world-class team of engineers with a highly ... Design convergence to timing closure utilizing RTL optimization strategies. * Conduct formal ...
Chandler, AZ · On-site
$127.10K - $203.40K/yr
... edge AI programs on advanced nodes. Joining a world-class team of engineers with a highly ... Design convergence to timing closure utilizing RTL optimization strategies. * Conduct formal ...
$127.10K - $203.40K/yr
... edge AI programs on advanced nodes. Joining a world-class team of engineers with a highly ... Design convergence to timing closure utilizing RTL optimization strategies. * Conduct formal ...
$127.10K - $203.40K/yr
... edge AI programs on advanced nodes. Joining a world-class team of engineers with a highly ... Design convergence to timing closure utilizing RTL optimization strategies. * Conduct formal ...
Scottsdale, AZ · On-site
$135.40K - $150.21K/yr
Proficiency in VHDL and/or Verilog for reading and understanding design RTL * Experience with waveform debugging and signal-level analysis * Understanding of AXI-Stream, AXI4, and similar on-chip bus ...
Scottsdale, AZ · On-site
$135.40K - $150.21K/yr
Proficiency in VHDL and/or Verilog for reading and understanding design RTL * Experience with waveform debugging and signal-level analysis * Understanding of AXI-Stream, AXI4, and similar on-chip bus ...
Scottsdale, AZ · On-site
$135.40K - $150.21K/yr
Proficiency in VHDL and/or Verilog for reading and understanding design RTL * Experience with waveform debugging and signal-level analysis * Understanding of AXI-Stream, AXI4, and similar on-chip bus ...
Scottsdale, AZ · On-site
$135.40K - $150.21K/yr
Proficiency in VHDL and/or Verilog for reading and understanding design RTL * Experience with waveform debugging and signal-level analysis * Understanding of AXI-Stream, AXI4, and similar on-chip bus ...
Chandler, AZ · On-site
$138.90K - $169.50K/yr
Debug RTL and testbench issues, perform root cause analysis, and collaborate with design and ... Continuously improve verification methodologies by leveraging AI/ML automation to reduce the cycle ...
Chandler, AZ · On-site
$138.90K - $169.50K/yr
Debug RTL and testbench issues, perform root cause analysis, and collaborate with design and ... Continuously improve verification methodologies by leveraging AI/ML automation to reduce the cycle ...
$133.90K - $163.50K/yr
Debug RTL and testbench issues, perform root cause analysis, and collaborate with design and ... Continuously improve verification methodologies by leveraging AI/ML automation to reduce the cycle ...
$133.90K - $163.50K/yr
Debug RTL and testbench issues, perform root cause analysis, and collaborate with design and ... Continuously improve verification methodologies by leveraging AI/ML automation to reduce the cycle ...
Chandler, AZ · On-site
$133.90K - $163.50K/yr
Debug RTL and testbench issues, perform root cause analysis, and collaborate with design and ... Continuously improve verification methodologies by leveraging AI/ML automation to reduce the cycle ...
Chandler, AZ · On-site
$133.90K - $163.50K/yr
Debug RTL and testbench issues, perform root cause analysis, and collaborate with design and ... Continuously improve verification methodologies by leveraging AI/ML automation to reduce the cycle ...
Chandler, AZ · On-site
$133.90K/yr
In this role, you will contribute to the design of system-on-chip (SoC) devices, digital signal ... Develop RTL designs using Verilog and support integration into larger SoC environments. * Design ...
Chandler, AZ · On-site
$133.90K/yr
In this role, you will contribute to the design of system-on-chip (SoC) devices, digital signal ... Develop RTL designs using Verilog and support integration into larger SoC environments. * Design ...
Chandler, AZ · On-site
$133.90K/yr
In this role, you will contribute to the design of system-on-chip (SoC) devices, digital signal ... Develop RTL designs using Verilog and support integration into larger SoC environments. * Design ...
Chandler, AZ · On-site
$133.90K/yr
In this role, you will contribute to the design of system-on-chip (SoC) devices, digital signal ... Develop RTL designs using Verilog and support integration into larger SoC environments. * Design ...
Chandler, AZ · On-site
$133.90K/yr
In this role, you will contribute to the design of system-on-chip (SoC) devices, digital signal ... Develop RTL designs using Verilog and support integration into larger SoC environments. * Design ...
Chandler, AZ · On-site
$133.90K/yr
In this role, you will contribute to the design of system-on-chip (SoC) devices, digital signal ... Develop RTL designs using Verilog and support integration into larger SoC environments. * Design ...
Chandler, AZ · On-site
$133.90K/yr
In this role, you will contribute to the design of system-on-chip (SoC) devices, digital signal ... Develop RTL designs using Verilog and support integration into larger SoC environments. * Design ...
Chandler, AZ · On-site
$133.90K/yr
In this role, you will contribute to the design of system-on-chip (SoC) devices, digital signal ... Develop RTL designs using Verilog and support integration into larger SoC environments. * Design ...
... RTL design, design verification, synthesis, STA, and Test using an industry leading ASIC design ... Support chip-level integration, verification, and validation teams * Provide design documentation ...
... RTL design, design verification, synthesis, STA, and Test using an industry leading ASIC design ... Support chip-level integration, verification, and validation teams * Provide design documentation ...
... RTL design, design verification, synthesis, STA, and Test using an industry leading ASIC design ... Support chip-level integration, verification, and validation teams * Provide design documentation ...
... RTL design, design verification, synthesis, STA, and Test using an industry leading ASIC design ... Support chip-level integration, verification, and validation teams * Provide design documentation ...
Chandler, AZ · On-site
$133.90K/yr
Lead RTL digital design for complex blocks and subsystems with AI/ML-assisted methodologies * Apply AI/ML techniques to enhance digital design workflows such as synthesis, timing closure, and ...
Chandler, AZ · On-site
$133.90K/yr
Lead RTL digital design for complex blocks and subsystems with AI/ML-assisted methodologies * Apply AI/ML techniques to enhance digital design workflows such as synthesis, timing closure, and ...
In this role, you will be responsible for the design of System-on-Chip (SOC) solutions for wireless ... Proficient in RTL design (Verilog/System Verilog), Low-power design, synthesis, timing constraint ...
In this role, you will be responsible for the design of System-on-Chip (SOC) solutions for wireless ... Proficient in RTL design (Verilog/System Verilog), Low-power design, synthesis, timing constraint ...
$79.9K - $89.1K
0% of jobs
$89.1K - $98.3K
0% of jobs
$98.3K - $107.5K
1% of jobs
$107.5K - $116.8K
0% of jobs
$116.8K - $126K
0% of jobs
$129.8K is the 25th percentile. Wages below this are outliers.
$126K - $135.2K
57% of jobs
$139.1K is the 75th percentile. Wages above this are outliers.
$135.2K - $144.4K
38% of jobs
$144.4K - $153.6K
0% of jobs
$153.6K - $162.8K
1% of jobs
$162.8K - $172K
1% of jobs
$172K - $181.2K
1% of jobs
$79.9K
$138.4K
$181.2K
| Aspect | Ai Chip Design Rtl | Ai Chip Verification Engineer |
|---|---|---|
| Primary Focus | Developing and implementing Register Transfer Level (RTL) code for AI chips | Verifying and validating RTL designs to ensure functionality |
| Skills Required | HDL languages (Verilog/VHDL), digital design, FPGA/ASIC knowledge | Simulation, testbench creation, debugging, scripting skills |
| Work Environment | Design teams, hardware development labs, EDA tools | Verification teams, simulation environments, test setups |
| Certifications | Hardware design certifications, FPGA/ASIC training | Verification methodologies, UVM, SystemVerilog certifications |
While Ai Chip Design Rtl focuses on creating the hardware description code for AI chips, Ai Chip Verification Engineer ensures that the RTL design functions correctly through rigorous testing. Both roles require knowledge of HDL languages and work closely within hardware development teams, but their core responsibilities differ—design versus verification.
Full-time
Medical, Retirement, PTO
Posted 11 days ago
8.8
Based on 143 frontline employees who took The Breakroom Quiz
9th of 137 rated electronics manufacturers
Sourced by ZipRecruiter
Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth
Manufacturing
10,000+ Employees
Santa Clara, CA, US
1968