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Ai Chip Design Rtl Jobs in Phoenix, AZ (NOW HIRING)

Viasat, Inc.

Hardware Design Engineer

Tempe, AZ · On-site

$164K - $246K/yr

Develop, simulate, and verify FPGA RTL (using SystemVerilog, Verilog, or VHDL) for control, data ... Familiarity with Git, CI/CD practices, and AI development tools (Claude Code, Copilot). Salary ...

Viasat, Inc.

Hardware Design Engineer

Tempe, AZ · On-site

$164K - $246K/yr

Develop, simulate, and verify FPGA RTL (using SystemVerilog, Verilog, or VHDL) for control, data ... Familiarity with Git, CI/CD practices, and AI development tools (Claude Code, Copilot). Salary ...

Viasat

Hardware Design Engineer

Tempe, AZ · On-site

$133 - $247/hr

Develop, simulate, and verify FPGA RTL (using SystemVerilog, Verilog, or VHDL) for control, data ... Familiarity with Git, CI/CD practices, and AI development tools (Claude Code, Copilot). Salary ...

Axon

Senior FPGA & Firmware Engineer - SDR

Scottsdale, AZ · On-site

$120K - $159K/yr

Architect and implement on-chip interfaces and data movement: AXI4 / AXI4-Stream, DMA, register ... model-based design * Experience applying AI coding assistants to FPGA/HDL workflows - RTL ...

Axon

Senior FPGA & Firmware Engineer - SDR

Scottsdale, AZ · On-site

$120K - $159K/yr

Architect and implement on-chip interfaces and data movement: AXI4 / AXI4-Stream, DMA, register ... model-based design * Experience applying AI coding assistants to FPGA/HDL workflows - RTL ...

YO AI Labs

Hardware Expert - Remote

Phoenix, AZ · Remote

$50 - $100/hr

... support an AI training project involving technical drawings and precise 3D modeling. Key ... AutoCAD * CAD * Python * RTL * 3D Mechanical Modeling * Computational Geometry Qualifications

Intel

Senior CPU Design Verification Engineer

Phoenix, AZ · On-site

$135K - $164K/yr

From personal computing and AI to cloud-scale data centers and edge platforms, our processors power ... Debug and rootcause complex RTL, microarchitecture, and integration issues; drive issues to ...

black.ai

Substrate IC Package Design Engineer

Tempe, AZ · On-site

$130 - $160/hr

... design of advanced substrate IC packages and multi-layered interposers. You will play a ... chip-to-chip integration approaches. Working at the intersection of electrical, thermal, and ...

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Ai Chip Design Rtl information

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$79.9K

$138.4K

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How much do ai chip design rtl jobs pay per year?

As of Sep 7, 2026, the average yearly pay for ai chip design rtl in Phoenix, AZ is $138,380.00, according to ZipRecruiter salary data. Most workers in this role earn between $135,000.00 and $135,000.00 per year, depending on experience, location, and employer.

What is an AI Chip Design RTL engineer?

AI Chip Design RTL (Register Transfer Level) engineers are specialists who design the digital logic for chips used in artificial intelligence applications. They use hardware description languages like Verilog or VHDL to create and validate the architecture and functionality of these chips before they are manufactured. Their work ensures that AI processors are efficient, high-performing, and meet the requirements of modern AI workloads. RTL engineers collaborate closely with verification, software, and hardware teams to optimize chip performance and power consumption.

What skills and qualifications are needed to thrive as an AI Chip Design RTL engineer?

To thrive as an AI Chip Design RTL Engineer, you need a solid background in digital design, computer architecture, and proficiency in Hardware Description Languages (HDLs) like Verilog or VHDL, often supported by a degree in electrical or computer engineering. Experience with simulation tools (e.g., ModelSim, Synopsys), ASIC/FPGA design flows, and relevant certifications are highly valued. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help you excel in collaborative and complex design environments. These competencies are crucial for creating efficient, reliable AI hardware that meets performance and power requirements in a fast-evolving field.

What are common challenges faced by AI Chip Design RTL engineers during the verification process?

AI Chip Design RTL engineers often encounter challenges in ensuring their designs meet complex functional and performance requirements, especially given the rapid pace of AI hardware advancements. Verification can be particularly demanding due to the need to simulate and test intricate AI workloads, manage large datasets, and debug subtle timing or logic errors. Collaboration with verification teams, system architects, and software engineers is essential to address these issues efficiently and to ensure seamless integration of the RTL code into the broader chip design. Staying up-to-date with the latest verification tools and methodologies is also crucial for success in this role.

What is the difference between Ai Chip Design Rtl vs Ai Chip Verification Engineer?

AspectAi Chip Design RtlAi Chip Verification Engineer
Primary FocusDeveloping and implementing Register Transfer Level (RTL) code for AI chipsVerifying and validating RTL designs to ensure functionality
Skills RequiredHDL languages (Verilog/VHDL), digital design, FPGA/ASIC knowledgeSimulation, testbench creation, debugging, scripting skills
Work EnvironmentDesign teams, hardware development labs, EDA toolsVerification teams, simulation environments, test setups
CertificationsHardware design certifications, FPGA/ASIC trainingVerification methodologies, UVM, SystemVerilog certifications

While Ai Chip Design Rtl focuses on creating the hardware description code for AI chips, Ai Chip Verification Engineer ensures that the RTL design functions correctly through rigorous testing. Both roles require knowledge of HDL languages and work closely within hardware development teams, but their core responsibilities differ—design versus verification.

What are popular job titles related to Ai Chip Design Rtl jobs in Phoenix, AZ?

For Ai Chip Design Rtl jobs in Phoenix, AZ, the most frequently searched job titles are:

What job categories do people searching Ai Chip Design Rtl jobs in Phoenix, AZ look for?

The top searched job categories for Ai Chip Design Rtl jobs in Phoenix, AZ are:

Ai Chip Design Rtl jobs near you

Hardware Design Engineer

Viasat, Inc.

Tempe, AZ • On-site

$164K - $246K/yr

Full-time

Posted 24 days ago

Viasat rating

7.0

Company rating: 7.0 out of 10

Based on 12 frontline employees who took The Breakroom Quiz

69th of 101 rated telecommunications companies

Job description

About us
One team. Global challenges. Infinite opportunities. At Viasat, we're on a mission to deliver connections with the capacity to change the world. For more than 35 years, Viasat has helped shape how consumers, businesses, governments and militaries around the globe communicate. We're looking for people who think big, act fearlessly, and create an inclusive environment that drives positive impact to join our team.
What you'll do
As a Hardware Engineer, you will help build advanced digital processing systems, high-speed digital boards, and FPGA-based subsystems. These components serve space-based and critical communication platforms.
You will serve as a key technical contributor, bridging the hardware-firmware boundary by owning the hardware lifecycle of complex board builds. This includes high-speed digital circuit development, SoC integration, and mixed-signal circuit crafting with high-resolution ADC/DAC interfaces. At the same time, you will develop, simulate, and implement high-speed signal-processing algorithms and network protocols in FPGAs.
Your responsibility will span the entire product development lifecycle from early conceptual requirements, block diagrams, and synthesizable RTL development (SystemVerilog/VHDL), through hardware-firmware co-design, board-level bring-up, and laboratory integration, all the way to worst-case analysis (WCA), power/signal integrity verification, and flight qualification in a rigorous space and flight environment.
The day-to-day
  • Build and implement high-speed digital boards, including crafting detailed circuit diagrams and layout guidelines.
  • Develop, simulate, and verify FPGA RTL (using SystemVerilog, Verilog, or VHDL) for control, data processing, and communication functions.
  • Integrate and deploy firmware onto FPGA and FPGA SoC platforms.
  • Design high-speed interfaces (DDR4, SERDES, UART, I2C, SPI, LVDS) and perform signal/power integrity simulations using HyperLynx.
  • Conduct worst-case analysis (WCA) to verify electrical design margins across space environment conditions.
  • Lead laboratory board bring-up, hardware/firmware integration, and debug using logic analyzers, oscilloscopes, and spectrum analyzers.
  • Apply flight hardware and firmware design practices, working within radiation-tolerant, high-reliability component and thermal constraints.
  • Author and maintain comprehensive design documentation, including schematics, block diagrams, testbenches, and interface control documents.

What you'll need
  • Bachelor's Degree or equivalent experience in Electrical Engineering, Computer Engineering, or a related field.
  • 4+ years of combined experience in high-speed digital board design and FPGA/RTL development.
  • Proficiency in writing synthesizable RTL in SystemVerilog, Verilog, or VHDL.
  • Hands-on experience with FPGA design suites and EDA tools (e.g., AMD/Xilinx Vivado, Intel/Altera Quartus, Synopsys/Synplify).
  • Hands-on experience with tools to build captures (e.g., Mentor Xpedition, Cadence, or Altium).
  • Strong laboratory debugging skills integrating firmware onto physical target boards.
  • US citizenship.
  • Ability to travel up to 10%.

What will help you on the job
  • Master's Degree in Electrical Engineering (MSEE).
  • Experience with space-grade FPGAs (Xilinx Radiation Tolerant, Microchip RTG4, or equivalent).
  • Experience with FPGA simulation and testbench development (ModelSim, Questa, etc.).
  • Familiarity with scripting languages (Python, TCL, or Perl) for automation.
  • Experience with EEE-INST-002, NASA, or ESA parts selection, screening, and derating guidelines.
  • Familiarity with radiation effects on electronics (TID, SEE, SEL).
  • Familiarity with Git, CI/CD practices, and AI development tools (Claude Code, Copilot).

Salary range
$132,500.00 - $209,500.00 / annually.For specific work locations within San Jose, the San Francisco Bay area and New York City metropolitan area, the base pay range for this role is $164,500.00- $246,500.00/ annually
At Viasat, we consider many factors when it comes to compensation, including the scope of the position as well as your background and experience. Base pay may vary depending on job-related knowledge, skills, and experience. Additional cash or stock incentives may be provided as part of the compensation package, in addition to a range of medical, financial, and/or other benefits, dependent on the position offered. Learn more about Viasat's comprehensive benefit offerings that are focused on your holistic health and wellness at https://careers.viasat.com/benefits.
EEO Statement
Viasat is proud to be an equal opportunity employer, seeking to create a welcoming and diverse environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, gender identity or expression, sexual orientation, national origin, ancestry, physical or mental disability, medical condition, marital status, genetics, age, or veteran status or any other applicable legally protected status or characteristic. If you would like to request an accommodation on the basis of disability for completing this on-line application, please click here.

What Viasat employees say

Pay

Benefits

Hours and flexibility

Workplace

Get the full story on Breakroom

ViaSat logo

About ViaSat

Sourced by ZipRecruiter

At Viasat, we're on a mission to deliver connections with the capacity to change the world. For more than 35 years, Viasat has helped shape how consumers, businesses, governments and militaries around the globe communicate.

Industry

Telecommunications

Company size

5,001 - 10,000 Employees

Headquarters location

Carlsbad, CA, US

Year founded

1986

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