ZipRecruiter

Log In

1

Asic Verification Engineer Jobs in Arizona (NOW HIRING)

Cirrus Logic

Design Verification Engineer

Chandler, AZ · On-site

$133K - $163K/yr

For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal ... Significant industry experience in silicon design and/or ASIC verification. * Strong proficiency ...

Cirrus Logic

Staff Design Verification Engineer

Chandler, AZ · On-site

$133K - $163K/yr

For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal ... Significant industry experience in silicon design and/or ASIC verification. * Strong proficiency ...

Intel

IP Design Verification Engineer

Phoenix, AZ

$141K - $200K/yr

Join Intel as a Mixed Signal Design Verification Engineer and play a critical role in shaping the ... Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom ...

AVTC Group

FPGA Engineer

Tucson, AZ · On-site

$122K - $157K/yr

FPGA Engineer Develop FPGA designs including: Xilinx, Altera,and Microsemi. Designs are implemented ... ASIC verification (SystemVerilog coding with UVM) • Xilinx or Microsemi devices and flow tools ...

VertuCom

FPGA Engineer with Security Clearance

Tucson, AZ · On-site

$105K - $145K/yr

FPGA Engineer Develop FPGA designs including: Xilinx, Altera, and Microsemi. Designs are ... ASIC verification (SystemVerilog coding with UVM) • Xilinx or Microsemi devices and flow tools ...

New

next page

Showing results 1-20

All JobsAsic Verification Engineer JobsAsic Verification Engineer Jobs in Arizona

Asic Verification Engineer information

See Arizona salary details

$82K

$145.4K

$192.9K

How much do asic verification engineer jobs pay per year?

As of Jul 18, 2026, the average yearly pay for asic verification engineer in Arizona is $145,446.00, according to ZipRecruiter salary data. Most workers in this role earn between $126,700.00 and $163,500.00 per year, depending on experience, location, and employer.

What are some common challenges faced by ASIC Verification Engineers during the verification process?

ASIC Verification Engineers often encounter challenges such as dealing with complex designs, debugging intricate issues, and ensuring thorough coverage of all design specifications. Coordinating with design and RTL teams to clarify requirements and resolve discrepancies is a frequent part of the job. Additionally, managing tight project timelines while maintaining high verification quality requires effective time management and strong communication skills. Continuous learning is also important, as verification methodologies and tools evolve rapidly in this field.

What are the key skills and qualifications needed to thrive as an ASIC Verification Engineer, and why are they important?

To thrive as an ASIC Verification Engineer, you need a solid background in digital design, computer architecture, and verification methodologies, typically supported by a degree in electrical engineering or a related field. Familiarity with tools and languages like SystemVerilog, UVM, simulation environments, and waveform viewers is essential, and certifications in verification or design may be beneficial. Strong analytical thinking, attention to detail, and effective communication are crucial soft skills for debugging complex designs and collaborating with design teams. These skills and qualities are vital to ensure that ASIC designs are thoroughly tested, compliant with specifications, and delivered with high quality and reliability.

What is the salary of ASIC design verification engineer?

The salary of an ASIC verification engineer typically ranges from $80,000 to $150,000 annually, depending on experience, location, and company size. Entry-level positions may start lower, while experienced engineers with skills in SystemVerilog and UVM can earn higher salaries. Certifications and proficiency with verification tools can also influence compensation.

What is an ASIC Verification Engineer?

An ASIC Verification Engineer is a professional who specializes in testing and validating the design of Application-Specific Integrated Circuits (ASICs) to ensure they function correctly according to specifications. They develop testbenches, write test cases, and use simulation tools to detect and debug design errors before the chip is manufactured. Their work is critical in preventing costly mistakes and ensuring the final product meets performance and reliability standards. ASIC Verification Engineers often collaborate closely with design engineers to understand requirements and resolve issues.

What is the difference between Asic Verification Engineer vs Digital Design Engineer?

AspectAsic Verification EngineerDigital Design Engineer
Primary FocusVerifying ASIC designs for correctness and functionalityDesigning digital circuits and architectures
Skills & CertificationsHardware description languages (HDL), verification tools, scriptingHDL, digital logic, circuit design
Work EnvironmentVerification labs, simulation environmentsDesign teams, CAD tools, prototyping labs
Industry UsageSemiconductor, electronics manufacturingSemiconductor, consumer electronics, computing

While both roles require expertise in HDL and semiconductor industry experience, Asic Verification Engineers focus on testing and validating ASIC designs, ensuring they meet specifications. Digital Design Engineers primarily create and develop digital circuits. Both roles are essential in the chip development process but differ in their core responsibilities and daily tasks.

How much do ASIC engineers make?

ASIC verification engineers typically earn between $80,000 and $150,000 annually, depending on experience, location, and company size. Entry-level positions may start lower, while senior roles with specialized skills in hardware description languages and verification tools can command higher salaries.

What engineer makes $500,000 a year?

Highly experienced ASIC Verification Engineers or senior engineers in specialized fields can earn $500,000 or more annually, especially with extensive expertise, advanced certifications, and leadership roles. Compensation varies based on industry, location, and company size, with top-tier professionals often receiving significant bonuses and stock options.

Are ASIC engineers in demand?

ASIC verification engineers are in high demand due to the growth of semiconductor and electronics industries, with companies seeking skilled professionals to develop and verify complex integrated circuits. Proficiency in hardware description languages like Verilog or VHDL and experience with verification tools increase employability in this field.

What Is an ASIC Verification Engineer?

An ASIC verification engineer works with system designers and architects to test performance and validate hardware components and systems. You plan and develop a verification environment while coordinating with developers and architects throughout the design process. Your duties involve working closely with these other teams during the design process. Your responsibilities may include using computer hardware languages such as Verilog. In this career, you work on hardware design and use algorithms, data structure analysis, and other advanced design techniques.

More about Asic Verification Engineer jobs
What are the most commonly searched types of Asic Verification Engineer jobs in Arizona? The most popular types of Asic Verification Engineer jobs in Arizona are:
What are popular job titles related to Asic Verification Engineer jobs in Arizona? For Asic Verification Engineer jobs in Arizona, the most frequently searched job titles are:
What job categories do people searching Asic Verification Engineer jobs in Arizona look for? The top searched job categories for Asic Verification Engineer jobs in Arizona are:
What cities in Arizona are hiring for Asic Verification Engineer jobs? Cities in Arizona with the most Asic Verification Engineer job openings:
What are popular job titles related to Asic Verification Engineer jobs in AZ? For Asic Verification Engineer jobs in AZ, the most frequently searched job titles are:
Asic Verification Engineer jobs near you
Infographic showing various Asic Verification Engineer job openings in Arizona as of July 2026, with employment types broken down into 1% Locum Tenens, 94% Full Time, 3% Part Time, and 2% Contract. Highlights an 89% Physical, 6% Hybrid, and 5% Remote job distribution, with an average salary of $145,446 per year, or $69.9 per hour.
Design Verification Engineer

Design Verification Engineer

Cirrus Logic

Chandler, AZ • On-site

$133K - $163K/yr

Full-time

Re-posted 5 days ago

Job description

For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands. Cirrus Logic is also known for its award-winning culture, which was built on a foundation of inclusion and fairness, meaningful community engagement, and delivering enjoyable employee experiences at every turn. But we couldn't do it without our extraordinary workforce - and that's where you come in. Join our team and help us continue to make Cirrus Logic an exceptional place to grow your career!
We are seeking an experienced and innovative Design Verification Engineer to join a world-class silicon design verification team. This role partners closely with digital and analog designers, systems and applications engineers, firmware/software teams, and manufacturing test to deliver high-quality mixed-signal IC solutions. You will be responsible for end-to-end functional verification across block-level and chip-level designs, contributing to advanced verification methodologies and infrastructure.
This position offers exposure to multiple verification domains including UVM-based testbench development, formal verification, hardware emulation/acceleration, gate-level simulations, and software-driven verification in a highly collaborative and technically rigorous environment.
Responsibilities:
  • Develop comprehensive verification plans aligned with design and system requirements.
  • Perform functional verification of custom mixed-signal ASICs at block and chip level.
  • Design and implement UVM-based testbenches, including infrastructure, scoreboards, checkers, and assertions.
  • Create directed and constrained-random test suites to ensure robust functional coverage.
  • Implement, analyze, and drive functional and code coverage, including coverage closure.
  • Conduct failure analysis, regression triage, and debug, resolving functional and timing-related issues.
  • Run and debug gate-level simulations, including timing violations and back-annotation issues.
  • Develop and maintain digital and mixed-signal behavioral models to support verification.
  • Support verification flow and infrastructure development, including regressions and automation.
  • Collaborate cross-functionally with digital/analog design, systems, applications, firmware/software, and manufacturing test teams.
  • Contribute to both pre-silicon verification and post-silicon validation efforts.
  • Proactively improve verification methodologies, processes, and best practices.

Required Knowledge, Skills, and Experience:
  • Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or a related field.
    • Bachelor's with 2+ years of relevant experience.
    • Master's with 0+ years of relevant experience.
  • Significant industry experience in silicon design and/or ASIC verification.
  • Strong proficiency with HDLs: Verilog and/or VHDL.
  • Strong proficiency with HVLs: SystemVerilog with UVM (or OVM/AVM/Vera).
  • Solid understanding of digital design principles and system architecture.
  • Hands-on experience with:
    • Testbench architecture and stimulus generation
    • Regression execution and debug
    • Coverage analysis and closure
  • Ability to work effectively in a cross-disciplinary, team-oriented environment.

Preferred Knowledge, Skills, and Experience:
  • Experience verifying mixed-signal ASICs in complex SoC environments.
  • Knowledge of signal processing concepts relevant to mixed-signal designs.
  • Experience with SystemVerilog Assertions (SVA).
  • Exposure to or hands-on experience with:
    • Formal verification
    • Hardware emulation or acceleration
    • Software-driven verification
  • Demonstrated ability to evaluate, debug, and improve verification flows and methodologies.

#LI-Hybrid
#LI-EK1
#HOTT
Export control restrictions based upon applicable laws and regulations would prohibit candidates who are nationals of certain embargoed countries from working in this position without Cirrus Logic first obtaining an export license. Candidates for this role must be able to access technical data without a requirement for an export license. We are unable to sponsor or obtain export licenses for this role.
Cirrus Logic strives to select the best qualified applicant for any opening. Different approaches, ideas and points of view are both valued and respected. Employment decisions are made on the basis of job-related criteria without regard to race, color, religion, sex, national origin, age, protected veteran or disabled status, genetic information, or any other classification protected by applicable law.

Apply