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Design Verification Jobs in Arizona (NOW HIRING)

Design Verification Engineer

Chandler, AZ · On-site

$133K - $163K/yr

We are seeking an experienced and innovative Design Verification Engineer to join a world-class silicon design verification team. This role partners closely with digital and analog designers, systems ...

AZ · On-site

$176K - $264K/yr

As a Design Verification Engineer, you will be part of a verification team responsible for the full cycle of RTL verification for FPGA and ASIC designs. You will be responsible for: * Design ...

Staff Design Verification Engineer

Chandler, AZ · On-site

$133K - $163K/yr

We are seeking an experienced and innovative Design Verification Engineer to join a world-class silicon design verification team. This role partners closely with digital and analog designers, systems ...

Senior Design Verification Engineer

Chandler, AZ · On-site

$133K - $163K/yr

We are seeking an experienced and innovative Design Verification Engineer to join a world-class silicon design verification team. This role partners closely with digital and analog designers, systems ...

Senior CPU Design Verification Engineer

Phoenix, AZ · On-site

$135K - $164K/yr

What You'll Do As a Senior CPU Design Verification Engineer you will play a critical role in ensuring architectural correctness, functional robustness, and powerefficient performance of Intel's Atom ...

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Showing results 1-20

Design Verification information

See Arizona salary details

$98.3K

$139K

$155.6K

How much do design verification jobs pay per year?

As of Jun 12, 2026, the average yearly pay for design verification in Arizona is $138,991.00, according to ZipRecruiter salary data. Most workers in this role earn between $126,700.00 and $154,700.00 per year, depending on experience, location, and employer.

What is the difference between Design Verification vs Design Validation?

AspectDesign VerificationDesign Validation
PurposeEnsures the design meets specified requirements through testing and analysisConfirms the final product fulfills user needs and intended use
TimingDuring the development phaseAfter the product is developed and before release
MethodsInspections, reviews, testing, analysisUser testing, field trials, real-world testing
FocusDesign correctness and complianceProduct effectiveness and user satisfaction

While Design Verification checks if the design meets specified requirements during development, Design Validation ensures the final product performs effectively in real-world conditions. Both are essential steps in the product development process to deliver a reliable and user-centered product.

What are design verification engineers?

Design verification engineers are professionals who ensure that hardware or software designs meet their intended specifications and function correctly before production or release. They develop and execute tests, write verification plans, create simulation environments, and identify design flaws or errors. Their work is critical in industries like semiconductor, electronics, and software development to prevent costly mistakes and ensure high-quality products. Design verification engineers often work closely with design and validation teams throughout the product development lifecycle.

What are the key skills and qualifications needed to thrive as a Design Verification Engineer, and why are they important?

To thrive as a Design Verification Engineer, you need a solid background in digital design, verification methodologies, and programming languages like SystemVerilog, typically supported by a degree in electrical engineering or a related field. Familiarity with verification tools such as UVM, simulation environments, and EDA software is essential, along with knowledge of scripting languages like Python or Perl. Strong analytical thinking, attention to detail, and effective teamwork are standout soft skills in this role. These skills ensure accurate validation of complex hardware designs, reducing errors and supporting reliable product development cycles.

What are some common challenges faced by Design Verification engineers, and how can they be addressed?

Design Verification engineers often encounter challenges such as managing complex testbenches, debugging intricate corner cases, and ensuring coverage completeness within tight project timelines. To address these, it’s important to have strong scripting skills, collaborate closely with design and validation teams, and make effective use of verification methodologies like UVM. Regular communication and review cycles also help catch issues early and improve overall verification quality.
What are the most commonly searched types of Design Verification jobs in Arizona? The most popular types of Design Verification jobs in Arizona are:
What cities in Arizona are hiring for Design Verification jobs? Cities in Arizona with the most Design Verification job openings:
Infographic showing various Design Verification job openings in Arizona as of June 2026, with employment types broken down into 87% Full Time, and 13% Part Time. Highlights an 87% In-person, and 13% Remote job distribution, with an average salary of $138,991 per year, or $66.8 per hour.
Design Verification Engineer

Design Verification Engineer

Cirrus Logic

Chandler, AZ • On-site

$133K - $163K/yr

Full-time

Posted 28 days ago


Job description

For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands. Cirrus Logic is also known for its award-winning culture, which was built on a foundation of inclusion and fairness, meaningful community engagement, and delivering enjoyable employee experiences at every turn. But we couldn't do it without our extraordinary workforce - and that's where you come in. Join our team and help us continue to make Cirrus Logic an exceptional place to grow your career!
We are seeking an experienced and innovative Design Verification Engineer to join a world-class silicon design verification team. This role partners closely with digital and analog designers, systems and applications engineers, firmware/software teams, and manufacturing test to deliver high-quality mixed-signal IC solutions. You will be responsible for end-to-end functional verification across block-level and chip-level designs, contributing to advanced verification methodologies and infrastructure.
This position offers exposure to multiple verification domains including UVM-based testbench development, formal verification, hardware emulation/acceleration, gate-level simulations, and software-driven verification in a highly collaborative and technically rigorous environment.
Responsibilities:
  • Develop comprehensive verification plans aligned with design and system requirements.
  • Perform functional verification of custom mixed-signal ASICs at block and chip level.
  • Design and implement UVM-based testbenches, including infrastructure, scoreboards, checkers, and assertions.
  • Create directed and constrained-random test suites to ensure robust functional coverage.
  • Implement, analyze, and drive functional and code coverage, including coverage closure.
  • Conduct failure analysis, regression triage, and debug, resolving functional and timing-related issues.
  • Run and debug gate-level simulations, including timing violations and back-annotation issues.
  • Develop and maintain digital and mixed-signal behavioral models to support verification.
  • Support verification flow and infrastructure development, including regressions and automation.
  • Collaborate cross-functionally with digital/analog design, systems, applications, firmware/software, and manufacturing test teams.
  • Contribute to both pre-silicon verification and post-silicon validation efforts.
  • Proactively improve verification methodologies, processes, and best practices.

Required Knowledge, Skills, and Experience:
  • Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or a related field.
    • Bachelor's with 2+ years of relevant experience.
    • Master's with 0+ years of relevant experience.
  • Significant industry experience in silicon design and/or ASIC verification.
  • Strong proficiency with HDLs: Verilog and/or VHDL.
  • Strong proficiency with HVLs: SystemVerilog with UVM (or OVM/AVM/Vera).
  • Solid understanding of digital design principles and system architecture.
  • Hands-on experience with:
    • Testbench architecture and stimulus generation
    • Regression execution and debug
    • Coverage analysis and closure
  • Ability to work effectively in a cross-disciplinary, team-oriented environment.

Preferred Knowledge, Skills, and Experience:
  • Experience verifying mixed-signal ASICs in complex SoC environments.
  • Knowledge of signal processing concepts relevant to mixed-signal designs.
  • Experience with SystemVerilog Assertions (SVA).
  • Exposure to or hands-on experience with:
    • Formal verification
    • Hardware emulation or acceleration
    • Software-driven verification
  • Demonstrated ability to evaluate, debug, and improve verification flows and methodologies.

#LI-Hybrid
#LI-EK1
#HOTT
Export control restrictions based upon applicable laws and regulations would prohibit candidates who are nationals of certain embargoed countries from working in this position without Cirrus Logic first obtaining an export license. Candidates for this role must be able to access technical data without a requirement for an export license. We are unable to sponsor or obtain export licenses for this role.
Cirrus Logic strives to select the best qualified applicant for any opening. Different approaches, ideas and points of view are both valued and respected. Employment decisions are made on the basis of job-related criteria without regard to race, color, religion, sex, national origin, age, protected veteran or disabled status, genetic information, or any other classification protected by applicable law.