As the SoC Verification Manager, you will be a critical leader in our dsPIC Microcontroller Business Unit, responsible for ensuring the functional integrity of our next-generation 32-bit MCU products.
As the SoC Verification Manager, you will be a critical leader in our dsPIC Microcontroller Business Unit, responsible for ensuring the functional integrity of our next-generation 32-bit MCU products.
As the SoC Verification Manager, you will be a critical leader in our dsPIC Microcontroller Business Unit, responsible for ensuring the functional integrity of our next-generation 32-bit MCU products.
As the SoC Verification Manager, you will be a critical leader in our dsPIC Microcontroller Business Unit, responsible for ensuring the functional integrity of our next-generation 32-bit MCU products.
FPGA Engineer with Security Clearance
Tucson, AZ · On-site
$114K - $157K/yr
Design documentation and configuration management are required. Responsibilities to Anticipate: • ... ASIC verification (SystemVerilog coding with UVM) • Xilinx or Microsemi devices and flow tools ...
FPGA Engineer with Security Clearance
Tucson, AZ · On-site
$114K - $157K/yr
Design documentation and configuration management are required. Responsibilities to Anticipate: • ... ASIC verification (SystemVerilog coding with UVM) • Xilinx or Microsemi devices and flow tools ...
FPGA Engineer with Security Clearance
Tucson, AZ · On-site
$105K - $145K/yr
Design documentation and configuration management are required. Responsibilities to Anticipate: • ... ASIC verification (SystemVerilog coding with UVM) • Xilinx or Microsemi devices and flow tools ...
FPGA Engineer with Security Clearance
Tucson, AZ · On-site
$105K - $145K/yr
Design documentation and configuration management are required. Responsibilities to Anticipate: • ... ASIC verification (SystemVerilog coding with UVM) • Xilinx or Microsemi devices and flow tools ...
FPGA Embedded Engineer with Security Clearance
Tucson, AZ · On-site
$116K - $149K/yr
Design documentation and configuration management are required. Responsibilities to Anticipate: • ... ASIC verification (SystemVerilog coding with UVM) • Xilinx or Microsemi devices and flow tools ...
FPGA Embedded Engineer with Security Clearance
Tucson, AZ · On-site
$116K - $149K/yr
Design documentation and configuration management are required. Responsibilities to Anticipate: • ... ASIC verification (SystemVerilog coding with UVM) • Xilinx or Microsemi devices and flow tools ...
FPGA Engineer
Tucson, AZ · On-site
$122K - $157K/yr
Design documentation and configuration management are required. Responsibilities to Anticipate: • ... ASIC verification (SystemVerilog coding with UVM) • Xilinx or Microsemi devices and flow tools ...
FPGA Engineer
Tucson, AZ · On-site
$122K - $157K/yr
Design documentation and configuration management are required. Responsibilities to Anticipate: • ... ASIC verification (SystemVerilog coding with UVM) • Xilinx or Microsemi devices and flow tools ...
Experience: 5-10+ years in mixed-signal verification, digital verification, modeling, power management, or related semiconductor development. Switching converter experience is a plus. * Communication:
Quick apply
Experience: 5-10+ years in mixed-signal verification, digital verification, modeling, power management, or related semiconductor development. Switching converter experience is a plus. * Communication:
Experience: 5-10+ years in mixed-signal verification, digital verification, modeling, power management, or related semiconductor development. Switching converter experience is a plus. * Communication:
Experience: 5-10+ years in mixed-signal verification, digital verification, modeling, power management, or related semiconductor development. Switching converter experience is a plus. * Communication:
Experience: 5-10+ years in mixed-signal verification, digital verification, modeling, power management, or related semiconductor development. Switching converter experience is a plus. * Communication:
Experience: 5-10+ years in mixed-signal verification, digital verification, modeling, power management, or related semiconductor development. Switching converter experience is a plus. * Communication:
It also offers outsourcing, consulting, recruitment, career transition, and vendor management ... Santa Clara or Chandler, AZ Duration: 3 - 6 months Specific Verification methodologies preferred ...
It also offers outsourcing, consulting, recruitment, career transition, and vendor management ... Santa Clara or Chandler, AZ Duration: 3 - 6 months Specific Verification methodologies preferred ...
Sr Principal ASIC FPGA Engineer (Sign-on Bonus Available)
Scottsdale, AZ · On-site
$182K - $202K/yr
Duties and Tasks: • Responsible for definition, design, verification and documentation for ASIC ... to technical subcontract management for medium to large subcontracts that may include SOW ...
Sr Principal ASIC FPGA Engineer (Sign-on Bonus Available)
Scottsdale, AZ · On-site
$182K - $202K/yr
Duties and Tasks: • Responsible for definition, design, verification and documentation for ASIC ... to technical subcontract management for medium to large subcontracts that may include SOW ...
Duties and Tasks: • Responsible for definition, design, verification and documentation for ASIC ... to technical subcontract management for medium to large subcontracts that may include SOW ...
Duties and Tasks: • Responsible for definition, design, verification and documentation for ASIC ... to technical subcontract management for medium to large subcontracts that may include SOW ...
Senior FPGA Design Engineer
$116K - $160K/yr
Design documentation and configuration management are required. What You Will Do * Design and ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
Senior FPGA Design Engineer
$116K - $160K/yr
Design documentation and configuration management are required. What You Will Do * Design and ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
Manage moderately sized projects or processes * Viewed as subject-matter expert within discipline ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Manage moderately sized projects or processes * Viewed as subject-matter expert within discipline ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Manage moderately sized projects or processes * Viewed as subject-matter expert within discipline ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Manage moderately sized projects or processes * Viewed as subject-matter expert within discipline ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Senior FPGA Design Engineer
$116K - $160K/yr
Design documentation and configuration management are required. What You Will Do * Design and ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
Senior FPGA Design Engineer
$116K - $160K/yr
Design documentation and configuration management are required. What You Will Do * Design and ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
Manage moderately sized projects or processes * Viewed as subject-matter expert within discipline ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Manage moderately sized projects or processes * Viewed as subject-matter expert within discipline ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Principal Electrical Engineer-FPGA Design- Onsite Tucson, AZ
Tucson, AZ · On-site
$116K - $160K/yr
Manage moderately sized projects or processes * Viewed as subject-matter expert within discipline ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Principal Electrical Engineer-FPGA Design- Onsite Tucson, AZ
Tucson, AZ · On-site
$116K - $160K/yr
Manage moderately sized projects or processes * Viewed as subject-matter expert within discipline ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Senior FPGA Design Engineer
$122K - $168K/yr
Design documentation and configuration management are required. What You Will Do * Design and ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
Senior FPGA Design Engineer
$122K - $168K/yr
Design documentation and configuration management are required. What You Will Do * Design and ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
Senior FPGA Design Engineer
Tucson, AZ · On-site
$116K - $160K/yr
Design documentation and configuration management are required. What You Will Do * Design and ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
Senior FPGA Design Engineer
Tucson, AZ · On-site
$116K - $160K/yr
Design documentation and configuration management are required. What You Will Do * Design and ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
Asic Verification Manager information
What are the key skills and qualifications needed to thrive in the Asic Verification Manager position, and why are they important?
To thrive as an ASIC Verification Manager, you need a deep understanding of digital design and verification methodologies, experience with hardware description languages (HDLs) such as Verilog or VHDL, and a degree in electrical engineering or a related field. Familiarity with verification tools like UVM, SystemVerilog, simulation environments, and code coverage analysis is typically required, along with knowledge of industry standards. Strong leadership, project management, effective communication, and team-building abilities help set top candidates apart. These skills and qualities are critical to ensuring thorough verification cycles, timely project delivery, and successful cross-functional team collaboration in complex semiconductor development projects.
What are some of the primary challenges faced by Asic Verification Managers in their daily work?
ASIC Verification Managers often navigate the complexities of verifying highly integrated, feature-rich designs under tight development timelines. They manage large teams of engineers, coordinate cross-functional communication with design, physical implementation, and firmware groups, and are responsible for developing and executing comprehensive verification plans. Balancing resource allocation, ensuring thorough test coverage, and adapting to evolving project requirements are common challenges. Success in this role often depends on strong organizational skills, attention to technical detail, and the ability to anticipate and resolve verification bottlenecks promptly.
What does an Asic Verification Manager do?
An ASIC Verification Manager leads a team responsible for verifying the functionality and performance of ASIC designs before production. They develop verification strategies, oversee testbench creation, and ensure compliance with design specifications. Their role includes managing project timelines, collaborating with design and software teams, and improving verification methodologies. Strong leadership, technical expertise in verification tools, and experience in UVM and SystemVerilog are essential for success in this role.

Full-time
Medical, Retirement
Re-posted 29 days ago
Microchip Technology rating
8.0
Based on 33 frontline employees who took The Breakroom Quiz
57th of 156 rated electronics manufacturers
Job description
People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it's won us countless awards for diversity and workplace excellence.
Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.
Visit our careers page to see what exciting opportunities and company perks await!
Job Description:
As the SoC Verification Manager, you will be a critical leader in our dsPIC Microcontroller Business Unit, responsible for ensuring the functional integrity of our next-generation 32-bit MCU products. You will lead, mentor, and scale a high-performing team of 20+ verification engineers to execute complex verification strategies for SoCs featuring ARM and specialized proprietary cores.
Your mission is to drive "First-Pass Silicon Success" by bridging the gap between architectural intent and silicon implementation through cutting-edge UVM and Formal methodologies.
Key Responsibilities
- Strategic Leadership: Own the end-to-end verification strategy, from initial test plan development to final tape-out sign-off for multiple concurrent MCU projects.
- Team Management: Lead and develop a global team of 20+ engineers. Manage resource allocation, performance reviews, and technical career growth.
- Architecture Oversight: Define and refine scalable, reusable testbench architectures that support both simulation-based (UVM) and formal-based verification flows.
- Technical Excellence: Drive the adoption of advanced techniques, including Formal Verification, Power-Aware Verification (UPF/CPF), and Hardware-Software Co-verification.
- Cross-Functional Collaboration: Partner closely with Architecture, RTL Design, Digital Signal Processing (DSP), and Physical Design teams to resolve complex integration issues and architectural bottlenecks.
- Methodology Innovation: Continuously improve verification efficiency through automation, Python/Perl scripting, and the integration of AI-driven verification tools.
Requirements/Qualifications:
Required Qualifications
- Education: Bachelor of Science in Electrical Engineering or Computer Science, with strong digital design fundamentals.
- Experience: 12+ years in SoC Verification, with at least 5 years in a formal leadership or management role.
- Domain Expertise: Proven track record of successful tape-outs for 32-bit Microcontrollers. Deep understanding of MCU peripherals (DMA, Timers, ADC/DAC interfaces, Security modules).
- Processor Knowledge: Direct experience verifying SoCs with ARM cores (Cortex-M) and proprietary RISC-based architectures.
- Methodologies:
- Expert-level command of SystemVerilog and UVM (Universal Verification Methodology).
- Strong hands-on experience with Formal Verification (Property Checking, Connectivity Checking) using tools like JasperGold or VC Formal.
- Protocol Proficiency: In-depth knowledge of AMBA bus protocols (AHB, APB, AXI).
- Verification Infrastructure: Experience defining coverage-driven verification (CDV) metrics and managing massive regression suites. Module level verification plan development, TB plan, TB development and fullchip integration of the module level TB, develop effective functional assertions and coverpoints.
Preferred Skills
- Strong background in Gate-Level Simulations (GLS) and power-aware verification.
- Experience with Post-Silicon Validation, customer support and its alignment with pre-silicon test plans.
- Experience with analog mixed-mode (AMS) simulations.
- Familiarity with functional safety standards (ISO 26262) for automotive MCU applications.
Travel Time:
0% - 25%
Physical Attributes:
Hearing, Seeing, Talking, Works Alone, Works Around Others
Physical Requirements:
sitting 90%
Pay Range:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below:
Benefits of working at Microchip
The annual base salary range for this position, which could be performed in the US, is $91,000 - $247,000.*
*Range is dependent on numerous factors including job location, skills and experience.
Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.
To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.
What Microchip Technology employees say
Pay
Benefits
Hours and flexibility
Workplace
Get the full story on Breakroom
About Microchip
Sourced by ZipRecruiter
Industry
It services
Company size
10,000+ Employees
Headquarters location
Chandler, AZ, US
Year founded
1989