Position Overview We seek a Senior ASIC Design Engineer to provide technical support to Intel Foundry Services customers on PDKs through ASIC design implementation flows and to perform ASIC physical ...
Position Overview We seek a Senior ASIC Design Engineer to provide technical support to Intel Foundry Services customers on PDKs through ASIC design implementation flows and to perform ASIC physical ...
Position Overview We seek a Senior ASIC Design Engineer to provide technical support to Intel Foundry Services customers on PDKs through ASIC design implementation flows and to perform ASIC physical ...
Position Overview We seek a Senior ASIC Design Engineer to provide technical support to Intel Foundry Services customers on PDKs through ASIC design implementation flows and to perform ASIC physical ...
Support and deliver ASIC/Digital tool/flow/methodologysolutions using Cadence tool suites to ... Drive quality improvements in design kits and documentation through ASIC design reference flow ...
Support and deliver ASIC/Digital tool/flow/methodologysolutions using Cadence tool suites to ... Drive quality improvements in design kits and documentation through ASIC design reference flow ...
Support and deliver ASIC/Digital tool/flow/methodology solutions using Cadence tool suites to ... Drive quality improvements in design kits and documentation through ASIC design reference flow ...
Support and deliver ASIC/Digital tool/flow/methodology solutions using Cadence tool suites to ... Drive quality improvements in design kits and documentation through ASIC design reference flow ...
Design, document, and develop ASIC packages for high-volume, high-quality release, including post-layout extraction and reporting. * Collaborate with system partners, vendors, and design leads to ...
Design, document, and develop ASIC packages for high-volume, high-quality release, including post-layout extraction and reporting. * Collaborate with system partners, vendors, and design leads to ...
FPGA VHDL Design Engineer US Citizenship required
$116.30K - $160.30K/yr
We have a PERM position in sunny Tucson, AZ for an ASIC FPGA Designer. There are several positions ... Knowledge and experience including: - Development of design documentation - Application of ...
FPGA VHDL Design Engineer US Citizenship required
$116.30K - $160.30K/yr
We have a PERM position in sunny Tucson, AZ for an ASIC FPGA Designer. There are several positions ... Knowledge and experience including: - Development of design documentation - Application of ...
FPGA VHDL Design Engineer US Citizenship required
Tucson, AZ · On-site
$116.30K - $160.30K/yr
We have a PERM position in sunny Tucson, AZ for an ASIC FPGA Designer. There are several positions ... Knowledge and experience including: - Development of design documentation - Application of ...
FPGA VHDL Design Engineer US Citizenship required
Tucson, AZ · On-site
$116.30K - $160.30K/yr
We have a PERM position in sunny Tucson, AZ for an ASIC FPGA Designer. There are several positions ... Knowledge and experience including: - Development of design documentation - Application of ...
Sr Advanced ASIC FPGA Engineer
Scottsdale, AZ · On-site
$152.46K - $169.14K/yr
Responsibilities for this Position Duties and Tasks: • Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field ...
Sr Advanced ASIC FPGA Engineer
Scottsdale, AZ · On-site
$152.46K - $169.14K/yr
Responsibilities for this Position Duties and Tasks: • Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field ...
Sr Advanced ASIC FPGA Engineer
Scottsdale, AZ · Hybrid
$152.46K - $169.14K/yr
Duties and Tasks: • Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments ...
Sr Advanced ASIC FPGA Engineer
Scottsdale, AZ · Hybrid
$152.46K - $169.14K/yr
Duties and Tasks: • Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments ...
Senior FPGA Design Engineer
$116.30K - $160.30K/yr
FPGA/ASIC design experience in one or more of the following areas: * Hands-on experience with integration and debugging of FPGA/ASIC devices * Radar processing techniques * Image processing ...
Senior FPGA Design Engineer
$116.30K - $160.30K/yr
FPGA/ASIC design experience in one or more of the following areas: * Hands-on experience with integration and debugging of FPGA/ASIC devices * Radar processing techniques * Image processing ...
Senior FPGA Design Engineer
Tucson, AZ · On-site
$116.30K - $160.30K/yr
FPGA/ASIC design experience in one or more of the following areas: * Hands-on experience with integration and debugging of FPGA/ASIC devices * Radar processing techniques * Image processing ...
Senior FPGA Design Engineer
Tucson, AZ · On-site
$116.30K - $160.30K/yr
FPGA/ASIC design experience in one or more of the following areas: * Hands-on experience with integration and debugging of FPGA/ASIC devices * Radar processing techniques * Image processing ...
Senior FPGA Design Engineer
$122.10K - $168.30K/yr
FPGA/ASIC design experience in one or more of the following areas: * Hands-on experience with integration and debugging of FPGA/ASIC devices * Radar processing techniques * Image processing ...
Senior FPGA Design Engineer
$122.10K - $168.30K/yr
FPGA/ASIC design experience in one or more of the following areas: * Hands-on experience with integration and debugging of FPGA/ASIC devices * Radar processing techniques * Image processing ...
Senior FPGA Design Engineer
Tucson, AZ · On-site
$116.30K - $160.30K/yr
FPGA/ASIC design experience in one or more of the following areas: * Hands-on experience with integration and debugging of FPGA/ASIC devices * Radar processing techniques * Image processing ...
Senior FPGA Design Engineer
Tucson, AZ · On-site
$116.30K - $160.30K/yr
FPGA/ASIC design experience in one or more of the following areas: * Hands-on experience with integration and debugging of FPGA/ASIC devices * Radar processing techniques * Image processing ...
FPGA Engineer with Security Clearance
Tucson, AZ · On-site
$114.20K - $157.40K/yr
... • FPGA/ASIC design (VHDL coding) or FPGA/ASIC verification (SystemVerilog coding with UVM) • Xilinx or Microsemi devices and flow tools • Delivering FPGA/ASIC solutions to system level ...
FPGA Engineer with Security Clearance
Tucson, AZ · On-site
$114.20K - $157.40K/yr
... • FPGA/ASIC design (VHDL coding) or FPGA/ASIC verification (SystemVerilog coding with UVM) • Xilinx or Microsemi devices and flow tools • Delivering FPGA/ASIC solutions to system level ...
FPGA Engineer with Security Clearance
Tucson, AZ · On-site
$114.20K - $157.40K/yr
... • FPGA/ASIC design (VHDL coding) or FPGA/ASIC verification (SystemVerilog coding with UVM) • Xilinx or Microsemi devices and flow tools • Delivering FPGA/ASIC solutions to system level ...
FPGA Engineer with Security Clearance
Tucson, AZ · On-site
$114.20K - $157.40K/yr
... • FPGA/ASIC design (VHDL coding) or FPGA/ASIC verification (SystemVerilog coding with UVM) • Xilinx or Microsemi devices and flow tools • Delivering FPGA/ASIC solutions to system level ...
Experience in ASIC design flow including lint checking, Crossing Clock domain checking, DFT methodology, equivalence checking and synthesis. * Hands-on experience required with Mentor and Synopsys CA ...
Experience in ASIC design flow including lint checking, Crossing Clock domain checking, DFT methodology, equivalence checking and synthesis. * Hands-on experience required with Mentor and Synopsys CA ...
Experience in ASIC design flow including lint checking, Crossing Clock domain checking, DFT methodology, equivalence checking and synthesis. * Hands-on experience required with Mentor and Synopsys CA ...
Experience in ASIC design flow including lint checking, Crossing Clock domain checking, DFT methodology, equivalence checking and synthesis. * Hands-on experience required with Mentor and Synopsys CA ...
Principal Electrical Engineer-FPGA Design- Onsite Tucson, AZ
$116.30K - $160.30K/yr
FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding) * Xilinx or Microsemi devices and flow tools * Delivering FPGA/ASIC solutions to system level ...
Principal Electrical Engineer-FPGA Design- Onsite Tucson, AZ
$116.30K - $160.30K/yr
FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding) * Xilinx or Microsemi devices and flow tools * Delivering FPGA/ASIC solutions to system level ...
Principal Electrical Engineer-FPGA Design- Onsite Tucson, AZ
$122.10K - $168.30K/yr
FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding) * Xilinx or Microsemi devices and flow tools * Delivering FPGA/ASIC solutions to system level ...
Principal Electrical Engineer-FPGA Design- Onsite Tucson, AZ
$122.10K - $168.30K/yr
FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding) * Xilinx or Microsemi devices and flow tools * Delivering FPGA/ASIC solutions to system level ...
Principal Electrical Engineer-FPGA Design- Onsite Tucson, AZ
Tucson, AZ · On-site
$116.30K - $160.30K/yr
FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding) * Xilinx or Microsemi devices and flow tools * Delivering FPGA/ASIC solutions to system level ...
Principal Electrical Engineer-FPGA Design- Onsite Tucson, AZ
Tucson, AZ · On-site
$116.30K - $160.30K/yr
FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding) * Xilinx or Microsemi devices and flow tools * Delivering FPGA/ASIC solutions to system level ...
Asic Design information
See Arizona salary details
$87.6K - $96.7K
16% of jobs
$96.7K - $105.9K
3% of jobs
$105.9K - $115K
4% of jobs
$117.7K is the 25th percentile. Wages below this are outliers.
$115K - $124.2K
6% of jobs
The median wage is $130K / yr.
$124.2K - $133.3K
33% of jobs
$133.3K - $142.5K
3% of jobs
$142.5K - $151.6K
2% of jobs
$157.7K is the 75th percentile. Wages above this are outliers.
$151.6K - $160.8K
12% of jobs
$160.8K - $169.9K
5% of jobs
$169.9K - $179.1K
4% of jobs
$179.1K - $188.2K
12% of jobs
$87.6K
$140K
$188.2K
How much do asic design jobs pay per year?
As of May 28, 2026, the average yearly pay for asic design in Arizona is $139,965.00, according to ZipRecruiter salary data. Most workers in this role earn between $122,500.00 and $167,700.00 per year, depending on experience, location, and employer.
What are the key skills and qualifications needed to thrive as an ASIC Design Engineer, and why are they important?
To thrive as an ASIC Design Engineer, you need a solid background in digital design principles, hardware description languages (such as Verilog or VHDL), and a degree in electrical or computer engineering. Familiarity with EDA tools like Cadence or Synopsys, as well as knowledge of simulation and verification methodologies, is typically required. Strong problem-solving abilities, attention to detail, and effective teamwork are crucial soft skills in this role. These competencies ensure accurate, efficient chip designs and smooth collaboration throughout complex development cycles.
What are some common challenges faced by ASIC Design Engineers during the chip development process?
ASIC Design Engineers often encounter challenges such as balancing power, performance, and area (PPA) constraints while meeting tight project deadlines. Debugging complex hardware issues during simulation and verification phases requires keen analytical skills and attention to detail. Collaboration with cross-functional teams—including verification, physical design, and test engineering—is essential to ensure design specifications are met and to address integration issues. Staying updated with evolving EDA tools and methodologies is also crucial for success in this fast-paced field.
What are ASIC designers?
ASIC designers are engineers who specialize in creating application-specific integrated circuits (ASICs), which are custom-designed semiconductor chips tailored for a particular use or product. They are responsible for designing, verifying, and testing hardware components at the microchip level to ensure optimal performance and efficiency. ASIC designers work closely with electronic design automation (EDA) tools, collaborate with software and hardware teams, and follow rigorous design cycles to meet project specifications. Their work is crucial in industries such as telecommunications, consumer electronics, automotive, and data centers where custom silicon solutions are required.
What engineering jobs pay $500,000?
In the field of ASIC design and related engineering roles, senior positions such as principal engineer, engineering director, or VP of engineering can reach or exceed $500,000 annually, especially in high-cost-of-living areas or large tech companies. These roles typically require extensive experience, advanced skills in hardware design, and often involve leadership responsibilities and stock options.
What is the difference between Asic Design vs FPGA Design?
| Aspect | Asic Design | FPGA Design |
|---|---|---|
| Credentials | Bachelor's or Master's in Electrical Engineering or Computer Engineering; knowledge of VLSI design | Similar credentials; often requires knowledge of FPGA programming languages like VHDL/Verilog |
| Work Environment | Designing custom chips in semiconductor labs or design houses | Implementing and testing designs on FPGA boards in labs or development environments |
| Industry Usage | Used in high-volume, performance-critical applications like smartphones, servers | Used for prototyping, testing, and low to medium volume applications |
While both Asic Design and FPGA Design involve hardware description languages and digital logic, Asic Design focuses on creating custom chips for high-volume production, requiring detailed fabrication knowledge. FPGA Design emphasizes flexible, reprogrammable hardware for testing and prototyping. Understanding these differences helps professionals choose the right career path or project focus within the hardware design industry.
What are the most commonly searched types of Asic Design jobs in Arizona? The most popular types of Asic Design jobs in Arizona are:
What are popular job titles related to Asic Design jobs in Arizona? For Asic Design jobs in Arizona, the most frequently searched job titles are:
- Asic Engineer
- Senior Asic Design Engineer
- Design Verification Engineer
- Remote Eda Engineer
- Remote Work From Home Analog Mixed Signal Design Engineer
- Analog Mixed Signal Design Engineer
- Freelance Physical Design Engineer
- Contract Physical Design Engineer
- Work From Home Rf Ic Design Engineer
- Freelance Asic Design Engineer
What job categories do people searching Asic Design jobs in Arizona look for? The top searched job categories for Asic Design jobs in Arizona are:
What cities in Arizona are hiring for Asic Design jobs? Cities in Arizona with the most Asic Design job openings:
Full-time
Medical, Retirement, PTO
Posted 22 days ago
Intel rating
8.8
Based on 143 frontline employees who took The Breakroom Quiz
9th of 137 rated electronics manufacturers
Job description
Job Details:Job Description:
Intel Foundry is a systems foundry transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. Intel Foundry will be differentiated from other foundries by our world class industry-leading IP portfolio that customers can choose from including rich IP ecosystem including x86 cores, graphics, AI, and Arm/RISC-V IPs, world-class design services, and operationally resilient global manufacturing with committed capacity in the US and Europe.
Position Overview
We seek a Senior ASIC Design Engineer to provide technical support to Intel Foundry Services customers on PDKs through ASIC design implementation flows and to perform ASIC physical design execution with specialized focus on complex multi-voltage domain (UPF/CPF) designs and power-intent (VCLP and Conformal LP) verification signoff. This role drives quality improvements in design kits, supports customers through successful tape-outs, and performs ASIC design service on complex multi-voltage domain designs.
Key Responsibilities
Customer Technical Support and ASIC Design Execution
- Provide comprehensive technical support to Intel Foundry Services customers on PDKs, digital reference flows and digital design signoff methodologies in multi-voltage domain implementation and verification.
- Support and deliver ASIC/Digital tool/flow/methodology solutions, especially in multi-voltage domain design implementation and verification using Cadence and Synopsys tool suites. Have deep knowledge of UPF/CPF (level-shifter, isolation, power gating, retention, always-on) implementation and verification using (VCLP and Conformal LP). Have experience in writing and debugging UPF/CPF for multi-voltage domain designs.
- Drive customer success through expert guidance and have strong hand-on experience in ASIC design execution
Quality Assurance and Documentation
- Drive quality improvements in design kits and documentation through ASIC design reference flow validation and comprehensive documentation review
- Create application notes, technical design checklists, and deliver training presentations to customers and internal teams
- Establish and maintain high quality design through implementation and verification methodologies and checklists
Core Competencies
- Self-driven and results-oriented with ability to manage multiple tasks effectively
- Strong teamwork skills to drive solutions for implementation challenge
- Analytical problem-solving capabilities for complex design issues
- Excellent communication skills with experience in collaboration and customer feedback
The Minimum qualifications are required to be considered for this position. Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
- US Citizenship required.
- Ability to obtain a US Government Security Clearance.
- Bachelor's degree in Electrical / Computer Engineering, Computer Science, or in a STEM related field of study.
- 4+ years of experience with advanced CMOS processes (16nm and below).
- 3+ years of experience in ASIC design implementing and verification in area of low power, multi-voltage domain
- 3+ years of experience in scripting languages like Python, Perl, Tcl, and/or shell scripting
Preferred Qualifications
- Active US Government Security Clearance with a minimum of Secret level
- Post Graduate degree in Electrical / Computer Engineering, Computer Science, or in a STEM related field of study
- Experience with state-of-the-art process technology (7nm and below)
- Hands-on experience in physical design Implementation and verification methodology for multi-voltage domain in SoC design
- Experience using EDA tools for multi-power domain design (UPF/CPF) implementation and power-intent verification (VCLP, Conformal LP) at block and at SOC level
- Experience in writing and debugging UPF/CPF for multi-voltage domain designs
- Customer-facing experience in technical support roles
# cj
Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Arizona, PhoenixAdditional Locations:US, California, Santa Clara, US, Oregon, HillsboroBusiness group:The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
About Intel
Sourced by ZipRecruiter
Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth
Industry
Manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US
Year founded
1968