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Asic Design Jobs in Arizona (NOW HIRING)

Prattwhitney

Senior FPGA Design Engineer

Tucson, AZ · On-site

$86.80 - $165.20/hr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Experience with FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using SystemVerilog coding. * Experience working with Xilinx or Microsemi devices and associated flow ...

Raytheon

Section Lead-Effector Digital Products

Tucson, AZ

$128K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

The Section Leader will utilize advanced technical knowledge in FPGA/ASIC Design/Verification and/or Digital CCA Design, and an understand the impact of this work on other areas of the organization.

New

Raytheon

Section Lead-Effector Digital Products

Tucson, AZ

$128K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

The Section Leader will utilize advanced technical knowledge in FPGA/ASIC Design/Verification and/or Digital CCA Design, and an understand the impact of this work on other areas of the organization.

New

Raytheon

Section Lead-Effector Digital Products

Phoenix, AZ

$135K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

The Section Leader will utilize advanced technical knowledge in FPGA/ASIC Design/Verification and/or Digital CCA Design, and an understand the impact of this work on other areas of the organization.

New

VertuCom

FPGA Engineer with Security Clearance

Tucson, AZ · On-site

$105K - $145K/yr

... • FPGA/ASIC design (VHDL coding) or FPGA/ASIC verification (SystemVerilog coding with UVM) • Xilinx or Microsemi devices and flow tools • Delivering FPGA/ASIC solutions to system level ...

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Asic Design information

See Arizona salary details

$87.6K

$140K

$188.2K

How much do asic design jobs pay per year?

As of Aug 16, 2026, the average yearly pay for asic design in Arizona is $139,965.00, according to ZipRecruiter salary data. Most workers in this role earn between $122,500.00 and $167,700.00 per year, depending on experience, location, and employer.

How much do ASIC designers make?

ASIC designers typically earn a median annual salary ranging from $80,000 to $150,000, depending on experience, location, and industry. Senior roles or those with specialized skills in hardware description languages and FPGA tools can earn higher salaries, often exceeding $200,000 with bonuses and benefits.

What are the key skills and qualifications needed to thrive as an ASIC design engineer?

To thrive as an ASIC Design Engineer, you need a solid background in digital design principles, hardware description languages (such as Verilog or VHDL), and a degree in electrical or computer engineering. Familiarity with EDA tools like Cadence or Synopsys, as well as knowledge of simulation and verification methodologies, is typically required. Strong problem-solving abilities, attention to detail, and effective teamwork are crucial soft skills in this role. These competencies ensure accurate, efficient chip designs and smooth collaboration throughout complex development cycles.

What is an ASIC design?

ASIC design involves creating custom integrated circuits tailored for specific applications, requiring knowledge of hardware description languages like VHDL or Verilog. It includes stages such as architecture definition, logic design, verification, and physical implementation, often using specialized EDA tools. ASIC designers need strong technical skills and understanding of digital logic and semiconductor manufacturing processes.

What is the difference between Asic Design vs FPGA Design?

AspectAsic DesignFPGA Design
CredentialsBachelor's or Master's in Electrical Engineering or Computer Engineering; knowledge of VLSI designSimilar credentials; often requires knowledge of FPGA programming languages like VHDL/Verilog
Work EnvironmentDesigning custom chips in semiconductor labs or design housesImplementing and testing designs on FPGA boards in labs or development environments
Industry UsageUsed in high-volume, performance-critical applications like smartphones, serversUsed for prototyping, testing, and low to medium volume applications

While both Asic Design and FPGA Design involve hardware description languages and digital logic, Asic Design focuses on creating custom chips for high-volume production, requiring detailed fabrication knowledge. FPGA Design emphasizes flexible, reprogrammable hardware for testing and prototyping. Understanding these differences helps professionals choose the right career path or project focus within the hardware design industry.

Is ASIC design in demand?

ASIC design is in high demand due to the growth of specialized hardware for applications like AI, 5G, and IoT. Professionals with skills in hardware description languages such as VHDL or Verilog, and experience with FPGA prototyping, are particularly sought after in the industry.

What are some common challenges faced by ASIC design engineers during the chip development process?

ASIC Design Engineers often encounter challenges such as balancing power, performance, and area (PPA) constraints while meeting tight project deadlines. Debugging complex hardware issues during simulation and verification phases requires keen analytical skills and attention to detail. Collaboration with cross-functional teams—including verification, physical design, and test engineering—is essential to ensure design specifications are met and to address integration issues. Staying updated with evolving EDA tools and methodologies is also crucial for success in this fast-paced field.

What is an ASIC designer?

ASIC designers are engineers who specialize in creating application-specific integrated circuits (ASICs), which are custom-designed semiconductor chips tailored for a particular use or product. They are responsible for designing, verifying, and testing hardware components at the microchip level to ensure optimal performance and efficiency. ASIC designers work closely with electronic design automation (EDA) tools, collaborate with software and hardware teams, and follow rigorous design cycles to meet project specifications. Their work is crucial in industries such as telecommunications, consumer electronics, automotive, and data centers where custom silicon solutions are required.

What are the most commonly searched types of Asic Design jobs in Arizona?

The most popular types of Asic Design jobs in Arizona are:

What are popular job titles related to Asic Design jobs in Arizona?

For Asic Design jobs in Arizona, the most frequently searched job titles are:

What job categories do people searching Asic Design jobs in Arizona look for?

The top searched job categories for Asic Design jobs in Arizona are:

What cities in Arizona are hiring for Asic Design jobs?

Cities in Arizona with the most Asic Design job openings:

Asic Design jobs near you
Infographic showing various Asic Design job openings in Arizona as of August 2026, with employment types broken down into 1% Internship, 88% Full Time, 7% Part Time, and 4% Contract. Highlights an 84% Physical, 5% Hybrid, and 11% Remote job distribution, with an average salary of $139,965 per year, or $67.3 per hour.

Senior Applications and Solutions Engineer - Foundry Services

Intel Corporation

Phoenix, AZ • On-site

$122.44 - $232.19/hr

Other

Re-posted 11 days ago

Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

19th of 157 rated electronics manufacturers

Job description

Position Overview

We seek a Senior ASIC Design Engineer who will provide technical support to Intel Foundry Services customers on PDKs through ASIC design implementation flows and perform ASIC physical design execution focused on complex multi-voltage domain (UPF/CPF) designs and power-intent (VCLP and Conformal LP) verification signoff. This role drives quality improvements in design kits, supports customers through successful tape-outs, and performs ASIC design services on complex multi-voltage domain designs.

Key Responsibilities
  • Provide comprehensive technical support to Intel Foundry Services customers on PDKs, digital reference flows, and digital design signoff methodologies in multi-voltage domain implementation and verification.
  • Support and deliver ASIC/Digital tool/flow/methodology solutions, especially in multi-voltage domain design implementation and verification using Cadence and Synopsys tool suites.
  • Have deep knowledge of UPF/CPF (level-shifter, isolation, power gating, retention, always-on) implementation and verification using VCLP and Conformal LP; write and debug UPF/CPF for multi-voltage domain designs.
  • Drive customer success through expert guidance and hands-on experience in ASIC design execution.
  • Drive quality improvements in design kits and documentation through ASIC design reference flow validation and comprehensive documentation review.
  • Create application notes, technical design checklists, and deliver training presentations to customers and internal teams.
  • Establish and maintain high-quality design through implementation and verification methodologies and checklists.
Core Competencies
  • Self-driven and results-oriented with ability to manage multiple tasks effectively.
  • Strong teamwork skills to drive solutions for implementation challenges.
  • Excellent analytical problem-solving capabilities for complex design issues.
  • Effective communication skills with experience in collaboration and customer feedback.
Minimum Qualifications
  • US citizenship required.
  • Ability to obtain a US Government Security Clearance.
  • Bachelor’s degree in Electrical / Computer Engineering, Computer Science, or a STEM related field.
  • 4+ years of experience with advanced CMOS processes (16 nm and below).
  • 3+ years of experience in ASIC design implementation and verification in low power, multi-voltage domain.
  • 3+ years of experience in scripting languages such as Python, Perl, Tcl, and/or shell scripting.
Preferred Qualifications
  • Active US Government Security Clearance with at least Secret level.
  • Post-graduate degree in Electrical / Computer Engineering, Computer Science, or a STEM related field.
  • Experience with state-of-the-art process technology (7 nm and below).
  • Hands-on experience in physical design implementation and verification methodology for multi-voltage domain in SoC design.
  • Experience using EDA tools for multi-power domain design (UPF/CPF) implementation and power-intent verification (VCLP, Conformal LP) at block and SOC level.
  • Experience in writing and debugging UPF/CPF for multi-voltage domain designs.
  • Customer-facing experience in technical support roles.
Benefits and Work Arrangement
  • Annual salary range: $122,440.00 – $232,190.00 USD (US locations).
  • Hybrid work model allowing split between on-site and off-site work.
EEO Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968

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