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Asic Verification Jobs in Arizona (NOW HIRING)

Cirrus Logic

Design Verification Engineer

Chandler, AZ · On-site

$133K - $163K/yr

Significant industry experience in silicon design and/or ASIC verification. * Strong proficiency with HDLs: Verilog and/or VHDL. * Strong proficiency with HVLs: SystemVerilog with UVM (or OVM/AVM ...

Cirrus Logic

Staff Design Verification Engineer

Chandler, AZ · On-site

$133K - $163K/yr

Significant industry experience in silicon design and/or ASIC verification. * Strong proficiency with HDLs: Verilog and/or VHDL. * Strong proficiency with HVLs: SystemVerilog with UVM (or OVM/AVM ...

Cirrus Logic

Senior Design Verification Engineer

Chandler, AZ · On-site

$133K - $163K/yr

Significant industry experience in silicon design and/or ASIC verification * Strong proficiency with HDLs: Verilog and/or VHDL. * Strong proficiency with HVLs: SystemVerilog with UVM (or OVM/AVM/Vera)

AVTC Group

FPGA Engineer

Tucson, AZ · On-site

$122K - $157K/yr

... ASIC verification (SystemVerilog coding with UVM) • Xilinx or Microsemi devices and flow tools • Delivering FPGA/ASIC solutions to system level applications • Hands on experience with ...

VertuCom

FPGA Engineer with Security Clearance

Tucson, AZ · On-site

$119K - $165K/yr

... ASIC verification (SystemVerilog coding with UVM) • Xilinx or Microsemi devices and flow tools • Delivering FPGA/ASIC solutions to system level applications • Hands on experience with ...

Prattwhitney

Senior FPGA Design Engineer

Tucson, AZ · On-site

$86.80 - $165.20/hr

Experience with FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using SystemVerilog coding. * Experience working with Xilinx or Microsemi devices and associated flow ...

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All JobsAsic Verification JobsAsic Verification Jobs in Arizona

Asic Verification information

See Arizona salary details

$82K

$145.4K

$192.9K

How much do asic verification jobs pay per year?

As of Aug 21, 2026, the average yearly pay for asic verification in Arizona is $145,446.00, according to ZipRecruiter salary data. Most workers in this role earn between $126,700.00 and $163,500.00 per year, depending on experience, location, and employer.

What is ASIC verification?

ASIC verification is the process of ensuring that an Application-Specific Integrated Circuit (ASIC) design functions as intended before it is manufactured. It involves using simulation, formal methods, and other verification techniques to catch and correct design errors early, which helps prevent costly mistakes during chip fabrication. Verification engineers create test environments and write testbenches to simulate the ASIC's behavior under different scenarios. This step is critical in the chip design flow, as it directly impacts the quality, reliability, and performance of the final product.

What are the key skills and qualifications needed to thrive as an ASIC verification engineer?

To thrive as an ASIC Verification Engineer, you need a strong background in digital design, verification methodologies, and hardware description languages such as Verilog or VHDL, often supported by a degree in electrical engineering or a related field. Familiarity with industry-standard verification tools like UVM, SystemVerilog, and simulation or formal verification environments is typically expected. Analytical thinking, attention to detail, and effective communication are essential soft skills for diagnosing complex issues and collaborating with design teams. Mastery of these skills ensures high-quality, error-free ASIC designs and efficient project delivery in a highly technical environment.

What are some common challenges faced in ASIC verification, and how can new team members effectively overcome them?

A common challenge in ASIC Verification is ensuring comprehensive test coverage to catch subtle design bugs before production. New team members often need to quickly familiarize themselves with complex verification environments and tools such as UVM, SystemVerilog, and simulation platforms. Collaborating closely with design engineers and participating in regular code and coverage reviews can accelerate learning and help resolve issues efficiently. Seeking mentorship from experienced colleagues and actively engaging in team discussions also aids in navigating verification complexities.

What is the difference between Asic Verification vs FPGA Verification?

AspectAsic VerificationFPGA Verification
Required CredentialsBachelor's/Master's in Electrical Engineering or Computer Engineering, knowledge of hardware description languages (HDL)Bachelor's/Master's in Electrical Engineering or Computer Engineering, HDL knowledge
Work EnvironmentDesign teams, hardware labs, simulation environmentsPrototyping labs, hardware testing, simulation
Industry UsageSemiconductor companies, chip design firmsPrototyping, FPGA-based product development
Common Search/ComparisonAsic Verification vs FPGA Verification

Asic Verification and FPGA Verification share similar skills, such as HDL knowledge and hardware testing. However, Asic Verification focuses on validating integrated circuit designs before manufacturing, often involving complex simulation and formal verification. FPGA Verification involves testing programmable hardware prototypes, emphasizing rapid prototyping and hardware-in-the-loop testing. Both roles are essential in hardware development but differ in scope, environment, and end goals.

How to become an ASIC verification engineer?

To become an ASIC verification engineer, candidates typically need a bachelor's degree in electrical engineering, computer engineering, or a related field. Gaining experience with hardware description languages like Verilog or VHDL, and verification tools such as UVM or SystemVerilog, is essential. Developing strong problem-solving skills and understanding digital design principles are also important for success in this role.

What does an ASIC verification engineer do?

An ASIC verification engineer designs and executes tests to ensure that application-specific integrated circuits (ASICs) function correctly according to specifications. They develop test plans, write simulation code using hardware description languages like SystemVerilog, and use verification tools to identify and fix design errors before manufacturing. This role requires strong programming skills, knowledge of digital design, and familiarity with verification methodologies such as UVM.

What are the most commonly searched types of Asic Verification jobs in Arizona?

The most popular types of Asic Verification jobs in Arizona are:

What are popular job titles related to Asic Verification jobs in Arizona?

For Asic Verification jobs in Arizona, the most frequently searched job titles are:

What job categories do people searching Asic Verification jobs in Arizona look for?

The top searched job categories for Asic Verification jobs in Arizona are:

What cities in Arizona are hiring for Asic Verification jobs?

Cities in Arizona with the most Asic Verification job openings:

Asic Verification jobs near you
Infographic showing various Asic Verification job openings in Arizona as of August 2026, with employment types broken down into 1% As Needed, 81% Full Time, 13% Part Time, 2% Temporary, 2% Contract, and 1% Nights. Highlights an 89% Physical, 3% Hybrid, and 8% Remote job distribution, with an average salary of $145,446 per year, or $69.9 per hour.

Design Verification Engineer

Cirrus Logic

Chandler, AZ • On-site

$133K - $163K/yr

Full-time

Re-posted 8 days ago

Job description

For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands. Cirrus Logic is also known for its award-winning culture, which was built on a foundation of inclusion and fairness, meaningful community engagement, and delivering enjoyable employee experiences at every turn. But we couldn't do it without our extraordinary workforce - and that's where you come in. Join our team and help us continue to make Cirrus Logic an exceptional place to grow your career!
We are seeking an experienced and innovative Design Verification Engineer to join a world-class silicon design verification team. This role partners closely with digital and analog designers, systems and applications engineers, firmware/software teams, and manufacturing test to deliver high-quality mixed-signal IC solutions. You will be responsible for end-to-end functional verification across block-level and chip-level designs, contributing to advanced verification methodologies and infrastructure.
This position offers exposure to multiple verification domains including UVM-based testbench development, formal verification, hardware emulation/acceleration, gate-level simulations, and software-driven verification in a highly collaborative and technically rigorous environment.
Responsibilities:
  • Develop comprehensive verification plans aligned with design and system requirements.
  • Perform functional verification of custom mixed-signal ASICs at block and chip level.
  • Design and implement UVM-based testbenches, including infrastructure, scoreboards, checkers, and assertions.
  • Create directed and constrained-random test suites to ensure robust functional coverage.
  • Implement, analyze, and drive functional and code coverage, including coverage closure.
  • Conduct failure analysis, regression triage, and debug, resolving functional and timing-related issues.
  • Run and debug gate-level simulations, including timing violations and back-annotation issues.
  • Develop and maintain digital and mixed-signal behavioral models to support verification.
  • Support verification flow and infrastructure development, including regressions and automation.
  • Collaborate cross-functionally with digital/analog design, systems, applications, firmware/software, and manufacturing test teams.
  • Contribute to both pre-silicon verification and post-silicon validation efforts.
  • Proactively improve verification methodologies, processes, and best practices.

Required Knowledge, Skills, and Experience:
  • Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or a related field.
    • Bachelor's with 2+ years of relevant experience.
    • Master's with 0+ years of relevant experience.
  • Significant industry experience in silicon design and/or ASIC verification.
  • Strong proficiency with HDLs: Verilog and/or VHDL.
  • Strong proficiency with HVLs: SystemVerilog with UVM (or OVM/AVM/Vera).
  • Solid understanding of digital design principles and system architecture.
  • Hands-on experience with:
    • Testbench architecture and stimulus generation
    • Regression execution and debug
    • Coverage analysis and closure
  • Ability to work effectively in a cross-disciplinary, team-oriented environment.

Preferred Knowledge, Skills, and Experience:
  • Experience verifying mixed-signal ASICs in complex SoC environments.
  • Knowledge of signal processing concepts relevant to mixed-signal designs.
  • Experience with SystemVerilog Assertions (SVA).
  • Exposure to or hands-on experience with:
    • Formal verification
    • Hardware emulation or acceleration
    • Software-driven verification
  • Demonstrated ability to evaluate, debug, and improve verification flows and methodologies.

#LI-Hybrid
#LI-EK1
#HOTT
Export control restrictions based upon applicable laws and regulations would prohibit candidates who are nationals of certain embargoed countries from working in this position without Cirrus Logic first obtaining an export license. Candidates for this role must be able to access technical data without a requirement for an export license. We are unable to sponsor or obtain export licenses for this role.
Cirrus Logic strives to select the best qualified applicant for any opening. Different approaches, ideas and points of view are both valued and respected. Employment decisions are made on the basis of job-related criteria without regard to race, color, religion, sex, national origin, age, protected veteran or disabled status, genetic information, or any other classification protected by applicable law.

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