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Asic Verification Jobs in Arizona (NOW HIRING)

Raytheon Technologies

Senior FPGA Design Engineer

Tucson, AZ · On-site

$116K - $160K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using SystemVerilog coding * Working with Xilinx or Microsemi devices and associated flow tools * Delivering FPGA/ASIC ...

Intel

IP Design Verification Engineer

Phoenix, AZ · On-site

$141K - $200K/yr

  • Medical

  • Retirement

  • PTO

Join Intel as a Mixed Signal Design Verification Engineer and play a critical role in shaping the ... Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom ...

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All JobsAsic Verification JobsAsic Verification Jobs in Arizona

Asic Verification information

See Arizona salary details

$82K

$145.4K

$192.9K

How much do asic verification jobs pay per year?

As of Aug 14, 2026, the average yearly pay for asic verification in Arizona is $145,446.00, according to ZipRecruiter salary data. Most workers in this role earn between $126,700.00 and $163,500.00 per year, depending on experience, location, and employer.

What is the difference between Asic Verification vs FPGA Verification?

AspectAsic VerificationFPGA Verification
Required CredentialsBachelor's/Master's in Electrical Engineering or Computer Engineering, knowledge of hardware description languages (HDL)Bachelor's/Master's in Electrical Engineering or Computer Engineering, HDL knowledge
Work EnvironmentDesign teams, hardware labs, simulation environmentsPrototyping labs, hardware testing, simulation
Industry UsageSemiconductor companies, chip design firmsPrototyping, FPGA-based product development
Common Search/ComparisonAsic Verification vs FPGA Verification

Asic Verification and FPGA Verification share similar skills, such as HDL knowledge and hardware testing. However, Asic Verification focuses on validating integrated circuit designs before manufacturing, often involving complex simulation and formal verification. FPGA Verification involves testing programmable hardware prototypes, emphasizing rapid prototyping and hardware-in-the-loop testing. Both roles are essential in hardware development but differ in scope, environment, and end goals.

What are the key skills and qualifications needed to thrive as an ASIC verification engineer?

To thrive as an ASIC Verification Engineer, you need a strong background in digital design, verification methodologies, and hardware description languages such as Verilog or VHDL, often supported by a degree in electrical engineering or a related field. Familiarity with industry-standard verification tools like UVM, SystemVerilog, and simulation or formal verification environments is typically expected. Analytical thinking, attention to detail, and effective communication are essential soft skills for diagnosing complex issues and collaborating with design teams. Mastery of these skills ensures high-quality, error-free ASIC designs and efficient project delivery in a highly technical environment.

What is ASIC verification?

ASIC verification is the process of ensuring that an Application-Specific Integrated Circuit (ASIC) design functions as intended before it is manufactured. It involves using simulation, formal methods, and other verification techniques to catch and correct design errors early, which helps prevent costly mistakes during chip fabrication. Verification engineers create test environments and write testbenches to simulate the ASIC's behavior under different scenarios. This step is critical in the chip design flow, as it directly impacts the quality, reliability, and performance of the final product.

What are some common challenges faced in ASIC verification, and how can new team members effectively overcome them?

A common challenge in ASIC Verification is ensuring comprehensive test coverage to catch subtle design bugs before production. New team members often need to quickly familiarize themselves with complex verification environments and tools such as UVM, SystemVerilog, and simulation platforms. Collaborating closely with design engineers and participating in regular code and coverage reviews can accelerate learning and help resolve issues efficiently. Seeking mentorship from experienced colleagues and actively engaging in team discussions also aids in navigating verification complexities.

What are the most commonly searched types of Asic Verification jobs in Arizona?

The most popular types of Asic Verification jobs in Arizona are:

What are popular job titles related to Asic Verification jobs in Arizona?

For Asic Verification jobs in Arizona, the most frequently searched job titles are:

What job categories do people searching Asic Verification jobs in Arizona look for?

The top searched job categories for Asic Verification jobs in Arizona are:

What cities in Arizona are hiring for Asic Verification jobs?

Cities in Arizona with the most Asic Verification job openings:

Asic Verification jobs near you
Infographic showing various Asic Verification job openings in Arizona as of August 2026, with employment types broken down into 1% As Needed, 81% Full Time, 14% Part Time, and 4% Contract. Highlights an 91% Physical, 2% Hybrid, and 7% Remote job distribution, with an average salary of $145,446 per year, or $69.9 per hour.

Sr Principal ASIC FPGA Engineer (Sign-on Bonus Available)

General Dynamics Mission Systems, Inc

Scottsdale, AZ • On-site

$182K - $202K/yr

Full-time

Medical, Retirement

Re-posted 21 days ago

General Dynamics Mission Systems rating

7.9

Company rating: 7.9 out of 10

Based on 30 frontline employees who took The Breakroom Quiz

128th of 244 rated software companies

Job description

Basic Qualifications
Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 10 years of relevant experience; or Master's degree plus a minimum of 8 years of relevant experience.
Clearance Requirements:
Department of Defense TS/SCI security clearance is preferred at time of hire. Candidates must be able to obtain a TS/SCI clearance within a reasonable amount of time from date of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.
Responsibilities for this Position
As a Senior Principal ASIC FPGA Engineer, on the Space Systems Engineering team in Scottsdale:
Duties and Tasks:
• Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments
• Determines architecture, system simulation and detailed design approach
• Defines module interfaces and all aspects of device design and simulation
• Evaluates the process flow including but not limited to high level design, synthesis, place and route, timing and power utilization
• Creates test and simulation plans that establish functional criteria
• Verifies test results and analyzes performance
• May also review vendor capabilities, foundry technologies, device libraries and simulation tools
• May lead or have significant contributions to technical subcontract management for medium to large subcontracts that may include SOW development, proposal evaluation, source selection, technical
oversight, and subcontractor work product evaluation and acceptance
• Reviews vendor capability to support product development
• Applies an expert understanding of the organizationally defined processes throughout the lifecycle of the program or project
• Participates in the development, maintenance and improvement of the ASIC/FPGA organizational processes
• Supports the generation of technical engineering products by using the appropriate standards, processes, procedures, and tools throughout the development life cycle
• Leads the research and analysis of data, such as customer design proposal, specifications, and manuals to determine feasibility of design or application
• Selects components and equipment based on analysis of specifications and reliability
• May be a book boss on a medium proposal
• Establishes the overall ASIC/FPGA technical approach on large technical proposals
• May participate in multi-divisional or multi-company Integrated Product Team or working group
• May supervise or manage lower level employees
• Exercises considerable latitude in determining technical objectives of assignments
• Works on advanced applications that may result in new business for the company
Knowledge, Skills and Abilities:
• Demonstrated use and understanding of ASIC/FPGA engineering concepts, principles, and theories
• Frequently contributes to the development of innovative principles and ideas
• Demonstrated understanding of company policies and practices
• Demonstrated understanding of ASIC/FPGA engineering processes
• Demonstrated awareness of business objectives and Engineering's role in achieving
• Demonstrated proficiency in Microsoft Office applications
• Demonstrated written and verbal communications skills
• Ability to think creatively
• Ability to multi-task
• Demonstrated skill in communicating issues, impacts, and corrective actions
• Demonstrated ability to recognize and clearly report information relevant to sound engineering design
• Demonstrated understanding and ability to apply project leadership principles including SPI/CPI, Earned Value, Cost Account Management (CAM), and Statistical Process Controls
• Demonstrated ability to manage scope growth
• Frequent contact with all levels across the entire company
• Serves as consultant to management and customers on projects and applications
• May serve as company technical spokesperson
• Works under consultative direction on predetermined long-range objectives
• Assignments may be self-initiated
• Works on unusually complex problems and provides creative and innovative solutions
• May function in a Deputy Program Manager Engineering (DPME) role
• Identifies opportunities to apply AI for continuous improvement and innovation
Our Commitment to You:
  • An exciting career path with opportunities for continuous learning and development.
  • Research oriented work, alongside award winning teams developing practical solutions for our nation's security
  • Flexible schedules with every other Friday off work, if desired (9/80 schedule)
  • Competitive benefits, including 401k matching, flex time off, paid parental leave, healthcare benefits, health & wellness programs, employee resource and social groups, and more
  • See more at gdmissionsystems.com/careers/why-work-for-us/benefits

Scottsdale Link:
While on-site, you will be a part of the Scottsdale, AZ location
#LI-Hybrid
#CJ1
Salary Note
This estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary. This job posting will remain open until the position is filled.
Combined Salary Range
USD $182,139.00 - USD $202,060.00 /Yr.
Company Overview
General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high-performance team!
Equal Opportunity Employer / Individuals with Disabilities / Protected Veterans

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