Duties and Tasks: • Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments ...
Duties and Tasks: • Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments ...
Advanced ASIC FPGA Engineer- (Sign-on Bonus Available)
Scottsdale, AZ · On-site
$122K - $136K/yr
... verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA ... Basic Qualifications for Adv ASIC /FPGA Design Engineer: * Ability to generate micro architecture ...
Advanced ASIC FPGA Engineer- (Sign-on Bonus Available)
Scottsdale, AZ · On-site
$122K - $136K/yr
... verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA ... Basic Qualifications for Adv ASIC /FPGA Design Engineer: * Ability to generate micro architecture ...
... verification. * Support and deliver ASIC/Digital tool/flow/methodology solutions, especially in ... Bachelor's degree in Electrical / Computer Engineering, Computer Science, or in a STEM related ...
... verification. * Support and deliver ASIC/Digital tool/flow/methodology solutions, especially in ... Bachelor's degree in Electrical / Computer Engineering, Computer Science, or in a STEM related ...
... verification. * Support and deliver ASIC/Digital tool/flow/methodology solutions, especially in ... Bachelor's degree in Electrical / Computer Engineering, Computer Science, or in a STEM related ...
... verification. * Support and deliver ASIC/Digital tool/flow/methodology solutions, especially in ... Bachelor's degree in Electrical / Computer Engineering, Computer Science, or in a STEM related ...
As a Senior Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
As a Senior Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
As a Senior Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
As a Senior Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Senior Principal Electrical Engineer-FPGA Design - Onsite Tucson, AZ
Tucson, AZ · On-site
$98K - $132K/yr
As a Senior Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Senior Principal Electrical Engineer-FPGA Design - Onsite Tucson, AZ
Tucson, AZ · On-site
$98K - $132K/yr
As a Senior Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
As a Senior Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
As a Senior Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Senior Principal Electrical Engineer-FPGA Design - Onsite Tucson with Security Clearance
Tucson, AZ · On-site
$96K - $130K/yr
As a Senior Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Senior Principal Electrical Engineer-FPGA Design - Onsite Tucson with Security Clearance
Tucson, AZ · On-site
$96K - $130K/yr
As a Senior Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Signal & Power Integrity Hardware ASIC Simulation Engineer Lead (Remote)
Tempe, AZ · On-site +1
$118K - $156K/yr
This Hardware Engineering position is located in San Jose, CA, and is open to remote applicants ... verify ASIC packaging to be deployed in a range of Cisco platforms. * Develop, document, and ...
Signal & Power Integrity Hardware ASIC Simulation Engineer Lead (Remote)
Tempe, AZ · On-site +1
$118K - $156K/yr
This Hardware Engineering position is located in San Jose, CA, and is open to remote applicants ... verify ASIC packaging to be deployed in a range of Cisco platforms. * Develop, document, and ...
Senior Digital Engineer
Chandler, AZ · On-site +1
$133K/yr
Work closely with Analog and Verification engineers to deliver high-quality silicon solutions ... Strong understanding of ASIC design methodology. * Strong understanding of Lint, CDC & RDC tools.
Quick apply
Senior Digital Engineer
Chandler, AZ · On-site +1
$133K/yr
Work closely with Analog and Verification engineers to deliver high-quality silicon solutions ... Strong understanding of ASIC design methodology. * Strong understanding of Lint, CDC & RDC tools.
Senior Digital Engineer
Chandler, AZ · On-site +1
$133K/yr
Work closely with Analog and Verification engineers to deliver high-quality silicon solutions ... Strong understanding of ASIC design methodology. * Strong understanding of Lint, CDC & RDC tools.
Senior Digital Engineer
Chandler, AZ · On-site +1
$133K/yr
Work closely with Analog and Verification engineers to deliver high-quality silicon solutions ... Strong understanding of ASIC design methodology. * Strong understanding of Lint, CDC & RDC tools.
Senior Digital Engineer
Chandler, AZ · On-site
$133K/yr
Work closely with Analog and Verification engineers to deliver high-quality silicon solutions ... Strong understanding of ASIC design methodology. * Strong understanding of Lint, CDC & RDC tools.
Senior Digital Engineer
Chandler, AZ · On-site
$133K/yr
Work closely with Analog and Verification engineers to deliver high-quality silicon solutions ... Strong understanding of ASIC design methodology. * Strong understanding of Lint, CDC & RDC tools.
Staff Digital Design Engineer
Chandler, AZ · On-site
$133K/yr
... and Verification engineers to deliver high-quality silicon solutions. Responsibilities: • ... ASIC design methodology. • Strong understanding of Lint, CDC & RDC tools. • Strong ...
Staff Digital Design Engineer
Chandler, AZ · On-site
$133K/yr
... and Verification engineers to deliver high-quality silicon solutions. Responsibilities: • ... ASIC design methodology. • Strong understanding of Lint, CDC & RDC tools. • Strong ...
... Verification engineers to deliver high-quality silicon solutions. Responsibilities: · Ensuring ... of ASIC design methodology. · Strong understanding of Lint, CDC & RDC tools. · Strong ...
Quick apply
... Verification engineers to deliver high-quality silicon solutions. Responsibilities: · Ensuring ... of ASIC design methodology. · Strong understanding of Lint, CDC & RDC tools. · Strong ...
Work closely with Analog and Verification engineers to deliver high-quality silicon solutions ... Strong understanding of ASIC design methodology. Strong understanding of Lint, CDC & RDC tools.
Work closely with Analog and Verification engineers to deliver high-quality silicon solutions ... Strong understanding of ASIC design methodology. Strong understanding of Lint, CDC & RDC tools.
ASIC/FPGA Design, Verification, and Validation * Assist with creating Quotation Estimates and ... Mentor junior engineers *** RELOCATION PACKAGE AVAILABLE *** Qualifications YOU MUST HAVE
ASIC/FPGA Design, Verification, and Validation * Assist with creating Quotation Estimates and ... Mentor junior engineers *** RELOCATION PACKAGE AVAILABLE *** Qualifications YOU MUST HAVE
Physical Design Engineer
Phoenix, AZ · On-site
$135K - $139K/yr
... verification in advanced technology nodes Resolve design & flow issues related to physical design ... ASIC/SoC design Min. * Qualifications: 0-1 yrs of exp. Enginner - CL11 & CL10 Master's degree in ...
Physical Design Engineer
Phoenix, AZ · On-site
$135K - $139K/yr
... verification in advanced technology nodes Resolve design & flow issues related to physical design ... ASIC/SoC design Min. * Qualifications: 0-1 yrs of exp. Enginner - CL11 & CL10 Master's degree in ...
FPGA VHDL Design Engineer US Citizenship required
Tucson, AZ · On-site
$116K - $160K/yr
We have a PERM position in sunny Tucson, AZ for an ASIC FPGA Designer. There are several positions ... Knowledge and demonstrated experience with System Verilog and Unified Verification Methodology ...
FPGA VHDL Design Engineer US Citizenship required
Tucson, AZ · On-site
$116K - $160K/yr
We have a PERM position in sunny Tucson, AZ for an ASIC FPGA Designer. There are several positions ... Knowledge and demonstrated experience with System Verilog and Unified Verification Methodology ...
FPGA VHDL Design Engineer US Citizenship required
Tucson, AZ · On-site
$116K - $160K/yr
We have a PERM position in sunny Tucson, AZ for an ASIC FPGA Designer. There are several positions ... Knowledge and demonstrated experience with System Verilog and Unified Verification Methodology ...
FPGA VHDL Design Engineer US Citizenship required
Tucson, AZ · On-site
$116K - $160K/yr
We have a PERM position in sunny Tucson, AZ for an ASIC FPGA Designer. There are several positions ... Knowledge and demonstrated experience with System Verilog and Unified Verification Methodology ...
Asic Verification Engineer information
See Arizona salary details
$82K - $92.1K
9% of jobs
$92.1K - $102.2K
2% of jobs
$102.2K - $112.3K
2% of jobs
$112.3K - $122.3K
4% of jobs
$125.9K is the 25th percentile. Wages below this are outliers.
$122.3K - $132.4K
22% of jobs
$132.4K - $142.5K
4% of jobs
The median wage is $152.6K / yr.
$142.5K - $152.6K
6% of jobs
$161.4K is the 75th percentile. Wages above this are outliers.
$152.6K - $162.7K
29% of jobs
$162.7K - $172.7K
9% of jobs
$172.7K - $182.8K
6% of jobs
$182.8K - $192.9K
6% of jobs
$82K
$145.4K
$192.9K
How much do asic verification engineer jobs pay per year?
What is the salary of an ASIC verification engineer?
What are some common challenges faced by ASIC Verification Engineers during the verification process?
What are the key skills and qualifications needed to thrive as an ASIC Verification Engineer, and why are they important?
What does an ASIC verification engineer do?
What is an ASIC Verification Engineer?
What is the difference between Asic Verification Engineer vs Digital Design Engineer?
| Aspect | Asic Verification Engineer | Digital Design Engineer |
|---|---|---|
| Primary Focus | Verifying ASIC designs for correctness and functionality | Designing digital circuits and architectures |
| Skills & Certifications | Hardware description languages (HDL), verification tools, scripting | HDL, digital logic, circuit design |
| Work Environment | Verification labs, simulation environments | Design teams, CAD tools, prototyping labs |
| Industry Usage | Semiconductor, electronics manufacturing | Semiconductor, consumer electronics, computing |
While both roles require expertise in HDL and semiconductor industry experience, Asic Verification Engineers focus on testing and validating ASIC designs, ensuring they meet specifications. Digital Design Engineers primarily create and develop digital circuits. Both roles are essential in the chip development process but differ in their core responsibilities and daily tasks.
What is an ASIC Verification Engineer?
An ASIC verification engineer works with system designers and architects to test performance and validate hardware components and systems. You plan and develop a verification environment while coordinating with developers and architects throughout the design process. Your duties involve working closely with these other teams during the design process. Your responsibilities may include using computer hardware languages such as Verilog. In this career, you work on hardware design and use algorithms, data structure analysis, and other advanced design techniques.

Advanced ASIC FPGA Engineer- (Sign-on Bonus Available)
Scottsdale, AZ
$119K - $164K/yr
Full-time
Re-posted 4 days ago
General Dynamics Mission Systems rating
7.9
Based on 30 frontline employees who took The Breakroom Quiz
128th of 242 rated software companies
Job description
Bachelor’s degree in Electrical or Computer Engineering, or a related Science, Engineering, Technology or Mathematics field. Also requires 5+ years of job-related experience, or a Master's degree and 3 years of job-related experience.
Clearance Requirements:
Department of Defense TS/SCI security clearance is preferred at time of hire. Candidates must be able to obtain a TS/SCI clearance within a reasonable amount of time from date of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.
Duties and Tasks:
• Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments
• Determines architecture, system simulation and detailed design approach
• Defines module interfaces and all aspects of device design and simulation
• Evaluates the process flow including but not limited to high level design, synthesis, place and route, timing and power utilization
• Creates test and simulation plans that establish functional criteria
• Verifies test results and analyzes performance
• May also review vendor capabilities, foundry technologies, device libraries and simulation tools
• Participates in the improvement of the ASIC/FPGA organizational processes
• Supports the generation of technical engineering products by using the appropriate standards, processes, procedures, and tools throughout the ASIC/FPGA development life cycle
• Contributes to the research and analysis of data, such as customer design proposal specifications, and manuals to determine feasibility of design or application
• Selects components and equipment based on analysis of specifications and reliability
• May provide leadership and/or direction to lower level employees
• Independently determines approach to solutions
• Contributes to the completion of major programs and projects
• Plans and executes project tasks for activities described above
Knowledge, Skills and Abilities:
• Proficient use and understanding of ASIC/FPGA engineering concepts, principles, and theories
• Proficient in the principles and techniques of ASIC/FPGA design
• Proficient understanding of ASIC/FPGA processes
• Proficient knowledge of other related disciplines
• Keeps abreast of technology trends
• Proficient awareness of business objectives and Engineering’s role in achieving
• Proficient in Microsoft Office applications
• Proficient in ASIC/FPGA design tools
• Proficient written and verbal communications skills
• Ability to think creatively
• Ability to multi-task
• Proficient skill in communicating issues, impacts, and corrective actions
• Proficient ability to recognize and clearly report information relevant to sound ASIC/FPGA design
• Proficient ability to develop and sell concepts and ideas
• Regular contact with senior levels of internal work groups
• Works under limited direction
• Contact with project leaders and other professionals within the Engineering department and with project teams across the company
• Some contact with external customers
• Identifies opportunities to apply AI for continuous improvement and innovation
Key Responsibilities:
The individual will be responsible for and participate in the ASIC/FPGA product life cycle (requirements, design, implementation, and test). Must be knowledgeable in VHDL and/or Verilog RTL coding and be proficient in micro-architecture design. Successful candidates will have an understanding of digital design concepts and proficient in the digital design tool flow (synthesis, timing, place and route, and in system debug).
This candidate must have an ability to operate in a team environment and collaborate across the different teams as required to accomplish the design goals. Must have strong written and oral communication skills.
Basic Qualifications for Adv ASIC /FPGA Design Engineer:
- Ability to generate micro architecture and detailed design approaches
- Proficient in async design principals, timing closure, and constraint generation
- Proficiency in HDL (VHDL/Verilog)
- Proficiency in scripting languages such as Tcl, Python, or Perl
- Effective communication, presentation skills, and high proficiency in technical problem solving
- U.S. citizenship with the ability to obtain and maintain a Secret security clearance
Preferred Qualifications:
- Leads technical tasks or small projects
- Understanding of high reliability design principals
- Experience with Xilinx and Microchip FPGAs along with associated tools (ISE, Vivado, Libero)
- Experience with synthesis tools (Precision, Synplify)
- Experience with verification tools (QuestaSim/UVM)
- Experience with clock-domain-crossing tools (Questa CDC)
- Experience with lab bring-up and debug (Oscilloscope, Logic Analyzer, ChipScope)
- Active DoD Secret Clearance or higher
Workplace Options:
This position is fully on-site or hybrid/flex, as mutually agreed.
While on-site, you will be a part of the Scottsdale, AZ team. Learn more at https://gdmissionsystems.com/about-us/major-locations/scottsdale
Key Words: Verification, ASIC, FPGA, SystemVerilog, Verilog, Assertions (SVA), OVM, UVM, Digital Signal Processing (DSP), functional coverage, constrained random, formal verification, constrained random testing
#LI-Hybrid
#CJ1
This estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary. This job posting will remain open until the position is filled.
USD $122,785.00 - USD $136,215.00 /Yr.
General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high-performance team!
Equal Opportunity Employer / Individuals with Disabilities / Protected Veterans
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About General Dynamics Mission Systems
Sourced by ZipRecruiter
Industry
Guided missile and space vehicle manufacturing
Company size
10,000+ Employees
Headquarters location
Fairfax, VA, US
Year founded
1952