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Asic Verification Engineer Jobs in Arizona (NOW HIRING)

Senior Digital Engineer

Chandler, AZ · On-site +1

$133K/yr

Work closely with Analog and Verification engineers to deliver high-quality silicon solutions ... Strong understanding of ASIC design methodology. * Strong understanding of Lint, CDC & RDC tools.

Senior Digital Engineer

Chandler, AZ · On-site +1

$133K/yr

Work closely with Analog and Verification engineers to deliver high-quality silicon solutions ... Strong understanding of ASIC design methodology. * Strong understanding of Lint, CDC & RDC tools.

Senior Digital Engineer

Chandler, AZ · On-site

$133K/yr

Work closely with Analog and Verification engineers to deliver high-quality silicon solutions ... Strong understanding of ASIC design methodology. * Strong understanding of Lint, CDC & RDC tools.

Physical Design Engineer

Phoenix, AZ · On-site

$135K - $139K/yr

... verification in advanced technology nodes Resolve design & flow issues related to physical design ... ASIC/SoC design Min. * Qualifications: 0-1 yrs of exp. Enginner - CL11 & CL10 Master's degree in ...

Showing results 41-60

Asic Verification Engineer information

See Arizona salary details

$82K

$145.4K

$192.9K

How much do asic verification engineer jobs pay per year?

As of Aug 11, 2026, the average yearly pay for asic verification engineer in Arizona is $145,446.00, according to ZipRecruiter salary data. Most workers in this role earn between $126,700.00 and $163,500.00 per year, depending on experience, location, and employer.

What is the salary of an ASIC verification engineer?

The salary of an ASIC verification engineer typically ranges from $80,000 to $150,000 annually, depending on experience, location, and company size. Entry-level positions may start lower, while experienced engineers with specialized skills in hardware description languages and verification tools can earn higher salaries.

What are some common challenges faced by ASIC Verification Engineers during the verification process?

ASIC Verification Engineers often encounter challenges such as dealing with complex designs, debugging intricate issues, and ensuring thorough coverage of all design specifications. Coordinating with design and RTL teams to clarify requirements and resolve discrepancies is a frequent part of the job. Additionally, managing tight project timelines while maintaining high verification quality requires effective time management and strong communication skills. Continuous learning is also important, as verification methodologies and tools evolve rapidly in this field.

What are the key skills and qualifications needed to thrive as an ASIC Verification Engineer, and why are they important?

To thrive as an ASIC Verification Engineer, you need a solid background in digital design, computer architecture, and verification methodologies, typically supported by a degree in electrical engineering or a related field. Familiarity with tools and languages like SystemVerilog, UVM, simulation environments, and waveform viewers is essential, and certifications in verification or design may be beneficial. Strong analytical thinking, attention to detail, and effective communication are crucial soft skills for debugging complex designs and collaborating with design teams. These skills and qualities are vital to ensure that ASIC designs are thoroughly tested, compliant with specifications, and delivered with high quality and reliability.

What does an ASIC verification engineer do?

An ASIC verification engineer designs and executes tests to ensure that integrated circuit designs function correctly according to specifications. They develop test plans, write simulation testbenches using hardware description languages like SystemVerilog, and analyze simulation results to identify and fix design issues. This role requires knowledge of digital design, verification tools, and often involves working closely with design engineers throughout the development process.

What is an ASIC Verification Engineer?

An ASIC Verification Engineer is a professional who specializes in testing and validating the design of Application-Specific Integrated Circuits (ASICs) to ensure they function correctly according to specifications. They develop testbenches, write test cases, and use simulation tools to detect and debug design errors before the chip is manufactured. Their work is critical in preventing costly mistakes and ensuring the final product meets performance and reliability standards. ASIC Verification Engineers often collaborate closely with design engineers to understand requirements and resolve issues.

What is the difference between Asic Verification Engineer vs Digital Design Engineer?

AspectAsic Verification EngineerDigital Design Engineer
Primary FocusVerifying ASIC designs for correctness and functionalityDesigning digital circuits and architectures
Skills & CertificationsHardware description languages (HDL), verification tools, scriptingHDL, digital logic, circuit design
Work EnvironmentVerification labs, simulation environmentsDesign teams, CAD tools, prototyping labs
Industry UsageSemiconductor, electronics manufacturingSemiconductor, consumer electronics, computing

While both roles require expertise in HDL and semiconductor industry experience, Asic Verification Engineers focus on testing and validating ASIC designs, ensuring they meet specifications. Digital Design Engineers primarily create and develop digital circuits. Both roles are essential in the chip development process but differ in their core responsibilities and daily tasks.

What is an ASIC Verification Engineer?

An ASIC verification engineer works with system designers and architects to test performance and validate hardware components and systems. You plan and develop a verification environment while coordinating with developers and architects throughout the design process. Your duties involve working closely with these other teams during the design process. Your responsibilities may include using computer hardware languages such as Verilog. In this career, you work on hardware design and use algorithms, data structure analysis, and other advanced design techniques.

What are the most commonly searched types of Asic Verification Engineer jobs in Arizona? The most popular types of Asic Verification Engineer jobs in Arizona are:
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What job categories do people searching Asic Verification Engineer jobs in Arizona look for? The top searched job categories for Asic Verification Engineer jobs in Arizona are:
What cities in Arizona are hiring for Asic Verification Engineer jobs? Cities in Arizona with the most Asic Verification Engineer job openings:
Infographic showing various Asic Verification Engineer job openings in Arizona as of August 2026, with employment types broken down into 92% Full Time, 3% Part Time, and 5% Contract. Highlights an 86% Physical, 5% Hybrid, and 9% Remote job distribution, with an average salary of $145,446 per year, or $69.9 per hour.

Advanced ASIC FPGA Engineer- (Sign-on Bonus Available)

General Dynamics Mission Systems, Inc

Scottsdale, AZ

$119K - $164K/yr

Full-time

Re-posted 4 days ago


General Dynamics Mission Systems rating

7.9

Company rating: 7.9 out of 10

Based on 30 frontline employees who took The Breakroom Quiz

128th of 242 rated software companies


Job description

Bachelor’s degree in Electrical or Computer Engineering, or a related Science, Engineering, Technology or Mathematics field. Also requires 5+ years of job-related experience, or a Master's degree and 3 years of job-related experience.

Clearance Requirements:

Department of Defense TS/SCI security clearance is preferred at time of hire. Candidates must be able to obtain a TS/SCI clearance within a reasonable amount of time from date of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.


Duties and Tasks:
• Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments
• Determines architecture, system simulation and detailed design approach
• Defines module interfaces and all aspects of device design and simulation
• Evaluates the process flow including but not limited to high level design, synthesis, place and route, timing and power utilization
• Creates test and simulation plans that establish functional criteria
• Verifies test results and analyzes performance
• May also review vendor capabilities, foundry technologies, device libraries and simulation tools
• Participates in the improvement of the ASIC/FPGA organizational processes
• Supports the generation of technical engineering products by using the appropriate standards, processes, procedures, and tools throughout the ASIC/FPGA development life cycle
• Contributes to the research and analysis of data, such as customer design proposal specifications, and manuals to determine feasibility of design or application
• Selects components and equipment based on analysis of specifications and reliability
• May provide leadership and/or direction to lower level employees
• Independently determines approach to solutions
• Contributes to the completion of major programs and projects
• Plans and executes project tasks for activities described above


Knowledge, Skills and Abilities:
• Proficient use and understanding of ASIC/FPGA engineering concepts, principles, and theories
• Proficient in the principles and techniques of ASIC/FPGA design
• Proficient understanding of ASIC/FPGA processes
• Proficient knowledge of other related disciplines
• Keeps abreast of technology trends
• Proficient awareness of business objectives and Engineering’s role in achieving
• Proficient in Microsoft Office applications
• Proficient in ASIC/FPGA design tools
• Proficient written and verbal communications skills
• Ability to think creatively
• Ability to multi-task
• Proficient skill in communicating issues, impacts, and corrective actions
• Proficient ability to recognize and clearly report information relevant to sound ASIC/FPGA design
• Proficient ability to develop and sell concepts and ideas
• Regular contact with senior levels of internal work groups
• Works under limited direction
• Contact with project leaders and other professionals within the Engineering department and with project teams across the company
• Some contact with external customers

• Identifies opportunities to apply AI for continuous improvement and innovation

Key Responsibilities: 

The individual will be responsible for and participate in the ASIC/FPGA product life cycle (requirements, design, implementation, and test).  Must be knowledgeable in VHDL and/or Verilog RTL coding and be proficient in micro-architecture design.  Successful candidates will have an understanding of digital design concepts and proficient in the digital design tool flow (synthesis, timing, place and route, and in system debug). 

This candidate must have an ability to operate in a team environment and collaborate across the different teams as required to accomplish the design goals.  Must have strong written and oral communication skills.

Basic Qualifications for Adv ASIC /FPGA Design Engineer: 

  • Ability to generate micro architecture and detailed design approaches
  • Proficient in async design principals, timing closure, and constraint generation
  • Proficiency in HDL (VHDL/Verilog)
  • Proficiency in scripting languages such as Tcl, Python, or Perl
  • Effective communication, presentation skills, and high proficiency in technical problem solving
  • U.S. citizenship with the ability to obtain and maintain a Secret security clearance

Preferred Qualifications: 

  • Leads technical tasks or small projects
  • Understanding of high reliability design principals
  • Experience with Xilinx and Microchip FPGAs along with associated tools (ISE, Vivado, Libero)
  • Experience with synthesis tools (Precision, Synplify)
  • Experience with verification tools (QuestaSim/UVM)
  • Experience with clock-domain-crossing tools (Questa CDC)
  • Experience with lab bring-up and debug (Oscilloscope, Logic Analyzer, ChipScope)
  • Active DoD Secret Clearance or higher

Workplace Options:
This position is fully on-site or hybrid/flex, as mutually agreed.
While on-site, you will be a part of the Scottsdale, AZ team. Learn more at https://gdmissionsystems.com/about-us/major-locations/scottsdale

Key Words:   Verification, ASIC, FPGA, SystemVerilog, Verilog, Assertions (SVA), OVM, UVM, Digital Signal Processing (DSP), functional coverage, constrained random, formal verification, constrained random testing 

#LI-Hybrid

#CJ1


This estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary. This job posting will remain open until the position is filled.
USD $122,785.00 - USD $136,215.00 /Yr.

General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high-performance team!


Equal Opportunity Employer / Individuals with Disabilities / Protected Veterans


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