You will lead, mentor, and scale a high-performing team of 20+ verification engineers to execute complex verification strategies for SoCs featuring ARM and specialized proprietary cores. Your mission ...
You will lead, mentor, and scale a high-performing team of 20+ verification engineers to execute complex verification strategies for SoCs featuring ARM and specialized proprietary cores. Your mission ...
Senior Design Verification Engineer with Security Clearance
Tempe, AZ · On-site
$193K - $290K/yr
As a Design Verification Engineer, you will be part of a verification team responsible for the full cycle of RTL verification for FPGA and ASIC designs. You will be responsible for: * Design ...
Senior Design Verification Engineer with Security Clearance
Tempe, AZ · On-site
$193K - $290K/yr
As a Design Verification Engineer, you will be part of a verification team responsible for the full cycle of RTL verification for FPGA and ASIC designs. You will be responsible for: * Design ...
Senior FPGA Design Engineer
Tucson, AZ · On-site
$86.80 - $165.20/hr
Lead small teams and mentor junior engineers. * Support internal and external technical reviews ... Experience with FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification ...
Senior FPGA Design Engineer
Tucson, AZ · On-site
$86.80 - $165.20/hr
Lead small teams and mentor junior engineers. * Support internal and external technical reviews ... Experience with FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification ...
Principal Engineer Electrical
Gilbert, AZ · On-site
$98K - $147K/yr
As a FPGA/ASIC Engineer, you will be responsible for research, requirements analysis and systems ... FPGA/ASIC verification via simulation and emulation (lab testing) * FPGA/ASIC synthesis, timing ...
Principal Engineer Electrical
Gilbert, AZ · On-site
$98K - $147K/yr
As a FPGA/ASIC Engineer, you will be responsible for research, requirements analysis and systems ... FPGA/ASIC verification via simulation and emulation (lab testing) * FPGA/ASIC synthesis, timing ...
Principal Engineer Electrical
Gilbert, AZ · On-site
$98K - $147K/yr
As a FPGA/ASIC Engineer, you will be responsible for research, requirements analysis and systems ... FPGA/ASIC verification via simulation and emulation (lab testing) * FPGA/ASIC synthesis, timing ...
Principal Engineer Electrical
Gilbert, AZ · On-site
$98K - $147K/yr
As a FPGA/ASIC Engineer, you will be responsible for research, requirements analysis and systems ... FPGA/ASIC verification via simulation and emulation (lab testing) * FPGA/ASIC synthesis, timing ...
Principal Engineer
$174K/yr
Duties: Perform semiconductor engineering design, development, and testing for firm products and ... ASIC design verification; 8. Regression management and artifact tracking; 9. C-based test ...
New
Principal Engineer
$174K/yr
Duties: Perform semiconductor engineering design, development, and testing for firm products and ... ASIC design verification; 8. Regression management and artifact tracking; 9. C-based test ...
New
Senior FPGA Design Engineer
$116K - $160K/yr
As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
Senior FPGA Design Engineer
$116K - $160K/yr
As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
Sr Principal ASIC FPGA Engineer (Sign-on Bonus Available)
Scottsdale, AZ · On-site
$182K - $202K/yr
Duties and Tasks: • Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments ...
Sr Principal ASIC FPGA Engineer (Sign-on Bonus Available)
Scottsdale, AZ · On-site
$182K - $202K/yr
Duties and Tasks: • Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments ...
Duties and Tasks: • Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments ...
Duties and Tasks: • Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments ...
Senior FPGA Design Engineer
$116K - $160K/yr
As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
Senior FPGA Design Engineer
$116K - $160K/yr
As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
Senior FPGA Design Engineer
Tucson, AZ · On-site
$116K - $160K/yr
As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
Senior FPGA Design Engineer
Tucson, AZ · On-site
$116K - $160K/yr
As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
Senior FPGA Design Engineer
$122K - $168K/yr
As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
Senior FPGA Design Engineer
$122K - $168K/yr
As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
Senior FPGA Design Engineer with Security Clearance
Tucson, AZ · On-site
$114K - $157K/yr
As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
Senior FPGA Design Engineer with Security Clearance
Tucson, AZ · On-site
$114K - $157K/yr
As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
As a Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
As a Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
As a Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
As a Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
As a Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
As a Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Principal Electrical Engineer-FPGA Design- Onsite Tucson, AZ
Tucson, AZ · On-site
$116K - $160K/yr
As a Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Principal Electrical Engineer-FPGA Design- Onsite Tucson, AZ
Tucson, AZ · On-site
$116K - $160K/yr
As a Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Principal Electrical Engineer-FPGA Design- Onsite Tucson, AZ with Security Clearance
Tucson, AZ · On-site
$114K - $157K/yr
As a Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Principal Electrical Engineer-FPGA Design- Onsite Tucson, AZ with Security Clearance
Tucson, AZ · On-site
$114K - $157K/yr
As a Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Advanced ASIC FPGA Verification Engineer for Crypto and Cross Domain Solutions
Scottsdale, AZ · On-site
$135K - $150K/yr
Mentor junior verification engineers on UVM methodology, coverage-driven verification practices, and debugging techniques * Support formal verification activities including property checking ...
Advanced ASIC FPGA Verification Engineer for Crypto and Cross Domain Solutions
Scottsdale, AZ · On-site
$135K - $150K/yr
Mentor junior verification engineers on UVM methodology, coverage-driven verification practices, and debugging techniques * Support formal verification activities including property checking ...
Advanced ASIC FPGA Verification Engineer for Crypto and Cross Domain Solutions
Scottsdale, AZ · On-site
$135K - $150K/yr
Mentor junior verification engineers on UVM methodology, coverage-driven verification practices, and debugging techniques * Support formal verification activities including property checking ...
Advanced ASIC FPGA Verification Engineer for Crypto and Cross Domain Solutions
Scottsdale, AZ · On-site
$135K - $150K/yr
Mentor junior verification engineers on UVM methodology, coverage-driven verification practices, and debugging techniques * Support formal verification activities including property checking ...
Asic Verification Engineer information
See Arizona salary details
$82K - $92.1K
9% of jobs
$92.1K - $102.2K
2% of jobs
$102.2K - $112.3K
2% of jobs
$112.3K - $122.3K
4% of jobs
$125.9K is the 25th percentile. Wages below this are outliers.
$122.3K - $132.4K
22% of jobs
$132.4K - $142.5K
4% of jobs
The median wage is $152.6K / yr.
$142.5K - $152.6K
6% of jobs
$161.4K is the 75th percentile. Wages above this are outliers.
$152.6K - $162.7K
29% of jobs
$162.7K - $172.7K
9% of jobs
$172.7K - $182.8K
6% of jobs
$182.8K - $192.9K
6% of jobs
$82K
$145.4K
$192.9K
How much do asic verification engineer jobs pay per year?
What is the salary of an ASIC verification engineer?
What are some common challenges faced by ASIC Verification Engineers during the verification process?
What are the key skills and qualifications needed to thrive as an ASIC Verification Engineer, and why are they important?
What does an ASIC verification engineer do?
What is an ASIC Verification Engineer?
What is the difference between Asic Verification Engineer vs Digital Design Engineer?
| Aspect | Asic Verification Engineer | Digital Design Engineer |
|---|---|---|
| Primary Focus | Verifying ASIC designs for correctness and functionality | Designing digital circuits and architectures |
| Skills & Certifications | Hardware description languages (HDL), verification tools, scripting | HDL, digital logic, circuit design |
| Work Environment | Verification labs, simulation environments | Design teams, CAD tools, prototyping labs |
| Industry Usage | Semiconductor, electronics manufacturing | Semiconductor, consumer electronics, computing |
While both roles require expertise in HDL and semiconductor industry experience, Asic Verification Engineers focus on testing and validating ASIC designs, ensuring they meet specifications. Digital Design Engineers primarily create and develop digital circuits. Both roles are essential in the chip development process but differ in their core responsibilities and daily tasks.
What is an ASIC Verification Engineer?
An ASIC verification engineer works with system designers and architects to test performance and validate hardware components and systems. You plan and develop a verification environment while coordinating with developers and architects throughout the design process. Your duties involve working closely with these other teams during the design process. Your responsibilities may include using computer hardware languages such as Verilog. In this career, you work on hardware design and use algorithms, data structure analysis, and other advanced design techniques.

Full-time
Medical, Retirement
Re-posted 16 hours ago
Microchip Technology rating
8.0
Based on 33 frontline employees who took The Breakroom Quiz
57th of 156 rated electronics manufacturers
Job description
People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it's won us countless awards for diversity and workplace excellence.
Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.
Visit our careers page to see what exciting opportunities and company perks await!
Job Description:
As the SoC Verification Manager, you will be a critical leader in our dsPIC Microcontroller Business Unit, responsible for ensuring the functional integrity of our next-generation 32-bit MCU products. You will lead, mentor, and scale a high-performing team of 20+ verification engineers to execute complex verification strategies for SoCs featuring ARM and specialized proprietary cores.
Your mission is to drive "First-Pass Silicon Success" by bridging the gap between architectural intent and silicon implementation through cutting-edge UVM and Formal methodologies.
Key Responsibilities
- Strategic Leadership: Own the end-to-end verification strategy, from initial test plan development to final tape-out sign-off for multiple concurrent MCU projects.
- Team Management: Lead and develop a global team of 20+ engineers. Manage resource allocation, performance reviews, and technical career growth.
- Architecture Oversight: Define and refine scalable, reusable testbench architectures that support both simulation-based (UVM) and formal-based verification flows.
- Technical Excellence: Drive the adoption of advanced techniques, including Formal Verification, Power-Aware Verification (UPF/CPF), and Hardware-Software Co-verification.
- Cross-Functional Collaboration: Partner closely with Architecture, RTL Design, Digital Signal Processing (DSP), and Physical Design teams to resolve complex integration issues and architectural bottlenecks.
- Methodology Innovation: Continuously improve verification efficiency through automation, Python/Perl scripting, and the integration of AI-driven verification tools.
Requirements/Qualifications:
Required Qualifications
- Education: Bachelor of Science in Electrical Engineering or Computer Science, with strong digital design fundamentals.
- Experience: 12+ years in SoC Verification, with at least 5 years in a formal leadership or management role.
- Domain Expertise: Proven track record of successful tape-outs for 32-bit Microcontrollers. Deep understanding of MCU peripherals (DMA, Timers, ADC/DAC interfaces, Security modules).
- Processor Knowledge: Direct experience verifying SoCs with ARM cores (Cortex-M) and proprietary RISC-based architectures.
- Methodologies:
- Expert-level command of SystemVerilog and UVM (Universal Verification Methodology).
- Strong hands-on experience with Formal Verification (Property Checking, Connectivity Checking) using tools like JasperGold or VC Formal.
- Protocol Proficiency: In-depth knowledge of AMBA bus protocols (AHB, APB, AXI).
- Verification Infrastructure: Experience defining coverage-driven verification (CDV) metrics and managing massive regression suites. Module level verification plan development, TB plan, TB development and fullchip integration of the module level TB, develop effective functional assertions and coverpoints.
Preferred Skills
- Strong background in Gate-Level Simulations (GLS) and power-aware verification.
- Experience with Post-Silicon Validation, customer support and its alignment with pre-silicon test plans.
- Experience with analog mixed-mode (AMS) simulations.
- Familiarity with functional safety standards (ISO 26262) for automotive MCU applications.
Travel Time:
0% - 25%
Physical Attributes:
Hearing, Seeing, Talking, Works Alone, Works Around Others
Physical Requirements:
sitting 90%
Pay Range:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below:
Benefits of working at Microchip
The annual base salary range for this position, which could be performed in the US, is $91,000 - $247,000.*
*Range is dependent on numerous factors including job location, skills and experience.
Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.
To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.
What Microchip Technology employees say
Pay
Benefits
Hours and flexibility
Workplace
Get the full story on Breakroom
About Microchip
Sourced by ZipRecruiter
Industry
It services
Company size
10,000+ Employees
Headquarters location
Chandler, AZ, US
Year founded
1989