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Ai Chip Design Rtl Jobs in Dolton, IL (NOW HIRING)

Design, implement, and verify RTL logic in Verilog or SystemVerilog targeting ultra-low-latency ... Use AI tools to accelerate your development workflow - RTL review, testbench generation, debugging ...

Senior FPGA Engineer (Algo)

Chicago, IL · On-site

$150K - $250K/yr

Strong skills in RTL logic design (Verilog) and verification; 2+ years of experience writing ... Experience with the design of system-on-chip (SOC) architectures, memory & processor subsystems ...

... manufacturing for the AI era. We design and deliver custom-engineered, end-to-end fiber ... integration, fiber-to-chip interconnect, and high-volume manufacturing * Form strategic ...

Recent advancements in underlying technology have finally made it possible for AI to impact ... Clonal Hematopoiesis (CHIP) Disambiguation: Design and integrate machine learning classifiers and ...

Data Engineer

Chicago, IL · On-site

$100K - $115K/yr

... chip brands and marquee properties. Our success is rooted in our people, our high character ... Contribute to relational data design--tables and relationships, primary/foreign keys, and ...

Data Engineer

Chicago, IL · On-site

$100K - $115K/yr

... chip brands and marquee properties. Our success is rooted in our people, our high character ... Contribute to relational data design-tables and relationships, primary/foreign keys, and ...

Chicago, IL . Building off AECOM's considerable expertise in infrastructure design and ... Leveraging AI tools to conduct baseline assessments and secondary research. * Conducting ...

Chicago, IL. Building off AECOM's considerable expertise in infrastructure design and ... Leveraging AI tools to conduct baseline assessments and secondary research. * Conducting ...

Chicago, IL. Building off AECOM's considerable expertise in infrastructure design and ... Leveraging AI tools to conduct baseline assessments and secondary research. * Conducting ...

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Ai Chip Design Rtl information

See Dolton, IL salary details

$76.9K

$133.1K

$174.3K

How much do ai chip design rtl jobs pay per year?

As of Aug 9, 2026, the average yearly pay for ai chip design rtl in Dolton, IL is $133,114.00, according to ZipRecruiter salary data. Most workers in this role earn between $129,900.00 and $129,900.00 per year, depending on experience, location, and employer.

What is the difference between Ai Chip Design Rtl vs Ai Chip Verification Engineer?

AspectAi Chip Design RtlAi Chip Verification Engineer
Primary FocusDeveloping and implementing Register Transfer Level (RTL) code for AI chipsVerifying and validating RTL designs to ensure functionality
Skills RequiredHDL languages (Verilog/VHDL), digital design, FPGA/ASIC knowledgeSimulation, testbench creation, debugging, scripting skills
Work EnvironmentDesign teams, hardware development labs, EDA toolsVerification teams, simulation environments, test setups
CertificationsHardware design certifications, FPGA/ASIC trainingVerification methodologies, UVM, SystemVerilog certifications

While Ai Chip Design Rtl focuses on creating the hardware description code for AI chips, Ai Chip Verification Engineer ensures that the RTL design functions correctly through rigorous testing. Both roles require knowledge of HDL languages and work closely within hardware development teams, but their core responsibilities differ—design versus verification.

What are common challenges faced by AI Chip Design RTL engineers during the verification process?

AI Chip Design RTL engineers often encounter challenges in ensuring their designs meet complex functional and performance requirements, especially given the rapid pace of AI hardware advancements. Verification can be particularly demanding due to the need to simulate and test intricate AI workloads, manage large datasets, and debug subtle timing or logic errors. Collaboration with verification teams, system architects, and software engineers is essential to address these issues efficiently and to ensure seamless integration of the RTL code into the broader chip design. Staying up-to-date with the latest verification tools and methodologies is also crucial for success in this role.

What is an AI Chip Design RTL engineer?

AI Chip Design RTL (Register Transfer Level) engineers are specialists who design the digital logic for chips used in artificial intelligence applications. They use hardware description languages like Verilog or VHDL to create and validate the architecture and functionality of these chips before they are manufactured. Their work ensures that AI processors are efficient, high-performing, and meet the requirements of modern AI workloads. RTL engineers collaborate closely with verification, software, and hardware teams to optimize chip performance and power consumption.

What skills and qualifications are needed to thrive as an AI Chip Design RTL engineer?

To thrive as an AI Chip Design RTL Engineer, you need a solid background in digital design, computer architecture, and proficiency in Hardware Description Languages (HDLs) like Verilog or VHDL, often supported by a degree in electrical or computer engineering. Experience with simulation tools (e.g., ModelSim, Synopsys), ASIC/FPGA design flows, and relevant certifications are highly valued. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help you excel in collaborative and complex design environments. These competencies are crucial for creating efficient, reliable AI hardware that meets performance and power requirements in a fast-evolving field.
What cities near Dolton, IL are hiring for Ai Chip Design Rtl jobs? Cities near Dolton, IL with the most Ai Chip Design Rtl job openings:
Infographic showing various Ai Chip Design Rtl job openings in Dolton, IL as of August 2026, with employment types broken down into 100% Full Time. Highlights an 75% In-person, and 25% Remote job distribution, with an average salary of $133,114 per year, or $64 per hour.

Director of Facilities Engineering- AI Data Centers/Factories

EZ Blockchain

Chicago, IL • On-site

$150K - $180K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Posted 13 days ago


Job description

Position Summary
The Director of Facilities Engineeringis responsible forthe engineering strategy, design standards, reliability, and lifecycle management of mission-critical infrastructure supporting AI and high-performance computing (HPC) data centers.
We expect the Director of Facilities Engineering to lead the engineering strategy, design, reliability, and operation of mission-critical infrastructure supporting AI data center campuses. This role oversees multidisciplinary engineering teams and ensures highly available, scalable, and energy-efficient facilities that support next-generation AI and high-performance computing (HPC) environments.
This position requires critical thinking and adaptation to a fast-paced, always-changing, and evolving AI data center space. AI Factories are a new type of data center that requires a new, flexible approach but with a conservative engineering view. We expect the ideal candidate to be open-minded and not afraid to experiment.
Role Mandate:
  • Create and lead the portfolio-wide facilities engineering program for greenfield campuses, powered-shell projects, modular deployments, expansions and selected retrofit opportunities.
  • Develop a repeatable campus architecture and set of design standards that can be adapted intelligently to different utility systems, climates, site constraints, deployment schedules and customer requirements.
  • Serve as the senior technical owner from site screening and diligence through design, construction, commissioning, turnover and initial operating readiness.
  • Build the internal engineering capability and external partner network required to move multiple projects forward in parallel without compromising reliability, safety or capital discipline.

Key Responsibilities
  • Provide strategic direction and leadership for the facilities of operations of multiple AI Factories (data centers), ensuring 24/7 uptime and operational excellence for mechanical, electrical, and plumbing infrastructure.
  • Develop and execute the facilities engineering strategy for AI data centers distributed across multiple campuses across the county.
  • Plan and execute standardized infrastructure for new data center buildouts, colocation expansions, and data center expansions, ensuring seamless integration of mechanical, electrical, and plumbing infrastructure.
  • Build and lead electrical, mechanical, controls, and reliability engineering teams.
  • Establish engineering standards, technical specifications, and design guidelines across multiple facilities to meet the constantly evolving AI data center for white space demand.
  • Oversee the engineering lifecycle of critical infrastructure, including electrical distribution, UPS, generators, cooling systems, BMS, EPMS, DCIM, and fire protection systems.
  • Design and optimize infrastructure for high-density GPU and liquid-cooled AI environments using the newest NVIDIA and AMD chip systems. Work with direct-to-chip cooling systems and high-density racks with up to 150 KW per rack.
  • Drive reliability engineering, predictive maintenance, root cause analysis, and asset lifecycle management across a portfolio of new deployments.
  • Provide technical oversight for new construction, expansion, commissioning, and modernization projects.
  • Improve energy efficiency through initiatives that optimize PUE, WUE, and sustainability.
  • Ensure compliance with applicable codes, standards, and engineering best practices.
  • Manage engineering budgets, technical vendors, consultants, and capital improvement programs.

Technical Expertise
  • Mission-critical electrical and mechanical infrastructure
  • Medium-voltage power distribution, UPS, generators, and power monitoring
  • Chilled water plants, liquid cooling, thermal management, and HVAC systems
  • BMS, EPMS, and DCIM platforms
  • Reliability-centered maintenance (RCM), FMEA, commissioning, and asset lifecycle management
  • AI/HPC infrastructure and high-density compute environments

Leadership Profile
  • Adaptive systems thinker: able to create standards without becoming rigid and to distinguish durable engineering principles from temporary market conventions.
  • Builder mentality: energized by ambiguity, early-stage platform development and creating processes, teams and technical infrastructure from the ground up.
  • Commercially grounded: understands how engineering choices affect land value, customer fit, capital requirements, delivery schedule, bankability and long-term returns.
  • Decisive and transparent: makes sound decisions with incomplete information, documents assumptions and escalates risks early.
  • Collaborative authority: can challenge customers, utilities, consultants, contractors and executives constructively while maintaining trust and momentum.
  • Hands-on executive: equally comfortable reviewing a one-line diagram, walking a site, negotiating an OEM strategy, presenting to investors and building a long-term organization.

Success Measures
  • Quality and speed of technical decisions across the site pipeline.
  • Reliability, maintainability, constructability, and adaptability of selected designs.
  • Accuracy and transparency of capital, schedule, and technical-risk assumptions.
  • Reduction in redesign, change orders, commissioning issues and avoidable lifecycle cost.
  • Ability to support evolving customer requirements without losing standardization or investment discipline.
  • Strength of the engineering team, consultant network, vendor relationships, and repeatable platform processes built under this leader.

Required Qualifications
  • Bachelor's degree in mechanical engineering, Electrical Engineering, or a related field.
  • 10+ years of engineering experience in mission-critical facilities, data centers, industrial, or power infrastructure.
  • 7+ years leading multidisciplinary engineering teams.
  • Strong expertise in electrical and mechanical systems supporting high-availability environments.
  • Experience with hyperscale, AI, or HPC data center infrastructure.
  • Knowledge of engineering design, commissioning, and reliability engineering practices.

Preferred Qualifications
  • Master's degree in engineering, Engineering Management, or MBA.
  • Professional Engineer (PE) license.
  • Industry certifications such as CEM, CDCP/CDCMP, PMP, or LEED AP.

Why join this venture
This role offers the opportunity to shape a data center platform at the point where the most important technical decisions are still being made. The director will have direct influence over site strategy, campus architecture, customer solutions, capital deployment, team design, and the engineering identity of the company. We value practical judgment, intellectual honesty, and thoughtful experimentation. The right leader will be given meaningful authority to build a program-not merely inherit one.
Company Benefits:
-Health (medical, dental, vision)
-PTO
-Sick
-Maternal/Paternal Leave
-FSA/HSA
-401K
-Supplemental Options