ASIC/SoC RTL Design Engineer Location: Palo Alto, CA (Or potentially Burlington, MA) Length of Contract: 6 months+ (Temp-to-Perm) Ideal Start: 6/1/2026 Responsibilities : Own end-to-end design of ...
ASIC/SoC RTL Design Engineer Location: Palo Alto, CA (Or potentially Burlington, MA) Length of Contract: 6 months+ (Temp-to-Perm) Ideal Start: 6/1/2026 Responsibilities : Own end-to-end design of ...
ASIC Engineer
San Jose, CA · On-site
$194K/yr
Lead ASIC/SoC architecture and micro-architecture development from concept through production * Collaborate closely with customers to refine requirements and ensure successful delivery * Drive design ...
Quick apply
ASIC Engineer
San Jose, CA · On-site
$194K/yr
Lead ASIC/SoC architecture and micro-architecture development from concept through production * Collaborate closely with customers to refine requirements and ensure successful delivery * Drive design ...
ASIC Engineer
San Jose, CA · On-site
$192K/yr
Lead ASIC/SoC architecture and micro-architecture development from concept through production * Collaborate closely with customers to refine requirements and ensure successful delivery * Drive design ...
ASIC Engineer
San Jose, CA · On-site
$192K/yr
Lead ASIC/SoC architecture and micro-architecture development from concept through production * Collaborate closely with customers to refine requirements and ensure successful delivery * Drive design ...
ASIC Design Verification Engineer
$115K - $135K/yr
Position SummaryAs a Design Verification Engineer, you will support the verification of ASIC, SoC, IP, subsystem, and FPGA designs. You will help develop testbenches, create tests, run simulations ...
ASIC Design Verification Engineer
$115K - $135K/yr
Position SummaryAs a Design Verification Engineer, you will support the verification of ASIC, SoC, IP, subsystem, and FPGA designs. You will help develop testbenches, create tests, run simulations ...
Technical Program Manager - ASIC/ SoC
Sunnyvale, CA · On-site
$200K - $250K/yr
Collaborate with engineering leaders (ASIC/SOC leads) to create project execution plans for ASIC/SOC development considering all criteria to design products the meet the power/performance and ...
Technical Program Manager - ASIC/ SoC
Sunnyvale, CA · On-site
$200K - $250K/yr
Collaborate with engineering leaders (ASIC/SOC leads) to create project execution plans for ASIC/SOC development considering all criteria to design products the meet the power/performance and ...
Key Responsibilities • Develop and execute verification plans for ASIC, SoC, subsystem, IP, and FPGA designs. • Build and maintain verification environments using SystemVerilog, UVM, constrained ...
Key Responsibilities • Develop and execute verification plans for ASIC, SoC, subsystem, IP, and FPGA designs. • Build and maintain verification environments using SystemVerilog, UVM, constrained ...
Principal ASIC Design Verification Engineer
$200K - $220K/yr
Key Responsibilities • Lead verification strategy, planning, and execution for complex ASIC, SoC, subsystem, IP, and FPGA designs. • Define verification architecture, testbench structure ...
Principal ASIC Design Verification Engineer
$200K - $220K/yr
Key Responsibilities • Lead verification strategy, planning, and execution for complex ASIC, SoC, subsystem, IP, and FPGA designs. • Define verification architecture, testbench structure ...
Why is This a Great Opportunity Leading custom ASIC and SoC development company with a pipeline of new technology projects for top companies. Employees are real contributors, often working ...
Why is This a Great Opportunity Leading custom ASIC and SoC development company with a pipeline of new technology projects for top companies. Employees are real contributors, often working ...
Senior ASIC Engineer
Bodega Bay, CA · On-site
$180K - $230K/yr
Why is This a Great Opportunity Leading custom ASIC and SoC development company with a pipeline of new technology projects for top companies. Employees are real contributors, often working ...
Quick apply
Senior ASIC Engineer
Bodega Bay, CA · On-site
$180K - $230K/yr
Why is This a Great Opportunity Leading custom ASIC and SoC development company with a pipeline of new technology projects for top companies. Employees are real contributors, often working ...
ASIC SoC Verification Engineer
Austin, TX · On-site
What You Will Do Develop SoC-level test cases with opportunities to specialize in areas such as: External interface traffic patterns ASIC internal functionality (DSPs, MCUs, CPU cores, ARM ...
New
ASIC SoC Verification Engineer
Austin, TX · On-site
What You Will Do Develop SoC-level test cases with opportunities to specialize in areas such as: External interface traffic patterns ASIC internal functionality (DSPs, MCUs, CPU cores, ARM ...
New
ASIC/SOC Verification Engineer Location: San Jose, CA Duration: Long term Required Skills: * B.S., or M.S. in Computer Engineering or Electrical Engineering * Prior Verification experience and ...
ASIC/SOC Verification Engineer Location: San Jose, CA Duration: Long term Required Skills: * B.S., or M.S. in Computer Engineering or Electrical Engineering * Prior Verification experience and ...
ASIC/SOC Verification Engineer Location: San Jose, CA Duration: Long term Required Skills: * B.S., or M.S. in Computer Engineering or Electrical Engineering * Prior Verification experience and ...
ASIC/SOC Verification Engineer Location: San Jose, CA Duration: Long term Required Skills: * B.S., or M.S. in Computer Engineering or Electrical Engineering * Prior Verification experience and ...
ASIC/SoC Design Engineer
San Jose, CA · On-site
$145K/yr
You are passionate about complex Adaptive SoC and FPGA Configuration solutions and thrive in ... Proven background experiences in ASIC design. * Knowledge of industry-standard on-chip interconnect ...
ASIC/SoC Design Engineer
San Jose, CA · On-site
$145K/yr
You are passionate about complex Adaptive SoC and FPGA Configuration solutions and thrive in ... Proven background experiences in ASIC design. * Knowledge of industry-standard on-chip interconnect ...
Project Architect - ASIC Manufacturing
San Jose, CA · On-site
$97K - $130K/yr
Lead technical customer engagements for ASIC/SoC manufacturing projects. * Define project scope, timelines, costs, risks, and Statements of Work (SOW). * Provide technical expertise in ASIC Packaging ...
New
Project Architect - ASIC Manufacturing
San Jose, CA · On-site
$97K - $130K/yr
Lead technical customer engagements for ASIC/SoC manufacturing projects. * Define project scope, timelines, costs, risks, and Statements of Work (SOW). * Provide technical expertise in ASIC Packaging ...
New
The Amazon LEO team is looking for a Sr Technical Program Manager with experience in complex ASIC/SOC development of managing various phases of pre-silicon such as architecture, front end design, pre ...
The Amazon LEO team is looking for a Sr Technical Program Manager with experience in complex ASIC/SOC development of managing various phases of pre-silicon such as architecture, front end design, pre ...
ASIC Verification Engineer
Burlingame, CA · On-site
Title: ASIC Verification Engineer (Python/Cocotb) Hybrid Role- 3 days onsite/2 days remote ... Client needs someone to lead verification for complex SoC subsystems using Python-based frameworks ...
ASIC Verification Engineer
Burlingame, CA · On-site
Title: ASIC Verification Engineer (Python/Cocotb) Hybrid Role- 3 days onsite/2 days remote ... Client needs someone to lead verification for complex SoC subsystems using Python-based frameworks ...
ASIC Design Verification Engineer
Austin, TX · On-site
$134K - $164K/yr
RTL Debug & ASIC/SoC Verification Key Responsibilities * Develop UVM/SystemVerilog verification environments. * Create test plans, testbenches, sequences, scoreboards, and checkers. * Perform block ...
New
ASIC Design Verification Engineer
Austin, TX · On-site
$134K - $164K/yr
RTL Debug & ASIC/SoC Verification Key Responsibilities * Develop UVM/SystemVerilog verification environments. * Create test plans, testbenches, sequences, scoreboards, and checkers. * Perform block ...
New
The Amazon LEO team is looking for a Sr Technical Program Manager with experience in complex ASIC/SOC development of managing various phases of pre-silicon such as architecture, front end design, pre ...
The Amazon LEO team is looking for a Sr Technical Program Manager with experience in complex ASIC/SOC development of managing various phases of pre-silicon such as architecture, front end design, pre ...
ASIC/SoC Design Engineer
San Jose, CA · Hybrid
You are passionate about complex Adaptive SoC and FPGA Configuration solutions and thrive in ... Proven background experiences in ASIC design. * Knowledge of industry-standard on-chip interconnect ...
ASIC/SoC Design Engineer
San Jose, CA · Hybrid
You are passionate about complex Adaptive SoC and FPGA Configuration solutions and thrive in ... Proven background experiences in ASIC design. * Knowledge of industry-standard on-chip interconnect ...
Sr. Asic Design Verification Engineer
Austin, TX · On-site
$134K - $164K/yr
RTL Debug & ASIC/SoC Verification Key Responsibilities * Develop UVM/SystemVerilog verification environments. * Create test plans, testbenches, sequences, scoreboards, and checkers. * Perform block ...
Sr. Asic Design Verification Engineer
Austin, TX · On-site
$134K - $164K/yr
RTL Debug & ASIC/SoC Verification Key Responsibilities * Develop UVM/SystemVerilog verification environments. * Create test plans, testbenches, sequences, scoreboards, and checkers. * Perform block ...
Asic Soc information
See salary details
$140K - $147.2K
4% of jobs
$147.2K - $154.5K
12% of jobs
$158.7K is the 25th percentile. Wages below this are outliers.
$154.5K - $161.7K
16% of jobs
$161.7K - $168.9K
16% of jobs
The median wage is $170.4K / yr.
$168.9K - $176.1K
13% of jobs
$176.1K - $183.4K
8% of jobs
$189.8K is the 75th percentile. Wages above this are outliers.
$183.4K - $190.6K
7% of jobs
$190.6K - $197.8K
6% of jobs
$197.8K - $205K
7% of jobs
$205K - $212.3K
5% of jobs
$212.3K - $219.5K
5% of jobs
$140K
$177.7K
$219.5K
How much do asic soc jobs pay per year?
As of Jul 30, 2026, the average yearly pay for asic soc in the United States is $177,653.00, according to ZipRecruiter salary data. Most workers in this role earn between $159,000.00 and $195,000.00 per year, depending on experience, location, and employer.
What is the difference between Asic Soc vs FPGA Designer?
| Aspect | Asic Soc | FPGA Designer |
|---|---|---|
| Required Skills | Hardware design, embedded systems, VHDL/Verilog, ASIC development | Hardware description languages, FPGA architecture, VHDL/Verilog |
| Work Environment | Semiconductor companies, integrated circuit design labs | Electronics firms, prototyping labs, FPGA development environments |
| Industry Usage | Consumer electronics, automotive, telecommunications | Prototyping, testing, low-volume production |
Both Asic Soc and FPGA Designer roles involve hardware description languages and embedded systems, but Asic Soc engineers focus on designing integrated circuits for mass production, while FPGA Designers work on flexible, reprogrammable hardware for testing and prototyping. The skills overlap makes them common choices for hardware development in electronics industries.
More about Asic Soc jobs
What cities are hiring for Asic Soc jobs? Cities with the most Asic Soc job openings:
What states have the most Asic Soc jobs? States with the most job openings for Asic Soc jobs include:
What job categories do people searching Asic Soc jobs look for? The top searched job categories for Asic Soc jobs are:
Other
Re-posted 24 days ago
Job description
Title: ASIC/SoC RTL Design Engineer
Location: Palo Alto, CA (Or potentially Burlington, MA)
Length of Contract: 6 months+ (Temp-to-Perm)
Ideal Start: 6/1/2026
Responsibilities :
Own end-to-end design of complex SoC subsystems, driving architecture, RTL implementation, and tapeout. Focus on high-performance Datapath, PPA optimization, and cross-functional integration across silicon, firmware, and system teams.
Must haves:
- 8 12+ years in ASIC/SoC digital design with hands-on RTL ownership
- Strong SystemVerilog/Verilog RTL development (Datapath, control logic, state machines)
- Proven experience owning subsystems from architecture RTL tapeout
- Deep understanding of PPA tradeoffs, timing closure, clock/reset, and power-aware design
- Experience designing high throughput Datapath (buffering, arbitration, memory hierarchy)
- Background in advanced nodes ( 28nm) and cross-functional collaboration (verification, systems, firmware)
Pluses:
- Experience with compute-intensive pipelines (DSP, AI, beamforming, MAC Datapath)
- Exposure to sensor / imaging systems (e.g., ultrasound, data acquisition)
- Experience with programmable compute blocks (AI accelerators, MPUs, eFPGA)
About Oxford Global Resources
Sourced by ZipRecruiter
Oxford Global Resources delivers tailored solutions for any technical challenges you face using our partnership-first approach. We specialize in workforce mobilization, digital transformation, and modern enterprise. We are committed to providing you with The Right Talent. Right Now. In 1984, we started Oxford with a handful of employees in a converted schoolhouse in Reading, Massachusetts. The people that shape our organization are some of the best in the industry. They are dedicated to making an impact and are with you every step of the way. We strive to meet the most pressing needs, solve the most complex problems, and go beyond expectations for our clients and our consultants. Together, we drive great outcomes. Whether you’d like to join the thousands of professionals who trust Oxford to advance their careers or partner with us to solve a challenge your business is facing, contact us at any of our 35 global offices.
Industry
Recruiting and staffing services
Company size
501 - 1,000 Employees
Headquarters location
Beverly, MA, US
Year founded
1984