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Asic Soc Jobs (NOW HIRING)

SpaceX

ASIC/SOC DFT Engineer (Silicon Engineering)

Palo Alto, CA · On-site

$155K - $210K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

ASIC/SOC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system.

SpaceX

ASIC/SOC DFT Engineer (Silicon Engineering)

Palo Alto, CA · On-site

$155K - $210K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

ASIC/SOC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system.

Bolt Graphics

RTL Design Tech Lead (ASIC/SoC)

Sunnyvale, CA · On-site

$250K - $350K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

About the role: We're looking for a seasoned RTL Design Tech Lead to drive micro-architecture, RTL development, and technical execution for complex ASIC/SoC programs. This role combines deep hands-on ...

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$177.7K

$219.5K

How much do asic soc jobs pay per year?

As of Aug 20, 2026, the average yearly pay for asic soc in the United States is $177,653.00, according to ZipRecruiter salary data. Most workers in this role earn between $159,000.00 and $195,000.00 per year, depending on experience, location, and employer.

What is the difference between Asic Soc vs FPGA Designer?

AspectAsic SocFPGA Designer
Required SkillsHardware design, embedded systems, VHDL/Verilog, ASIC developmentHardware description languages, FPGA architecture, VHDL/Verilog
Work EnvironmentSemiconductor companies, integrated circuit design labsElectronics firms, prototyping labs, FPGA development environments
Industry UsageConsumer electronics, automotive, telecommunicationsPrototyping, testing, low-volume production

Both Asic Soc and FPGA Designer roles involve hardware description languages and embedded systems, but Asic Soc engineers focus on designing integrated circuits for mass production, while FPGA Designers work on flexible, reprogrammable hardware for testing and prototyping. The skills overlap makes them common choices for hardware development in electronics industries.

Is ASIC a good career?

An ASIC (Application-Specific Integrated Circuit) design engineer or developer role is considered a specialized and in-demand career in the semiconductor and electronics industry. It requires knowledge of digital design, hardware description languages like VHDL or Verilog, and often involves working with CAD tools; the field offers opportunities for growth and competitive salaries. However, it can also involve long hours and continuous learning to keep up with technological advancements.

What is ASIC SoC design?

ASIC SoC design involves creating custom integrated circuits that combine multiple components, such as processors, memory, and peripherals, onto a single chip for specific applications. It requires knowledge of hardware description languages like VHDL or Verilog, and often involves simulation, verification, and layout tools to ensure performance and reliability.
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Asic Soc jobs near you
Infographic showing various Asic Soc job openings in the United States as of August 2026, with employment types broken down into 1% As Needed, 87% Full Time, 3% Part Time, and 9% Contract. Highlights an 79% Physical, 7% Hybrid, and 14% Remote job distribution, with an average salary of $177,653 per year, or $85.4 per hour.

ASIC/SOC DFT Engineer (Silicon Engineering)

SpaceX

Palo Alto, CA

$155K - $210K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted 13 days ago

SpaceX rating

8.7

Company rating: 8.7 out of 10

Based on 149 frontline employees who took The Breakroom Quiz

17th of 72 rated aerospace companies

Job description

ASIC/SOC DFT ENGINEER (SILICON ENGINEERING)

At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system - thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact and are looking for best-in-class engineers to help maximize Starlink's utility for communities and businesses around the globe. 

We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.   

RESPONSIBILITIES:

  • Responsible for evaluating design readiness for scan insertion through RTL and physical design Scan Design Rule Check (DRC) tools
  • Integration and verification of Design for Test (DFT) fabrics and IP within Subsystems
  • Running and evaluating scan insertion through synthesis tools and refining scan insertion recipe for maximum coverage
  • Run ATPG(Automatic Test Pattern Generation) analysis to ensure quality scan chain construction and meeting basic coverage goals
  • Run and debug non-timing and SDF annotated gate level simulations
  • Creating ATPG content for use in post-silicon testing and validating that content through gate level simulation
  • Collaborate with circuit physical design team, ATPG team and manufacturing team to facilitate high quality scan coverage in silicon

BASIC QUALIFICATIONS:

  • Bachelor's degree in electrical engineering, computer engineering or computer science
  • 1+ years of professional experience working with ASICs
  • Experience in scan insertion or DFT setup

PREFERRED SKILLS AND EXPERIENCE:

  • Understanding of ASIC design flow, methodologies, physical design, and verification
  • Experience with high reliability design and implementations
  • Good scripting skills (csh/bash, Perl, Python etc.)
  • Familiar with implementation or integration of design blocks using Verilog/SystemVerilog
  • Familiar with UPF (unified power format), formal verification, and DRC rule checking experience
  • Ability to work in a dynamic environment with changing needs and requirements
  • Team-player, can-do attitude, and ability to work well in a group environment while still contributing on an individual basis
  • Enjoys being challenged and learning new skills

ADDITIONAL REQUIREMENTS:

  • Must be willing to work extended hours and weekends as needed

COMPENSATION AND BENEFITS:
Pay Range:
Level 1: $135,000.00 - $175,000.00
Level 2: $155,000.00 - $210,000.00

Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.

Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short and long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation and will be eligible for 10 or more paid holidays per year. Employees accrue paid sick leave pursuant to Company policy which satisfies or exceeds the accrual, carryover, and use requirements of the law.

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About SpaceX

Sourced by ZipRecruiter

Industry

Aerospace product and parts manufacturing, data services, guided missile and space vehicle manufacturing and satellite telecommunications

Company size

1,001 - 5,000 Employees

Headquarters location

Hawthorne, CA, US

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