ASIC Engineer
$194.60K/yr
Emergent technology staffing (UI/UX developers & designers, Mobility & Cloud Engineers, Big Data ... Should have 2-5 years of experience in FPGA/ASIC Development Build RTL designs of digital circuits ...
$194.60K/yr
Emergent technology staffing (UI/UX developers & designers, Mobility & Cloud Engineers, Big Data ... Should have 2-5 years of experience in FPGA/ASIC Development Build RTL designs of digital circuits ...
$194.60K/yr
Emergent technology staffing (UI/UX developers & designers, Mobility & Cloud Engineers, Big Data ... Should have 2-5 years of experience in FPGA/ASIC Development Build RTL designs of digital circuits ...
We are seeking an experienced ASIC Engineer to join a cutting-edge engineering team focused on advanced integrated circuit development. This role is ideal for someone who thrives in a highly ...
We are seeking an experienced ASIC Engineer to join a cutting-edge engineering team focused on advanced integrated circuit development. This role is ideal for someone who thrives in a highly ...
As a Senior Computer Aided Design (CAD) Engineer, you will be part of an advanced ASIC development team that is creating the semiconductor designs which will power millions of new Amazon devices. You ...
As a Senior Computer Aided Design (CAD) Engineer, you will be part of an advanced ASIC development team that is creating the semiconductor designs which will power millions of new Amazon devices. You ...
As a Senior Computer Aided Design (CAD) Engineer, you will be part of an advanced ASIC development team that is creating the semiconductor designs which will power millions of new Amazon devices. You ...
As a Senior Computer Aided Design (CAD) Engineer, you will be part of an advanced ASIC development team that is creating the semiconductor designs which will power millions of new Amazon devices. You ...
$98.12 - $107.21/hr
ASIC Engineer 5 Duties ... Oversees definition, design, verification, and documentation for ASIC development. * Determines ...
Quick apply
$98.12 - $107.21/hr
ASIC Engineer 5 Duties ... Oversees definition, design, verification, and documentation for ASIC development. * Determines ...
We are seeking a Senior ASIC Design Engineer with seasoned experience in the development of high-speed, complex ASICs. The ideal candidate has hands-on experience across the full ASIC development ...
We are seeking a Senior ASIC Design Engineer with seasoned experience in the development of high-speed, complex ASICs. The ideal candidate has hands-on experience across the full ASIC development ...
Santa Clara, CA · On-site
$175K/yr
We are seeking a Senior ASIC Design Engineer with seasoned experience in the development of high-speed, complex ASICs. The ideal candidate has hands-on experience across the full ASIC development ...
Santa Clara, CA · On-site
$175K/yr
We are seeking a Senior ASIC Design Engineer with seasoned experience in the development of high-speed, complex ASICs. The ideal candidate has hands-on experience across the full ASIC development ...
$177.50K/yr
As an ASIC Engineer, you will be an integral part of the design and development process, supporting the engineering department. The ideal candidate will demonstrate strong analytical skills ...
$177.50K/yr
As an ASIC Engineer, you will be an integral part of the design and development process, supporting the engineering department. The ideal candidate will demonstrate strong analytical skills ...
As a Senior Computer Aided Design (CAD) Engineer, you will be part of an advanced ASIC development team that is creating the semiconductor designs which will power millions of new Amazon devices. You ...
As a Senior Computer Aided Design (CAD) Engineer, you will be part of an advanced ASIC development team that is creating the semiconductor designs which will power millions of new Amazon devices. You ...
$120K - $150K/yr
Master's degree in Electrical Engineering required. 10 + years of mixed signal ASIC development ... design and/or automotive electronic design experience experience with automotive ASIC, ASSP, or ...
$120K - $150K/yr
Master's degree in Electrical Engineering required. 10 + years of mixed signal ASIC development ... design and/or automotive electronic design experience experience with automotive ASIC, ASSP, or ...
Principal ASIC Test Development Engineer This role has been designed as 'Hybrid' with an expectation that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard ...
Principal ASIC Test Development Engineer This role has been designed as 'Hybrid' with an expectation that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard ...
Principal ASIC Test Development Engineer This role has been designed as 'Hybrid' with an expectation that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard ...
Principal ASIC Test Development Engineer This role has been designed as 'Hybrid' with an expectation that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard ...
As a Senior Computer Aided Design (CAD) Engineer, you will be part of an advanced ASIC development team that is creating the semiconductor designs which will power millions of new Amazon devices. You ...
As a Senior Computer Aided Design (CAD) Engineer, you will be part of an advanced ASIC development team that is creating the semiconductor designs which will power millions of new Amazon devices. You ...
Principal ASIC Test Development Engineer This role has been designed as 'Hybrid' with an expectation that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard ...
Principal ASIC Test Development Engineer This role has been designed as 'Hybrid' with an expectation that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard ...
Principal ASIC Test Development Engineer This role has been designed as 'Hybrid' with an expectation that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard ...
Principal ASIC Test Development Engineer This role has been designed as 'Hybrid' with an expectation that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard ...
Principal ASIC Test Development Engineer This role has been designed as 'Hybrid' with an expectation that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard ...
Principal ASIC Test Development Engineer This role has been designed as 'Hybrid' with an expectation that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard ...
Principal ASIC Test Development Engineer This role has been designed as 'Hybrid' with an expectation that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard ...
Principal ASIC Test Development Engineer This role has been designed as 'Hybrid' with an expectation that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard ...
Principal ASIC Test Development Engineer This role has been designed as 'Hybrid' with an expectation that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard ...
Principal ASIC Test Development Engineer This role has been designed as 'Hybrid' with an expectation that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard ...
$65 - $72/hr
The ASIC Physical Design Engineer would be working for a Fortune 500 semiconductor and technology ... May also review vendor capability to support development.
New
$65 - $72/hr
The ASIC Physical Design Engineer would be working for a Fortune 500 semiconductor and technology ... May also review vendor capability to support development.
New
Waukesha, WI · On-site
$40 - $50/hr
Qualifications/Requirements * BS in Electrical Engineering or similar with at least 10 years mixed signal ASIC design experience. * Experience in full cycle mixed-signal ASIC development ...
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Waukesha, WI · On-site
$40 - $50/hr
Qualifications/Requirements * BS in Electrical Engineering or similar with at least 10 years mixed signal ASIC design experience. * Experience in full cycle mixed-signal ASIC development ...
$49K - $58.5K
3% of jobs
$58.5K - $68K
4% of jobs
$68K - $77.5K
16% of jobs
$78.4K is the 25th percentile. Wages below this are outliers.
$77.5K - $87K
19% of jobs
The median wage is $90.1K / yr.
$87K - $96.5K
24% of jobs
$103K is the 75th percentile. Wages above this are outliers.
$96.5K - $106K
13% of jobs
$106K - $115.5K
6% of jobs
$115.5K - $125K
5% of jobs
$125K - $134.5K
3% of jobs
$134.5K - $144K
5% of jobs
$144K - $153.5K
1% of jobs
$49K
$96.2K
$153.5K
| Aspect | Asic Development Engineer | FPGA Design Engineer |
|---|---|---|
| Required Credentials | Bachelor's or Master's in Electrical Engineering, VLSI, or related fields; knowledge of ASIC design tools | Bachelor's or Master's in Electrical Engineering, Digital Design; familiarity with FPGA development tools |
| Work Environment | Designing and verifying custom silicon chips in semiconductor labs or R&D centers | Developing and testing FPGA-based solutions in hardware labs or embedded systems environments |
| Industry Usage | Used in semiconductor companies, integrated circuit design firms, and tech giants | Common in telecommunications, aerospace, and embedded systems industries |
While both roles involve digital hardware design, Asic Development Engineers focus on creating custom chips for high-performance applications, whereas FPGA Design Engineers work on programmable hardware solutions. Both require strong digital design skills and familiarity with hardware description languages, but their end products and development environments differ.

Ideavat provides I.T staffing solutions, enabling companies & jobseekers engage successfully.
With over 20 man years of contingent staffing experience, the management & execution team is committed to provide customized staffing solutions to employers/hiring managers, helping them identify key talents. Emergent technology staffing (UI/UX developers & designers, Mobility & Cloud Engineers, Big Data/Hadoop developers & architects...& more) remains our primary focus!
Job Title: ASIC Engineer
Location: San Jose, CA
Duration: 6 Months
Minimum Required Skills:
ASIC Design, FPGA, RTL Design, Chip Architecture, ASIC, Implementation,Synthesis /Conformal (Cadence Tool for formal verification)
Description:
Should have 2-5 years of experience in FPGA/ASIC Development
Build RTL designs of digital circuits using VHDL and System Verilog
Perform frontend design development and integration of large ASIC designs
Collaborate with Chip Architecture, Design Verification, and Physical Design teams to achieve first tapeout success.
Write design documents including high level interface descriptions and design descriptions.
Write function test cases and test benches to verify functionality of designs
Team work and proactive sharing of knowledge
Comfortable working in a fast paced environment.
ASIC Design, FPGA, RTL Design, Chip Architecture, ASIC, Implementation,Synthesis /Conformal (Cadence Tool for formal verification)
All your information will be kept confidential according to EEO guidelines.
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Business schools and computer and management training
11 - 50 Employees
Campbell, CA, US
2022