ASIC Manager
Beaverton, OR · On-site
We are looking for an experienced ASIC Engineering Manager to lead external ASIC development partnerships, drive aggressive cost targets, and manage successful chip execution from architecture ...
Quick apply
ASIC Manager
Beaverton, OR · On-site
We are looking for an experienced ASIC Engineering Manager to lead external ASIC development partnerships, drive aggressive cost targets, and manage successful chip execution from architecture ...
Working shoulder-to-shoulder with an outstanding ASIC development team, you will invent novel ... High-level programming skills including experience with Python, PERL, Make, and shell scripting.
ASIC Manager
Beaverton, OR · On-site
We are looking for an experienced ASIC Engineering Manager to lead external ASIC development partnerships, drive aggressive cost targets, and manage successful chip execution from architecture ...
Quick apply
ASIC Manager
Beaverton, OR · On-site
We are looking for an experienced ASIC Engineering Manager to lead external ASIC development partnerships, drive aggressive cost targets, and manage successful chip execution from architecture ...
ASIC Physical Design Principal Consultant
$148.10K - $152.50K/yr
Sonsoft Inc. is growing at a steady pace specializing in the fields of Software Development ... At least 10 years of experience in VLSI/ASIC Design. * At least 9 years of experience in Netlist ...
ASIC Physical Design Principal Consultant
$148.10K - $152.50K/yr
Sonsoft Inc. is growing at a steady pace specializing in the fields of Software Development ... At least 10 years of experience in VLSI/ASIC Design. * At least 9 years of experience in Netlist ...
ASIC Design And Integration Engineer Apple's Silicon Engineering team is looking for a highly ... Description Design and Development: Design, implementation, and verification of complex ASICs.
ASIC Design And Integration Engineer Apple's Silicon Engineering team is looking for a highly ... Description Design and Development: Design, implementation, and verification of complex ASICs.
Design and Development: Design, implementation, and verification of complex ASICs. Develop RTL ... Engineering, or a related field.Experience: 3+ years of proven experience in ASIC design, including ...
Design and Development: Design, implementation, and verification of complex ASICs. Develop RTL ... Engineering, or a related field.Experience: 3+ years of proven experience in ASIC design, including ...
Description Design and Development: Design, implementation, and verification of complex ASICs ... Engineering, or a related field. Experience: 3+ years of proven experience in ASIC design ...
Description Design and Development: Design, implementation, and verification of complex ASICs ... Engineering, or a related field. Experience: 3+ years of proven experience in ASIC design ...
Apple's Silicon Engineering team is looking for a highly skilled and motivated ASIC Design Engineer ... Description Design and Development: Design, implementation, and verification of complex ASICs.
Apple's Silicon Engineering team is looking for a highly skilled and motivated ASIC Design Engineer ... Description Design and Development: Design, implementation, and verification of complex ASICs.
Apple's Silicon Engineering team is looking for a highly skilled and motivated ASIC Design Engineer ... Design and Development: Design, implementation, and verification of complex ASICs. Develop RTL ...
Apple's Silicon Engineering team is looking for a highly skilled and motivated ASIC Design Engineer ... Design and Development: Design, implementation, and verification of complex ASICs. Develop RTL ...
Senior ASIC (Front-End) Design Engineer
OR · Remote
$200K - $300K/yr
Senior ASIC Front-End Design Engineer Summary: * As a Senior ASIC Front-End Design Engineer, you ... You will be on the leading edge of the development and definition of advanced, high-performance ...
Senior ASIC (Front-End) Design Engineer
OR · Remote
$200K - $300K/yr
Senior ASIC Front-End Design Engineer Summary: * As a Senior ASIC Front-End Design Engineer, you ... You will be on the leading edge of the development and definition of advanced, high-performance ...
ASIC Design Engineer
Beaverton, OR · On-site
ASIC Design Engineer Imagine what you could do here. At Apple, new insights have a way of becoming ... Hands on experience in all aspects of the chip development process with proficiency in front end ...
ASIC Design Engineer
Beaverton, OR · On-site
ASIC Design Engineer Imagine what you could do here. At Apple, new insights have a way of becoming ... Hands on experience in all aspects of the chip development process with proficiency in front end ...
$170K - $250K/yr
The Role We are seeking a Senior ASIC Design Verification Engineer whose role will be to verify the ... Experience with testplanning, UVM-based testbench development, constrained-random testing ...
OR · Hybrid
We are now looking for a Senior ASIC Design Engineer. NVIDIA is seeking Senior ASIC Design ... Experience in micro-architecture and RTL development (Verilog), focused on arbiters, scheduling ...
OR · Hybrid
The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive ... development, automation, validation flows development, coverage metrics, test execution, bug ...
ASIC Design Engineer
Beaverton, OR · On-site
As an ASIC Design Engineer, your responsibilities span various aspects of SOC design:- Write ... Hands on experience in all aspects of the chip development process with proficiency in front end ...
ASIC Design Engineer
Beaverton, OR · On-site
As an ASIC Design Engineer, your responsibilities span various aspects of SOC design:- Write ... Hands on experience in all aspects of the chip development process with proficiency in front end ...
ASIC Design Engineer
Beaverton, OR · On-site
As an ASIC Design Engineer, your responsibilities span various aspects of SOC design:- Write ... Hands on experience in all aspects of the chip development process with proficiency in front end ...
ASIC Design Engineer
Beaverton, OR · On-site
As an ASIC Design Engineer, your responsibilities span various aspects of SOC design:- Write ... Hands on experience in all aspects of the chip development process with proficiency in front end ...
ASIC Design Engineer
Beaverton, OR · On-site
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... Hands on experience in all aspects of the chip development process with proficiency in front end ...
ASIC Design Engineer
Beaverton, OR · On-site
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... Hands on experience in all aspects of the chip development process with proficiency in front end ...
ASIC Design Engineer
Beaverton, OR · On-site
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... Hands on experience in all aspects of the chip development process with proficiency in front end ...
ASIC Design Engineer
Beaverton, OR · On-site
Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... Hands on experience in all aspects of the chip development process with proficiency in front end ...
$170K - $250K/yr
Contribute to methodology development, tool evaluation, and flow documentation. * Support your ... Computer Engineering, or related field. * 5-10 years of experience in ASIC physical design for ...
$130K - $200K/yr
The Role We are seeking an ASIC Design Verification Engineer whose role will be to verify the ... Experience with test planning, testbench development, constrained-random testing, and coverage ...
Asic Development Engineer information
What is the difference between Asic Development Engineer vs FPGA Design Engineer?
| Aspect | Asic Development Engineer | FPGA Design Engineer |
|---|---|---|
| Required Credentials | Bachelor's or Master's in Electrical Engineering, VLSI, or related fields; knowledge of ASIC design tools | Bachelor's or Master's in Electrical Engineering, Digital Design; familiarity with FPGA development tools |
| Work Environment | Designing and verifying custom silicon chips in semiconductor labs or R&D centers | Developing and testing FPGA-based solutions in hardware labs or embedded systems environments |
| Industry Usage | Used in semiconductor companies, integrated circuit design firms, and tech giants | Common in telecommunications, aerospace, and embedded systems industries |
While both roles involve digital hardware design, Asic Development Engineers focus on creating custom chips for high-performance applications, whereas FPGA Design Engineers work on programmable hardware solutions. Both require strong digital design skills and familiarity with hardware description languages, but their end products and development environments differ.
What are popular job titles related to Asic Development Engineer jobs in Oregon? For Asic Development Engineer jobs in Oregon, the most frequently searched job titles are:
What job categories do people searching Asic Development Engineer jobs in Oregon look for? The top searched job categories for Asic Development Engineer jobs in Oregon are:
Full-time
Posted 28 days ago
Job description
Employment Type: Full-Time
Location: Beaverton, Oregon (open to relocation)
About Us
Datavault AI, along with its event-technology subsidiary Event Citadel (formerly CompuSystems), operates across a diverse portfolio of technology and service divisions.
Datavault AI Inc. delivers high-performance computing software, Web 3.0 data-management solutions, and advanced audio technologies to a broad range of industries. Its Acoustic Science division licenses spatial and multichannel HD audio technologies—including ADIO®, WiSA®, and Sumerian®—to customers in sports & entertainment, events & venues, automotive, finance, and other sectors.
Event Citadel (formerly CompuSystems), founded in 1976, is a trusted provider of end-to-end event technology solutions, offering registration, ticketing, lead retrieval, and attendee-engagement services for events of all sizes across trade, association, corporate, and government markets.
Job Description
We’re a fast-moving semiconductor startup building next-generation wireless audio silicon solutions. We are looking for an experienced ASIC Engineering Manager to lead external ASIC development partnerships, drive aggressive cost targets, and manage successful chip execution from architecture through production.
This role is ideal for someone who combines strong technical depth in wireless ASICs with practical business judgment around vendor management, silicon cost optimization, and execution in a resource-constrained startup environment.
Key Responsibilities
- Select, evaluate, and manage relationships with external ASIC design and manufacturing vendors
- Drive ASIC program execution across architecture, RTL, verification, physical design, tapeout, and production
- Own vendor performance, schedules, deliverables, quality, and cost accountability
- Develop and execute strategies to achieve aggressive chip cost targets in a small-company environment
- Analyze and optimize ASIC cost drivers including die size, process node selection, packaging, yield, test, NRE, and production scaling
- Collaborate with internal hardware, software, RF, systems, and product teams to define silicon requirements and tradeoffs
- Provide technical leadership throughout the full chip development lifecycle
- Review and guide ASIC implementation methodologies, flows, and EDA tool usage
- Identify technical and operational risks early and drive mitigation plans
- Support bring-up, validation, and production ramp activities
Qualifications
- BS, MS, or PhD in Electrical Engineering or related field
- 10+ years of experience in ASIC or SoC development
- Proven track record delivering multiple successful chip designs to production
- Strong experience with wireless chipsets and wireless communication systems
- Hands-on understanding of ASIC development flows and semiconductor cost structures
- Experience selecting and managing external ASIC vendors and design partners
- Strong understanding of ASIC cost drivers and methods for reducing silicon and manufacturing costs
- Familiarity with industry-standard chip EDA tools and implementation flows
- Experience working in startup or small-company environments with aggressive execution goals
- Strong project management, communication, and cross-functional leadership skills
Preferred Qualifications
- Experience with low-power wireless, connectivity, or RF-integrated SoCs.
- Knowledge of advanced process nodes and packaging technologies
- Experience with DFT, physical design, timing closure, or silicon validation
- Familiarity with foundry engagement and manufacturing operations
- Prior experience leading geographically distributed vendor teams
What We Offer
- Competitive salary and benefits package.
- A fast-paced, high-impact work environment.
- Opportunity to work closely with executive leadership.
- The chance to work with cutting-edge technologies and make a significant impact.
- A culture of innovation, ownership, and growth.