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Asic Soc Jobs in Oregon (NOW HIRING)

K2 Space

Senior ASIC Emulation Engineer

OR · On-site +1

$170K - $250K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • PTO

S. in Electrical Engineering, Computer Engineering, or related field. * 5+ years of experience in ASIC/SoC development, focused on emulation * Solid understanding of SystemVerilog, digital logic, RTL ...

K2 Space

Senior ASIC Design Verification Engineer

OR · On-site +1

$170K - $250K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • PTO

S. in Electrical Engineering, Computer Engineering, or related field. * 5+ years of experience in ASIC/SoC verification. * Solid understanding of SystemVerilog, digital logic, RTL design, and ...

K2 Space

Principal ASIC Design Verification Engineer

OR · On-site +1

$190K - $285K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • PTO

S. in Electrical Engineering, Computer Engineering, or related field. * 10+ years of experience in ASIC/SoC verification. * Solid understanding of SystemVerilog, digital logic, RTL design, DFT, and ...

Intel

ASIC and Custom Silicon Sales Leader

Hillsboro, OR

  • Medical

  • Retirement

  • PTO

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field. * 12+ years of semiconductor, ASIC, SoC, foundry, IP, or complex silicon solution sales experience ...

Apple

ASIC Design Engineer

Beaverton, OR · On-site

Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Write microarchitecture and/or design specifications - Design, implement, and debug complex logic ...

Apple

ASIC Design Engineer

Beaverton, OR

Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Write microarchitecture and/or design specifications - Design, implement, and debug complex logic ...

K2 Space

Senior ASIC Physical Design Engineer

OR · On-site +1

$170K - $250K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • PTO

In your first 6 months, you will develop and implement new SoC sub-systems for satellite ... in ASIC physical design for complex SoCs. * Hands-on experience with industry-standard tools ...

Apple Inc.

ASIC Design Engineer

Beaverton, OR · On-site

$150 - $210/hr

Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design ... Integrate complex IPs into the SOC * Support all front end integration activities like Lint, CDC ...

Nvidia

Senior ASIC Verification Engineer

OR · On-site +1

The NVIDIA Clocks Team is committed to deliver high-quality clocking and reset logic to various units in SOC and GPU ASIC. The complexity of the clocks and resets design has increased many folds.

Intel

Director, SoC Design Engineering

Hillsboro, OR

$148K - $180K/yr

  • Medical

  • Retirement

  • PTO

Job Details: The Role and Impact We are seeking a highly experienced a Director, SoC Design ... Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom ...

Intel

SoC Logic Design Engineer

Hillsboro, OR

$141K - $200K/yr

  • Medical

  • Retirement

  • PTO

Hands-on experience from spec to timing closure in at least one SoC/ASIC design We encourage you to bring your expertise and passion for innovation to Intel, where your contributions will shape the ...

Intel

SoC Logic Design Engineer

Hillsboro, OR · On-site

$141K - $232K/yr

  • Medical

  • Retirement

  • PTO

The Role and Impact Join Intel's distinguished team as an SoC Logic Design Engineer. In this role ... Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom ...

Sonsoft Inc

SoC Design and Verification

Hillsboro, OR

$148K - $180K/yr

Creating System Verilog / OVM test benches at the IP & SOC level and validating. * At least 1-year ... Knowledge of ASIC design methodologies and flows. * Ability to Manage and conduct training for the ...

K2 Space

Principal ASIC Physical Design Engineer

OR · On-site +1

$190K - $280K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • PTO

In your first 6 months, you will develop and implement new SoC sub-systems for satellite ... years of experience in ASIC physical design for high-performance SoCs. * Proven end-to-end ...

Rambus

Tech Dir Program Management

Hillsboro, OR · Hybrid

$140K - $261K/yr

  • Medical

  • Dental

  • Retirement

Memory technology (DDR5, LPDDR5/6, HBM3/4) * Familiarity with memory controllers PHYs and understanding of ASIC/SoC development flow. Key Competencies * Strategic thinking * Leadership and influence ...

Intel

Ethernet Product Marketing Engineer

Hillsboro, OR

  • Medical

  • Retirement

  • PTO

Experience with ASIC/SoC development cycles and vendor management. Why Join Intel? This is an opportunity to shape the future direction of Intel's Ethernet portfolio, serving as the connective tissue ...

Rambus.com

Tech Dir Program Management

Hillsboro, OR · On-site

$141 - $261/hr

  • Medical

  • Dental

  • Retirement

Memory technology(DDR5, LPDDR5/6, HBM3/4) * Familiarity with memory controllersPHYs andunderstanding of ASIC/SoC development flow. Key Competencies * Strategic thinking * Leadership and influence ...

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Showing results 1-20

All JobsAsic Soc JobsAsic Soc Jobs in Oregon

Asic Soc information

What is the difference between Asic Soc vs FPGA Designer?

AspectAsic SocFPGA Designer
Required SkillsHardware design, embedded systems, VHDL/Verilog, ASIC developmentHardware description languages, FPGA architecture, VHDL/Verilog
Work EnvironmentSemiconductor companies, integrated circuit design labsElectronics firms, prototyping labs, FPGA development environments
Industry UsageConsumer electronics, automotive, telecommunicationsPrototyping, testing, low-volume production

Both Asic Soc and FPGA Designer roles involve hardware description languages and embedded systems, but Asic Soc engineers focus on designing integrated circuits for mass production, while FPGA Designers work on flexible, reprogrammable hardware for testing and prototyping. The skills overlap makes them common choices for hardware development in electronics industries.

Is ASIC a good career?

An ASIC (Application-Specific Integrated Circuit) design engineer or developer role is considered a specialized and in-demand career in the semiconductor and electronics industry. It requires knowledge of digital design, hardware description languages like VHDL or Verilog, and often involves working with CAD tools; the field offers opportunities for growth and competitive salaries. However, it can also involve long hours and continuous learning to keep up with technological advancements.

What is ASIC SoC design?

ASIC SoC design involves creating custom integrated circuits that combine multiple components, such as processors, memory, and peripherals, onto a single chip for specific applications. It requires knowledge of hardware description languages like VHDL or Verilog, and often involves simulation, verification, and layout tools to ensure performance and reliability.

What are popular job titles related to Asic Soc jobs in Oregon?

For Asic Soc jobs in Oregon, the most frequently searched job titles are:

What job categories do people searching Asic Soc jobs in Oregon look for?

The top searched job categories for Asic Soc jobs in Oregon are:

What cities in Oregon are hiring for Asic Soc jobs?

Cities in Oregon with the most Asic Soc job openings:

Asic Soc jobs near you

Senior ASIC Emulation Engineer

K2 Space

OR • On-site, Remote

$170K - $250K/yr

Full-time

Medical, Dental, Vision, Life, PTO

Posted 15 days ago

Job description

The Role

We are seeking a Senior ASIC Emulation Engineer who will lead the bring-up, deployment, and optimization of our pre-silicon emulation platforms. You will work closely with architecture, RTL design, DFT, DV, firmware, physical design, and silicon validation teams to enable highfidelity hardware/software co-development and accelerate verification cycles. This is a hands-on role with high ownership, deep technical engagement, and the opportunity to shape firstgeneration silicon and system methodology.

Responsibilities

  • Build, integrate, and maintain full-chip, multi-chips and system-level emulation models on platforms such as Palladium, ZeBu, or Veloce.
  • Define and evolve emulation strategy, methodology, and workflows across the ASIC organization.
  • Work with RTL engineers to compile, map, and optimize designs for emulation performance, capacity, and stability.
  • Develop and integrate transactors, BFMs, speed adapters, and virtualization interfaces to support diverse system use cases.
  • Support systemlevel testing in emulation by enabling full hardware/software integration, validating complex use cases, and ensuring the environment can run representative endtoend workloads.
  • Accelerate overall verification throughput by helping DV team run targeted and highvalue tests in emulation, including adapting DV content and optimizing flows to reduce simulation bottlenecks.
  • Enable firmware, bootloader, driver, and software teams by providing robust emulation platforms and assisting in HW/SW integration debug.
  • Run emulation workloads, triage failures, perform root-cause analysis, and collaborate across design and verification to resolve issues.
  • Maintain and enhance automation for compile flows, regression management, and continuous integration.
  • Participate in architecture reviews, microarchitecture discussions, and influence design-for-emulation best practices.
  • Support silicon bring-up and post-silicon validation through test reuse, diagnostics, and pre/post-silicon correlation.
  • Manage interactions with external IP providers or emulation partners when needed.

Qualifications

  • B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field.
  • 5+ years of experience in ASIC/SoC development, focused on emulation
  • Solid understanding of SystemVerilog, digital logic, RTL flows, DV methodologies, and ASIC development lifecycles.
  • Hands-on expertise with major emulation platforms (Palladium, ZeBu, Veloce), including model build, debug and performance optimization
  • Proficiency with scripting languages (Python, Perl, TCL) for automation and tooling.
  • Experience with hardware/software interfaces, embedded processors, firmware bring-up, and C/C++based system-level testing.
  • Familiarity with industry-standard buses and protocols such as APB/AHB/AXI, JTAG, SPI.
  • Experience driving cross-functional debug involving RTL, DV, firmware, physical design, and validation teams.
  • Understanding of pre- and post-silicon debug methodologies and correlation workflows.

Nice to Have

  • Experience with FPGA prototyping platforms (HAPS, Protium, custom FPGA boards).
  • Experience with low-power modes and power-aware emulation.
  • Experience with analog/mixed-signal behavioral models in emulation environments.
  • Experience with SERDES and high-speed data protocols such as PCIe, Ethernet, USB, or multi-gigabit PHYs.

Compensation and Benefits:

  • Base salary range for this role is $170,000 - $250,000 + equity in the company
  • Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level
  • Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks
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About K2 Space

Sourced by ZipRecruiter

Industry

Guided missile and space vehicle manufacturing

Company size

11 - 50 Employees

Headquarters location

Los Angeles, CA, US

Year founded

2022

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