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Soc Design Verification Engineer Jobs in Oregon (NOW HIRING)

Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and ... You own ensuring the quality of the SOC or an IP or subsystem. This requires you to review design ...

Design Verification Engineer

Beaverton, OR

$141K - $172K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and ... You own ensuring the quality of the SOC or an IP or subsystem. This requires you to review design ...

Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and ... You own ensuring the quality of the SOC or an IP or subsystem. This requires you to review design ...

Design Verification Engineer

Beaverton, OR

$141K - $172K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and ... You own ensuring the quality of the SOC or an IP or subsystem. This requires you to review design ...

Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and ... You own ensuring the quality of the SOC or an IP or subsystem. This requires you to review design ...

Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

We have an opportunity for an outstandingly hardworking design verification engineer! As a member ... You will also learn to develop block, IP and SoC level test-benches track and report DV progress ...

Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

We have an opportunity for an outstandingly hardworking design verification engineer! As a member ... You will also learn to develop block, IP and SoC level test-benches track and report DV progress ...

Design Verification Engineer

Beaverton, OR

$141K - $172K/yr

We have an opportunity for an outstandingly hardworking design verification engineer! As a member ... You will also learn to develop block, IP and SoC level test-benches track and report DV progress ...

Design Verification Engineer

Beaverton, OR

$141K - $172K/yr

We have an opportunity for an outstandingly hardworking design verification engineer! As a member ... You will also learn to develop block, IP and SoC level test-benches track and report DV progress ...

Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and ... You own ensuring the quality of the SOC or an IP or subsystem. This requires you to review design ...

Design Verification Engineers at Apple are responsible for verifying the functionality and ... You own ensuring the quality of the SOC or an IP or subsystem. This requires you to review design ...

Design Verification Engineers at Apple are responsible for verifying the functionality and ... You own ensuring the quality of the SOC or an IP or subsystem. This requires you to review design ...

Design Verification Engineer

Beaverton, OR

$141K - $172K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and ... You own ensuring the quality of the SOC or an IP or subsystem. This requires you to review design ...

Design Verification Engineers at Apple are responsible for verifying the functionality and ... You own ensuring the quality of the SOC or an IP or subsystem. This requires you to review design ...

OR · On-site

$130K - $200K/yr

The Role We are seeking an ASIC Design Verification Engineer whose role will be to verify the ... ASIC/SoC verification. * Solid understanding of SystemVerilog, digital logic, and hardware ...

The Role and Impact We are seeking a highly experienced a Director, SoC Design Engineering, to lead the functional verification efforts for cutting-edge system-on-chip (SoC) designs. In this ...

SoC Physical Design Verification Engineer

Beaverton, OR · On-site

$141K - $145K/yr

... verification of an SOC. Description • As a member of our physical design team, you will perform ... engineering efforts. • You will work on padring, bump, RDL design, and working with the package ...

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Soc Design Verification Engineer information

What are some common challenges faced by SoC Design Verification Engineers during the verification process?

SoC Design Verification Engineers often encounter challenges related to the increasing complexity of modern system-on-chip architectures, such as integrating numerous IP blocks and ensuring robust communication between them. Debugging failures in large-scale simulations and managing tight project deadlines can also be demanding. Additionally, adapting to evolving verification methodologies and tools, as well as collaborating effectively with design and firmware teams to resolve issues quickly, are common aspects of the role. Successful engineers leverage strong problem-solving skills and proactive communication to navigate these challenges.

What are the key skills and qualifications needed to thrive as a SoC Design Verification Engineer, and why are they important?

To thrive as an SoC Design Verification Engineer, you need a solid background in digital design, computer architecture, and verification methodologies, typically supported by a degree in electrical or computer engineering. Familiarity with hardware description languages (HDL) like Verilog or VHDL, verification tools such as UVM/SystemVerilog, and simulation/debugging environments is essential. Strong analytical thinking, problem-solving abilities, and effective communication skills help in collaborating with design teams and troubleshooting complex issues. These skills and qualities are vital to ensure the reliability, functionality, and timely delivery of complex system-on-chip products.

What are SoC Design Verification Engineers?

SoC (System-on-Chip) Design Verification Engineers are professionals who ensure that integrated circuits, which combine multiple components onto a single chip, function correctly according to their specifications. They use various verification methodologies and tools to simulate, test, and debug the design before it is manufactured. Their work involves creating testbenches, running simulation tests, and collaborating with design engineers to identify and resolve issues early in the development cycle. This helps prevent costly errors and ensures the final product meets quality and performance standards.

What is the difference between Soc Design Verification Engineer vs Soc Validation Engineer?

AspectSoc Design Verification EngineerSoc Validation Engineer
Primary FocusVerifying design correctness through simulation and testing during developmentValidating the final product to ensure it meets specifications and functions in real-world scenarios
Work EnvironmentDesign teams, simulation labs, hardware testingProduct testing, field testing, customer environments
Required CredentialsBachelor's or master's in Electrical Engineering, VLSI, or related fields; knowledge of verification toolsBachelor's or master's in Electrical Engineering, VLSI, or related fields; experience with testing methodologies

The Soc Design Verification Engineer primarily focuses on verifying the design correctness during development, while the Soc Validation Engineer tests the final product to ensure it functions correctly in real-world conditions. Both roles require similar educational backgrounds and industry experience, but their responsibilities differ in the development lifecycle.

What are popular job titles related to Soc Design Verification Engineer jobs in Oregon? For Soc Design Verification Engineer jobs in Oregon, the most frequently searched job titles are:
What job categories do people searching Soc Design Verification Engineer jobs in Oregon look for? The top searched job categories for Soc Design Verification Engineer jobs in Oregon are:
Design Verification Engineer

Design Verification Engineer

Apple

Beaverton, OR • On-site

$141K - $172K/yr

Full-time

Re-posted 23 days ago


Apple rating

8.1

Company rating: 8.1 out of 10

Based on 670 frontline employees who took The Breakroom Quiz

5th of 30 rated technology retailers


Job description

Does making the next great technology product excite you? Imagine what you could do here. At Apple, our new ideas have a way of becoming great products, services, and customer experiences very quickly. We bring passion and dedication to our job and when you are a part of that team there's no telling what you could accomplish. Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple's premier SOCs. This is a critical job within Apple's Hardware Technology and we'd love to have you join us
Description
As part of a very dedicated team you will be at the heart of the chip design effort collaborating with all subject areas (vertical product model). You own ensuring the quality of the SOC or an IP or subsystem. This requires you to review design and architecture specifications and work closely with design & micro-architecture teams. A key component to the job is understanding the functional & performance goals of the design and you use this knowledge to test optimally. You develop test plans, tests & coverage plans as well as define our next generation verification methodology & testbenches. You will actively communicate and collaborate with design, architecture and software to understand the use cases and corner conditions and drive test cases.
The SOC contains many subsystems and IP, so you may be working on one or several of the following types of IP:
- Neural Engine hardware
- DRAM subsystem, memory controller logic
- Encode and Decode systems for ProRes and other codec formats such as VP9, AV1
- Hardware security, including cryptographic algorithm implementations
- High-Speed IO standards such as PCI Express, DisplayPort, MIPI
- Power management and fabric infrastructure
- Memory cache management
- Display Subsystem for variety of panels and products
These are just some examples of the exciting designs that are part of our team. Joining SOC DV allows you to focus deeply on one main IP or expand your breadth as you work on a collection of subsystems. It's up to you!
Minimum Qualifications
Minimum of BS + 10 years relevant industry experience.
Preferred Qualifications
Skilled in many aspects of digital verification such as constrained random verification process, functional coverage, code coverage, assertion methodology & philosophy
Knowledge of SystemVerilog, digital simulation and debug
Knowledge of computer architecture and digital design fundamentals
Good SW programming skills with knowledge of data structures and algorithms
Experience with Python, Perl, or similar scripting language
Ability to work independently to deliver the project goals
Knowledge of verification methodologies like UVM
Experience with C/C++, assembly is a plus.
Excellent interpersonal and communication skills and the dream to take on diverse challenges.

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About Apple

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Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.

Industry

Computer and electronic product manufacturing

Company size

10,000+ Employees

Headquarters location

Cupertino, CA, US

Year founded

1976