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Soc Design Verification Engineer Jobs in Oregon (NOW HIRING)

Intel

IP Design Verification Engineer

Hillsboro, OR

$141K - $200K/yr

We work every single day to design and manufacture silicon products that empower people's lives. Do ... IP or SoC verification experience using System Verilog/UVM * Reading and interpreting technical ...

Apple

CPU Design Verification Engineer

Beaverton, OR

$141K - $172K/yr

Description As a CPU Design Verification Engineer owning the verification of a certain area of functionality in a CPU design, you will have the responsibilities as follows: • Work closely with ...

Apple

ASIC Design Engineer

Beaverton, OR

We are searching for a dedicated engineer to join our exciting team of problem solvers. Description ... of the SOC Design, SOC Design - Verification, Emulation, STA, and Physical Design teams ...

Apple

CPU Design Verification Engineer

Beaverton, OR

$141K - $172K/yr

Description As a CPU Design Verification Engineer owning the verification of a certain area of functionality in a CPU design, you will have the responsibilities as follows: • Work closely with ...

Apple

CPU Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

Description As a CPU Design Verification Engineer owning the verification of a certain area of functionality in a CPU design, you will have the responsibilities as follows: • Work closely with ...

Apple

CPU Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

Description As a CPU Design Verification Engineer owning the verification of a certain area of functionality in a CPU design, you will have the responsibilities as follows: • Work closely with ...

Apple

ASIC Design Engineer

Beaverton, OR · On-site

... SOC Design - Verification, Emulation, STA, and Physical Design teams - Collaborate with software and systems teams to ensure a high quality Minimum Qualifications BS and a minimum of 10 years ...

Apple

CPU Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

Description As a CPU Design Verification Engineer owning the verification of a certain area of functionality in a CPU design, you will have the responsibilities as follows: • Work closely with ...

Apple

CPU Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

Description As a CPU Design Verification Engineer owning the verification of a certain area of functionality in a CPU design, you will have the responsibilities as follows: • Work closely with ...

K2 Space

OR

$190K - $285K/yr

S. in Electrical Engineering, Computer Engineering, or related field. * 10+ years of experience in ASIC/SoC verification. * Solid understanding of SystemVerilog, digital logic, RTL design, DFT, and ...

Apple

CPU Design Verification Engineer

Beaverton, OR

$141K - $172K/yr

Description As a CPU Design Verification Engineer owning the verification of a certain area of functionality in a CPU design, you will have the responsibilities as follows: • Work closely with ...

Apple

CPU Design Verification Engineer

Beaverton, OR

$141K - $172K/yr

Description As a CPU Design Verification Engineer owning the verification of a certain area of functionality in a CPU design, you will have the responsibilities as follows: • Work closely with ...

K2 Space

OR

$170K - $250K/yr

S. in Electrical Engineering, Computer Engineering, or related field. * 5+ years of experience in ASIC/SoC verification. * Solid understanding of SystemVerilog, digital logic, RTL design, and ...

Apple Inc.

CPU Design Verification Engineer

Beaverton, OR · On-site

$140 - $190/hr

Description As a CPU Design Verification Engineer owning the verification of a certain area of functionality in a CPU design, you will have the responsibilities as follows: • Work closely with ...

Sonsoft Inc

SoC Design and Verification

Hillsboro, OR

$148K - $180K/yr

At least 7 years of experience in RTL Design verification of SoCs (VHDL, Verilog, System Verilog ... Creating System Verilog / OVM test benches at the IP & SOC level and validating. * At least 1-year ...

Sonsoft Inc

SoC Design and Verification

Hillsboro, OR

$148K - $180K/yr

At least 7 years of experience in RTL Design verification of SoCs (VHDL, Verilog, System verilog ... Creating System Verilog / OVM test benches at the IP & SOC level and validating * At least 1 year ...

Intel

IP Design Verification Engineer

Hillsboro, OR

$141K - $200K/yr

Join Intel as a Mixed Signal Design Verification Engineer and play a critical role in shaping the future of cutting-edge technology. In this position, you will ensure the functionality and ...

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Soc Design Verification Engineer information

What are some common challenges faced by a SoC Design Verification Engineer during the verification process?

SoC Design Verification Engineers often encounter challenges related to the increasing complexity of modern system-on-chip architectures, such as integrating numerous IP blocks and ensuring robust communication between them. Debugging failures in large-scale simulations and managing tight project deadlines can also be demanding. Additionally, adapting to evolving verification methodologies and tools, as well as collaborating effectively with design and firmware teams to resolve issues quickly, are common aspects of the role. Successful engineers leverage strong problem-solving skills and proactive communication to navigate these challenges.

What are the key skills and qualifications needed to thrive as a SoC Design Verification Engineer, and why are they important?

To thrive as an SoC Design Verification Engineer, you need a solid background in digital design, computer architecture, and verification methodologies, typically supported by a degree in electrical or computer engineering. Familiarity with hardware description languages (HDL) like Verilog or VHDL, verification tools such as UVM/SystemVerilog, and simulation/debugging environments is essential. Strong analytical thinking, problem-solving abilities, and effective communication skills help in collaborating with design teams and troubleshooting complex issues. These skills and qualities are vital to ensure the reliability, functionality, and timely delivery of complex system-on-chip products.

What is a SoC Design Verification Engineer?

SoC (System-on-Chip) Design Verification Engineers are professionals who ensure that integrated circuits, which combine multiple components onto a single chip, function correctly according to their specifications. They use various verification methodologies and tools to simulate, test, and debug the design before it is manufactured. Their work involves creating testbenches, running simulation tests, and collaborating with design engineers to identify and resolve issues early in the development cycle. This helps prevent costly errors and ensures the final product meets quality and performance standards.

What is the difference between Soc Design Verification Engineer vs Soc Validation Engineer?

AspectSoc Design Verification EngineerSoc Validation Engineer
Primary FocusVerifying design correctness through simulation and testing during developmentValidating the final product to ensure it meets specifications and functions in real-world scenarios
Work EnvironmentDesign teams, simulation labs, hardware testingProduct testing, field testing, customer environments
Required CredentialsBachelor's or master's in Electrical Engineering, VLSI, or related fields; knowledge of verification toolsBachelor's or master's in Electrical Engineering, VLSI, or related fields; experience with testing methodologies

The Soc Design Verification Engineer primarily focuses on verifying the design correctness during development, while the Soc Validation Engineer tests the final product to ensure it functions correctly in real-world conditions. Both roles require similar educational backgrounds and industry experience, but their responsibilities differ in the development lifecycle.

What are popular job titles related to Soc Design Verification Engineer jobs in Oregon? For Soc Design Verification Engineer jobs in Oregon, the most frequently searched job titles are:
What job categories do people searching Soc Design Verification Engineer jobs in Oregon look for? The top searched job categories for Soc Design Verification Engineer jobs in Oregon are:
Soc Design Verification Engineer jobs near you
Infographic showing various Soc Design Verification Engineer job openings in Oregon as of July 2026, with employment types broken down into 69% Full Time, and 31% Contract. Highlights an 90% In-person, and 10% Remote job distribution.

IP Design Verification Engineer

Intel

Hillsboro, OR

$141K - $200K/yr

Full-time

Medical, Retirement, PTO

Re-posted 8 days ago

Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

19th of 156 rated electronics manufacturers

Job description

Job Details:Job Description: 

The world is transforming - and so is Intel. Here at Intel, we believe the world needs technology that can enrich the lives of every person on earth. We work every single day to design and manufacture silicon products that empower people's lives.

Do you love to solve technical challenges? Do you enjoy working with cross functional teams to deliver solutions for products ? If so, come join us to do something wonderful.

As an IP Verification Engineer, you will be working on UCIe Mixed-Signal IP delivering to multiple Server SoCs.

A successful candidate will have proven experience demonstrating the following skills and behavioral traits:

  • Analytical and problem-solving skills
  • Verbal/written communication skills
  • Effective team player with continuous learning mindset
  • Willingness to balance multiple tasks
  • Willingness to work in a fast-paced environment and have as much fun and growth as possible in the process

The primary responsibilities for this role will include, but are not limited to:

  • Test bench development, directed/constrained random test generation in UVM
  • Closely working with design team to review specifications and architecture, define verification plan, coverage, and improve methodology
  • Run RTL and gate level functional verification, debug failures, and analyze coverage
  • Support mixed-signal verification using Verilog models of analog IP
Qualifications:

Minimum Qualifications:

Minimum qualifications are required to be initially considered for this position.

  • The candidate must have a Bachelor's degree in Electrical/Computer Engineering or Computer Science and 5+ years of experience -OR- Master's degree in Electrical/Computer Engineering or Computer Science and 3+ years of experience -OR- PhD in Electrical/Computer Engineering or Computer Science and 2+ years of experience
  • Relevant Work experience include:
    • IP or SoC verification experience using System Verilog/UVM
    • Reading and interpreting technical specs and Register Transfer Level (RTL) code for debug
    • Implementation of verification environments that include use of constrained-random stimulus
    • Code/Functional Coverage analysis
    • Writing System Verilog Assertions (SVA)

Preferred Qualifications:

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

  • Mixed-Signal Verification
  • Experience with UCIe or PCIe or I/O
Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, California, Santa ClaraAdditional Locations:US, Oregon, HillsboroPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $141,910.00-200,340.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968

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