Job Title: SoC Design Verification Engineer
Location : San Jose, CA
Duration Long term
Job Description
We are looking for a highly skilled SoC/Performance DV engineer to drive system-level validation and performance characterization of complex SoCs. The role involves working closely with architecture, design, and software teams to ensure silicon meets performance, power, and functionality targets.
Key Responsibilities:
- Develop and execute SoC-level validation and performance verification strategy
- Build system-level testbenches, workloads, and performance models
- Analyze performance bottlenecks across CPU, memory, interconnect, and accelerators
- Perform power and performance trade-off analysis
- Collaborate with architecture, RTL, and software teams
- Debug issues at system level (HW + FW/SW interaction)
Required Skills:
- Strong experience in SoC-level DV / Performance validation
- Understanding of CPU architecture, memory hierarchy, NoC/interconnect
- Expertise in SystemVerilog/UVM + C/C++/Python
- Experience with performance profiling tools
- Strong debugging and analytical skills
Good to Have:
- Experience in post-silicon validation / bring-up
- Knowledge of AI/ML or high-performance computing workloads