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Soc Design Verification Engineer Jobs in California

Intel

Senior SoC Design Verification Engineer

Folsom, CA · On-site

$145K - $177K/yr

About the Role As a Senior SoC Design Verification Engineer , you will lead verification efforts for complex system-on-chip (SoC) designs that enable Intel's next generation of client computing and ...

Intel

Senior SoC Design Verification Engineer

Santa Clara, CA · On-site

$159K - $195K/yr

About the Role As a Senior SoC Design Verification Engineer , you will lead verification efforts for complex system-on-chip (SoC) designs that enable Intel's next generation of client computing and ...

Qualcomm

SOC Design Verification Engineer

San Diego, CA · On-site

$98K - $147K/yr

As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance ...

Qualcomm

SOC Design Verification Engineer

San Diego, CA · On-site

$98K - $147K/yr

As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance ...

Sivaltech

Design Verification Engineer

San Diego, CA · On-site

$144K - $176K/yr

Design Verification Engineer Location: Bay Area, CA (Onsite/Hybrid) Experience: 8+ Years Job ... Develop and execute comprehensive verification plans for ASIC/SoC designs. * Build reusable UVM ...

Qualcomm

SOC Design Verification Engineer

San Diego, CA · On-site

$98.50 - $147.70/hr

As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance ...

Apple

Wireless SOC Verification Engineer

Irvine, CA · On-site

$146K - $178K/yr

As part of the Wireless SOC team, you will have the opportunity to verify complex SOCs. Our team ... As a Design Verification Engineer on our team, you'll be at the center of the verification effort ...

Apple

Wireless SOC Verification Engineer

Irvine, CA · On-site

$146K - $178K/yr

As part of the Wireless SOC team, you will have the opportunity to verify complex SOCs. Our team ... As a Design Verification Engineer on our team, you'll be at the center of the verification effort ...

Qualcomm

SOC Design Verification Engineer-Staff

San Diego, CA · On-site

$144K - $176K/yr

As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance ...

Apple

Wireless SOC Verification Engineer

Irvine, CA

$122K - $214K/yr

As part of the Wireless SOC team, you will have the opportunity to verify complex SOCs. Our team ... As a Design Verification Engineer on our team, you'll be at the center of the verification effort ...

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Showing results 1-20

All JobsSoc Design Verification Engineer JobsSoc Design Verification Engineer Jobs in California

Soc Design Verification Engineer information

See California salary details

$104.1K

$147.2K

$164.8K

How much do soc design verification engineer jobs pay per year?

As of Aug 9, 2026, the average yearly pay for soc design verification engineer in California is $147,197.00, according to ZipRecruiter salary data. Most workers in this role earn between $134,200.00 and $163,800.00 per year, depending on experience, location, and employer.

What are some common challenges faced by a SoC Design Verification Engineer during the verification process?

SoC Design Verification Engineers often encounter challenges related to the increasing complexity of modern system-on-chip architectures, such as integrating numerous IP blocks and ensuring robust communication between them. Debugging failures in large-scale simulations and managing tight project deadlines can also be demanding. Additionally, adapting to evolving verification methodologies and tools, as well as collaborating effectively with design and firmware teams to resolve issues quickly, are common aspects of the role. Successful engineers leverage strong problem-solving skills and proactive communication to navigate these challenges.

What are the key skills and qualifications needed to thrive as a SoC Design Verification Engineer, and why are they important?

To thrive as an SoC Design Verification Engineer, you need a solid background in digital design, computer architecture, and verification methodologies, typically supported by a degree in electrical or computer engineering. Familiarity with hardware description languages (HDL) like Verilog or VHDL, verification tools such as UVM/SystemVerilog, and simulation/debugging environments is essential. Strong analytical thinking, problem-solving abilities, and effective communication skills help in collaborating with design teams and troubleshooting complex issues. These skills and qualities are vital to ensure the reliability, functionality, and timely delivery of complex system-on-chip products.

What is a SoC Design Verification Engineer?

SoC (System-on-Chip) Design Verification Engineers are professionals who ensure that integrated circuits, which combine multiple components onto a single chip, function correctly according to their specifications. They use various verification methodologies and tools to simulate, test, and debug the design before it is manufactured. Their work involves creating testbenches, running simulation tests, and collaborating with design engineers to identify and resolve issues early in the development cycle. This helps prevent costly errors and ensures the final product meets quality and performance standards.

What is the difference between Soc Design Verification Engineer vs Soc Validation Engineer?

AspectSoc Design Verification EngineerSoc Validation Engineer
Primary FocusVerifying design correctness through simulation and testing during developmentValidating the final product to ensure it meets specifications and functions in real-world scenarios
Work EnvironmentDesign teams, simulation labs, hardware testingProduct testing, field testing, customer environments
Required CredentialsBachelor's or master's in Electrical Engineering, VLSI, or related fields; knowledge of verification toolsBachelor's or master's in Electrical Engineering, VLSI, or related fields; experience with testing methodologies

The Soc Design Verification Engineer primarily focuses on verifying the design correctness during development, while the Soc Validation Engineer tests the final product to ensure it functions correctly in real-world conditions. Both roles require similar educational backgrounds and industry experience, but their responsibilities differ in the development lifecycle.

What are popular job titles related to Soc Design Verification Engineer jobs in California? For Soc Design Verification Engineer jobs in California, the most frequently searched job titles are:
What job categories do people searching Soc Design Verification Engineer jobs in California look for? The top searched job categories for Soc Design Verification Engineer jobs in California are:
What cities in California are hiring for Soc Design Verification Engineer jobs? Cities in California with the most Soc Design Verification Engineer job openings:
Soc Design Verification Engineer jobs near you
Infographic showing various Soc Design Verification Engineer job openings in California as of July 2026, with employment types broken down into 70% Full Time, and 30% Contract. Highlights an 90% In-person, and 10% Remote job distribution, with an average salary of $147,197 per year, or $70.8 per hour.

(Principal/Lead) SoC Design Verification Engineer (Sunnyvale)

Thrive Recruitment Agency

Sunnyvale, CA • On-site

$160K - $195K/yr

Full-time

This job post has expired 1 day ago. Applications are no longer accepted.

Job description

(Principal/Lead) SoC Design Verification Engineer

Job Openings (Principal/Lead) SoC Design Verification Engineer

About the job (Principal/Lead) SoC Design Verification Engineer

As a SoC Design Verification Lead, you will be responsible to lead the DV effort for Celestial AI/ML SoC. You will be responsible for verification execution, driving efficiencies in verification strategy for an SoC from pre-silicon simulation through post-silicon validation and through the SoC production

You would have organizational leadership experience in supporting high-performance teams and processes, be a strategic problem-solver with demonstrated collaboration and communication skills.

Responsibilities
  • Lead DV effort to define and review verification and validation testplans at block, IP and SoC
  • Build, manage and mentor a team of ASIC/SoC verification engineers including managing external verification contractors/consultants.
  • Work with ASIC/SoC design team to manage critical milestones and deliveries
  • Work with Architecture, Design and Verification technical leads to shape the SoC verification methodologies and processes and to ensure DV reusability
  • Work with software team to validate complete tool chain including running real world use cases on verification models
  • Create coverage driven verification plans from specification, review and refine to achieve coverage targets
  • Provide technical leadership through mentorship and strong teamwork
Requirements
  • Natural leader who enjoys working with hardware and software development teams
  • Excellent organization skills to prioritize requirements.
  • Experience in pre-silicon verification with developing and maintaining complex SoC design verification environments in OVM, UVM and System Verilog -experience with High Level Synthesis and System C preferred
  • Hands-on experience in execution of verification plans
  • Successful tapeout of IP, CPU, GPU, AI/ML or any complex SoC development highly desirable.
  • Prior verification experience in PCIe, on-chip memory, ARM AXI, APB protocols and on-chip NOC
  • Experience in Python and scripting.
  • Team player that proactively engages with cross functional engineering teams.
  • Experience working with and directing external contractors and verification consultants
  • BSEE + 6 years of relevant design verification and management experience
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