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Design Verification Jobs in California (NOW HIRING)

Technical Link

Design Verification UVM

Santa Clara, CA · On-site

$158K - $193K/yr

Design Verification 1-2 Spots Sunnyvale, CA or Austin TX- Onsite is a must. Main thing is STONG UVM -Networking, ethernet protocols -Python is a plus Here is the JD Responsibilities * Define and ...

New

Broadcom, Inc.

Design Verification Engineer

San Jose, CA · On-site

$143K - $230K/yr

Lead ASIC Design Verification Engineer We are seeking a highly experienced and visionary Lead/Principal ASIC Design Verification Engineer to drive the verification strategy for our next-generation ...

Broadcom

Design Verification Engineer

San Jose, CA

$159K - $194K/yr

Lead ASIC Design Verification Engineer We are seeking a highly experienced and visionary Lead/Principal ASIC Design Verification Engineer to drive the verification strategy for our next-generation ...

Mythic

Design Verification Engineer

Palo Alto, CA

$120K - $225K/yr

We're hiring experienced Design Verification Engineers from junior to senior levels to play a key role in developing and verifying the designs that will bring our next-generation AI processors to ...

Mythic

Design Verification Engineer

Palo Alto, CA · On-site

$120K - $225K/yr

We're hiring experienced Design Verification Engineers from junior to senior levels to play a key role in developing and verifying the designs that will bring our next-generation AI processors to ...

Mythic

Design Verification Engineer

Palo Alto, CA · On-site

$120K - $225K/yr

We're hiring experienced Design Verification Engineers from junior to senior levels to play a key role in developing and verifying the designs that will bring our next-generation AI processors to ...

Intel

Design Verification Engineer

Santa Clara, CA

$141K - $200K/yr

Intel is seeking a Design Verification Engineer for the Silicon Chassis team. In this role, you will contribute to verification of next-generation interconnect and chassis IPs that scale across ...

Lorven Technologies

Design verification Engineer

San Jose, CA · On-site

$158K - $192K/yr

Design Verification Engineer Location: San Jose, CA We are seeking DV engineers to verify complex internal IP blocks such as compute engines, accelerators, and custom logic within SoC environments.

Redolent, Inc.

Design Verification Engineer

Santa Clara, CA · On-site

$159K - $195K/yr

We are seeking a skilled Design Verification Engineer to join our hardware engineering team. The ideal candidate will be responsible for verifying complex digital designs using advanced verification ...

RD solutions

Design verification engineer

San Jose, CA · On-site

$159K - $194K/yr

Key Responsibilities Design Verification of SOCs with embedded ARM CPUs, DSPs, DDR3, peripherals and interconnect protocols such as AHB, AXI, PCI Express etc. ○ Strong in HVL (UVM / SystemVerilog ...

New

Baidu USA

Design Verification Engineer

Sunnyvale, CA

$159K - $194K/yr

Description We are looking for an experienced design verification engineer to join our SoC team at Baidu's Sunnyvale office. The successful candidate will be a motivated self-starter who will thrive ...

iFlow Inc

Design Verification Engineer

Santa Clara, CA · On-site

$159K - $195K/yr

Design Verification Engineer Location:Santa Clara CA Duration: Long term Experience:8-15 Years Description : Key Responsibilities: Strong understanding of SV and UVM and good debugging skills.

Baidu USA

Design Verification Engineer

Sunnyvale, CA · On-site

$159K - $194K/yr

Description We are looking for an experienced design verification engineer to join our SoC team at Baidu's Sunnyvale office. The successful candidate will be a motivated self-starter who will thrive ...

Mirafra Technology

Design Verification Engineer

San Diego, CA · On-site

$144K - $176K/yr

Design Verification Engineer Job Type : Full time Location : San Diego And Bay Area : Strong verification skills: test planning, problem solving, debug, adversarial testing. Multimedia Camera Image ...

Intel Corporation

Design Verification Engineer

Santa Clara, CA · On-site

$159K - $195K/yr

About the Role Intel is seeking a New College Graduate Design Verification Engineer for the Silicon Chassis team. In this role, you will contribute to the verification of next-generation interconnect ...

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All JobsDesign Verification JobsDesign Verification Jobs in California

Design Verification information

See California salary details

$104.1K

$147.2K

$164.8K

How much do design verification jobs pay per year?

As of Jul 14, 2026, the average yearly pay for design verification in California is $147,197.00, according to ZipRecruiter salary data. Most workers in this role earn between $134,200.00 and $163,800.00 per year, depending on experience, location, and employer.

What is the difference between Design Verification vs Design Validation?

AspectDesign VerificationDesign Validation
PurposeEnsures the design meets specified requirements through testing and analysisConfirms the final product fulfills user needs and intended use
TimingDuring the development phaseAfter the product is developed and before release
MethodsInspections, reviews, testing, analysisUser testing, field trials, real-world testing
FocusDesign correctness and complianceProduct effectiveness and user satisfaction

While Design Verification checks if the design meets specified requirements during development, Design Validation ensures the final product performs effectively in real-world conditions. Both are essential steps in the product development process to deliver a reliable and user-centered product.

What are design verification engineers?

Design verification engineers are professionals who ensure that hardware or software designs meet their intended specifications and function correctly before production or release. They develop and execute tests, write verification plans, create simulation environments, and identify design flaws or errors. Their work is critical in industries like semiconductor, electronics, and software development to prevent costly mistakes and ensure high-quality products. Design verification engineers often work closely with design and validation teams throughout the product development lifecycle.

What are the key skills and qualifications needed to thrive as a Design Verification Engineer, and why are they important?

To thrive as a Design Verification Engineer, you need a solid background in digital design, verification methodologies, and programming languages like SystemVerilog, typically supported by a degree in electrical engineering or a related field. Familiarity with verification tools such as UVM, simulation environments, and EDA software is essential, along with knowledge of scripting languages like Python or Perl. Strong analytical thinking, attention to detail, and effective teamwork are standout soft skills in this role. These skills ensure accurate validation of complex hardware designs, reducing errors and supporting reliable product development cycles.

What are some common challenges faced by Design Verification engineers, and how can they be addressed?

Design Verification engineers often encounter challenges such as managing complex testbenches, debugging intricate corner cases, and ensuring coverage completeness within tight project timelines. To address these, it’s important to have strong scripting skills, collaborate closely with design and validation teams, and make effective use of verification methodologies like UVM. Regular communication and review cycles also help catch issues early and improve overall verification quality.
What are the most commonly searched types of Design Verification jobs in California? The most popular types of Design Verification jobs in California are:
What are popular job titles related to Design Verification jobs in California? For Design Verification jobs in California, the most frequently searched job titles are:
What job categories do people searching Design Verification jobs in California look for? The top searched job categories for Design Verification jobs in California are:
What cities in California are hiring for Design Verification jobs? Cities in California with the most Design Verification job openings:
Design Verification jobs near you
Infographic showing various Design Verification job openings in California as of July 2026, with employment types broken down into 87% Full Time, 9% Part Time, 1% Temporary, and 3% Contract. Highlights an 87% Physical, 3% Hybrid, and 10% Remote job distribution, with an average salary of $147,197 per year, or $70.8 per hour.
Design Verification UVM

Design Verification UVM

Technical Link

Santa Clara, CA • On-site

$158K - $193K/yr

Other

Posted 7 days ago

New

Job description

Design Verification 

1-2 Spots

Sunnyvale, CA or Austin TX- Onsite is a must.

Main thing is STONG UVM

-Networking, ethernet protocols

-Python is a plus

Here is the JD
Responsibilities

  • Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification
  • Develop functional tests based on verification test plan
  • Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage
  • Debug, root-cause, and resolve functional failures in the design, partnering with the Design team
  • Collaborate with cross-functional teams like Design, Model, Emulation, and Silicon validation teams towards ensuring the highest design quality

Minimum Qualifications

  • B.S or M.S degree in Electrical Engineering, Computer Engineering or Computer Science
  • Hands-on experience in Verilog, SystemVerilog, C/C++ based verification, and UVM methodology
  • Experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies
  • Experience in EDA tools and scripting (Python, Perl, Shell) used to build tools and flows for verification environments.
  • Experience in architecting and implementing Design Verification infrastructure and executing the complete verification cycle

Preferred Qualifications

  • Experience in the development of UVM based verification environments from scratch
  • Experience with Design verification of Data-center applications like Video, AI/ML, and Networking designs
  • Experience with revision control systems like Mercurial(Hg), Git or SVN
  • Experience with verification of ARM/RISC-V based sub-systems or SoCs

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