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Cpu Rtl Design Engineer Jobs in California (NOW HIRING)

$100K - $500K/yr

We are looking for a talented engineer to join our CPU design team to define and implement RTL for high-performance CPUs. You'll work on a CPU based on RISC-V ISA, collaborating with DV, PD, and ...

As a CPU Micro-architecture and RTL Design Engineer, you will work with chip architects to conceive of the micro-architecture and also help with architecture/product definition through early ...

CPU Systems RTL Engineer

Santa Clara, CA · On-site

$117K - $160K/yr

We are hiring talented engineers for CPU RTL development targeted for high performance, low power ... Knowledge of logic design principles along with timing and power implications. Preferred ...

CPU Systems RTL Engineer

Santa Clara, CA · On-site

$117K - $160K/yr

We are hiring talented engineers for CPU RTL development targeted for high performance, low power ... Help the design verification team execute on the functional verification strategy. • Performance ...

RISCV CPU System RTL Engineer

Santa Clara, CA · On-site

$117K - $160K/yr

Knowledge of high-performance design strategies and trade-offs in CPU microarchitecture ... RTL Engineer, you will own or contribute to the following: * Explore performance and power ...

Engineering Group, Engineering Group > CPU Engineering General Summary: We are seeking a highly ... You'll work closely with CPU design teams to support RTL development, triage issues, and enhance ...

Expertise in CPU processor designs in one or more of the following areas: instruction fetch and ... Proficiency with hardware (RTL) design in Verilog, System Verilog, or VHDL. Experience with Scala ...

We're hiring experienced RTL Design Engineers from junior to senior levels to play a key role in designing and implementing the components that will bring our next-generation AI processors to life.

Requirements: • 8+ yrs of recent industry experience in high-performance, energy-efficient CPU ... RTL) design in Verilog, System Verilog, or VHDL. • Experience with Scala and/or Chisel is a plus ...

We're hiring experienced RTL Design Engineers from junior to senior levels to play a key role in designing and implementing the components that will bring our next-generation AI processors to life.

We're hiring experienced RTL Design Engineers from junior to senior levels to play a key role in designing and implementing the components that will bring our next-generation AI processors to life.

Position: RTL Design Engineers Type: Contract Compensation: $100-$175/hour Location: Remote ... Background in CPU , GPU/ML accelerator , networking, memory subsystem, PCIe/high-speed IO , SoC ...

As a CPU Microarchitect/RTL Engineer, you will participate in the following: • Micro-architecture ... design to target power, performance, area and timing goals • Verification - support the ...

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Cpu Rtl Design Engineer information

See California salary details

$40K

$87K

$156.4K

How much do cpu rtl design engineer jobs pay per year?

As of Jun 11, 2026, the average yearly pay for cpu rtl design engineer in California is $86,995.00, according to ZipRecruiter salary data. Most workers in this role earn between $67,100.00 and $97,200.00 per year, depending on experience, location, and employer.

What is the difference between Cpu Rtl Design Engineer vs Cpu Verification Engineer?

AspectCpu Rtl Design EngineerCpu Verification Engineer
Primary FocusDesigning and developing RTL code for CPU componentsVerifying and testing RTL designs for correctness
Skills & CertificationsHDL languages (Verilog/VHDL), FPGA/ASIC design experienceHDL, testbench development, simulation tools
Work EnvironmentDesign teams, hardware development labsVerification teams, simulation environments
Industry UsageSemiconductor companies, CPU design firmsASIC/FPGA verification, chip validation

While both roles require HDL knowledge and work within hardware design environments, Cpu Rtl Design Engineers focus on creating the RTL code for CPU components, whereas Cpu Verification Engineers concentrate on testing and validating those designs to ensure functionality and performance.

What are some common challenges faced by CPU RTL Design Engineers when collaborating with verification and architecture teams?

CPU RTL Design Engineers often work closely with both verification and architecture teams to ensure that the design meets functional and performance requirements. A common challenge is ensuring clear communication of design intent and handling feedback from verification regarding corner cases or bugs. Balancing architectural changes with design timelines and maintaining synchronization across multiple teams can be demanding. Successful engineers proactively document their work, participate in regular sync-ups, and are open to iterative improvements based on collaborative feedback.

What are the key skills and qualifications needed to thrive as a CPU RTL Design Engineer, and why are they important?

To thrive as a CPU RTL Design Engineer, you need a strong background in digital logic design, computer architecture, and proficiency in hardware description languages like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys or Cadence, and experience with simulation, synthesis, and verification methodologies are essential. Strong problem-solving skills, attention to detail, and effective teamwork are crucial soft skills for success in this role. These competencies enable the accurate implementation, debugging, and optimization of complex CPU designs, ensuring performance and reliability in final hardware products.

What are CPU RTL Design Engineers?

CPU RTL (Register Transfer Level) Design Engineers are specialized hardware engineers who design, implement, and verify the digital logic that forms the core of computer processors. They use hardware description languages like Verilog or VHDL to create and simulate the functional blocks of CPUs, ensuring correct operation and optimal performance. Their work involves close collaboration with architecture, verification, and physical design teams to bring processor designs from conception to silicon. They also debug and optimize designs to meet power, speed, and area goals.
What job categories do people searching Cpu Rtl Design Engineer jobs in California look for? The top searched job categories for Cpu Rtl Design Engineer jobs in California are:
What cities in California are hiring for Cpu Rtl Design Engineer jobs? Cities in California with the most Cpu Rtl Design Engineer job openings:

$100K - $500K/yr

Other

Posted 19 days ago


Job description

We are looking for a talented engineer to join our CPU design team to define and implement RTL for high-performance CPUs. You'll work on a CPU based on RISC-V ISA, collaborating with DV, PD, and performance teams to deliver a functional, timing, and power-converged design.

This role is hybrid, based out of Austin, TX or Santa Clara, CA.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

  • Experienced in CPU microarchitecture with expertise in Rename, Scheduler, ROB, Load Store, Branch Prediction, Cache or Datapath.
  • Skilled in RTL coding (Verilog/VHDL) and familiar with industry-standard tools for simulation, synthesis, and power analysis.
  • Proficient in debugging RTL/logic across multiple design hierarchies and pre/post-silicon environments.
  • Background in microarchitecture definition, design specification, and performance-driven trade-off analysis.

What We Need

  • Own RTL design and microarchitecture development for a portion of a CPU block of a high-performance RISC-V CPU.
  • Collaborate closely with DV, PD, and performance engineers to meet functional, timing, and power goals.
  • Use innovative techniques to optimize power, performance, and area while driving RTL experiments and evaluating results.
  • Partner with validation and test teams to ensure robust pre-silicon and post-silicon execution.
  • Enhance RTL design environment, tools, and methodologies to improve development efficiency.

What You Will Learn

  • End-to-end exposure to CPU design from microarchitecture through timing and power convergence.
  • Hands-on experience optimizing high performance CPU designs in both pre-silicon and post-silicon phases.
  • Integration of open-source and industry-standard tools to improve RTL flows and results.
  • Work in a deeply technical, highly collaborative team solving cutting-edge CPU design challenges.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.