As a Staff Chip Design Engineer on our team, you'll tackle real-world scientific and coding challenges--defining the processes for dataset collection, curation, and enhancement. You'll fuse knowledge ...
As a Staff Chip Design Engineer on our team, you'll tackle real-world scientific and coding challenges--defining the processes for dataset collection, curation, and enhancement. You'll fuse knowledge ...
ASIC Chip Design Lead
Saratoga, CA ยท On-site
$250K - $280K/yr
The company is in execution mode and has a world-class engineering team with decades of experience ... Position Overview We are seeking a hands-on ASIC Chip Design Lead to own chip design execution from ...
ASIC Chip Design Lead
Saratoga, CA ยท On-site
$250K - $280K/yr
The company is in execution mode and has a world-class engineering team with decades of experience ... Position Overview We are seeking a hands-on ASIC Chip Design Lead to own chip design execution from ...
They are seeking a Senior C++ Software Engineer to develop and support infrastructure tools for chip design and verification processes, ensuring high performance and reliability for design engineers.
They are seeking a Senior C++ Software Engineer to develop and support infrastructure tools for chip design and verification processes, ensuring high performance and reliability for design engineers.
As a software engineer, you will craft highly efficient software to automate and facilitate chip design and verification processes. What You'll be Doing: * Work as a team to build reliable, scalable ...
As a software engineer, you will craft highly efficient software to automate and facilitate chip design and verification processes. What You'll be Doing: * Work as a team to build reliable, scalable ...
SoC Design Engineer
Santa Clara, CA ยท On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor ... Perform chip bring-up, validation and debugging. Design, integrate and validate data pipeline ...
SoC Design Engineer
Santa Clara, CA ยท On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor ... Perform chip bring-up, validation and debugging. Design, integrate and validate data pipeline ...
As a software engineer, you will craft highly efficient software to automate and facilitate chip design and verification processes. What You'll be Doing: * Work as a team to build reliable, scalable ...
As a software engineer, you will craft highly efficient software to automate and facilitate chip design and verification processes. What You'll be Doing: * Work as a team to build reliable, scalable ...
SoC Design Engineer
Santa Clara, CA ยท On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor ... Perform chip bring-up, validation and debugging. Design, integrate and validate data pipeline ...
SoC Design Engineer
Santa Clara, CA ยท On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor ... Perform chip bring-up, validation and debugging. Design, integrate and validate data pipeline ...
SoC Design Engineer
$156K - $160K/yr
SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor ... Perform chip bring-up, validation and debugging. Design, integrate and validate data pipeline ...
SoC Design Engineer
$156K - $160K/yr
SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor ... Perform chip bring-up, validation and debugging. Design, integrate and validate data pipeline ...
SoC Design Engineer
Santa Clara, CA ยท On-site
SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor ... Perform chip bring-up, validation and debugging. Design, integrate and validate data pipeline ...
Quick apply
Apply Early
SoC Design Engineer
Santa Clara, CA ยท On-site
SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor ... Perform chip bring-up, validation and debugging. Design, integrate and validate data pipeline ...
Apply Early
Principal Physical Design Engineer
Sunnyvale, CA ยท On-site
$159K - $164K/yr
Principal Physical Design Engineer This role has been designed as 'Hybrid' with an expectation that ... Develop the chip-level clock network and clock stations in collaboration with clock experts.
Principal Physical Design Engineer
Sunnyvale, CA ยท On-site
$159K - $164K/yr
Principal Physical Design Engineer This role has been designed as 'Hybrid' with an expectation that ... Develop the chip-level clock network and clock stations in collaboration with clock experts.
Principal Physical Design Engineer
Sunnyvale, CA ยท Hybrid
$159K - $164K/yr
Principal Physical Design Engineer This role has been designed as 'Hybrid' with an expectation that ... Develop the chip-level clock network and clock stations in collaboration with clock experts.
Principal Physical Design Engineer
Sunnyvale, CA ยท Hybrid
$159K - $164K/yr
Principal Physical Design Engineer This role has been designed as 'Hybrid' with an expectation that ... Develop the chip-level clock network and clock stations in collaboration with clock experts.
Principal Physical Design Engineer
Sunnyvale, CA ยท Hybrid
$159K - $164K/yr
Principal Physical Design Engineer This role has been designed as 'Hybrid' with an expectation that ... Develop the chip-level clock network and clock stations in collaboration with clock experts.
Principal Physical Design Engineer
Sunnyvale, CA ยท Hybrid
$159K - $164K/yr
Principal Physical Design Engineer This role has been designed as 'Hybrid' with an expectation that ... Develop the chip-level clock network and clock stations in collaboration with clock experts.
Principal Physical Design Engineer
Sunnyvale, CA ยท Hybrid
$159K - $164K/yr
Principal Physical Design Engineer This role has been designed as 'Hybrid' with an expectation that ... Develop the chip-level clock network and clock stations in collaboration with clock experts.
Principal Physical Design Engineer
Sunnyvale, CA ยท Hybrid
$159K - $164K/yr
Principal Physical Design Engineer This role has been designed as 'Hybrid' with an expectation that ... Develop the chip-level clock network and clock stations in collaboration with clock experts.
Team Description: The Brain Interfaces Soc Department delivers chip architecture and silicon ... As a Digital IC Design Engineer Intern, your responsibilities will include: * Micro-architecture ...
Team Description: The Brain Interfaces Soc Department delivers chip architecture and silicon ... As a Digital IC Design Engineer Intern, your responsibilities will include: * Micro-architecture ...
Team Description: The Brain Interfaces Soc Department delivers chip architecture and silicon ... We are looking for Analog and Mixed-Signal IC Design Engineer Interns who are interested in ...
Team Description: The Brain Interfaces Soc Department delivers chip architecture and silicon ... We are looking for Analog and Mixed-Signal IC Design Engineer Interns who are interested in ...
Founding RTL Design Engineer (San Francisco)
San Francisco, CA ยท On-site
$180K - $250K/yr
They say chip design never got its GPT moment as there is no training data: 99% of RTL data is closed-source. Software engineers can use Cursor to 10x their productivity, but hardware engineers can't ...
Founding RTL Design Engineer (San Francisco)
San Francisco, CA ยท On-site
$180K - $250K/yr
They say chip design never got its GPT moment as there is no training data: 99% of RTL data is closed-source. Software engineers can use Cursor to 10x their productivity, but hardware engineers can't ...
Principal Design Engineer
Torrance, CA ยท On-site
Principal Design Engineer (Principal Analog IC Designer) Reports to: VP of IC Design In Office ... Extensive previous experience in chip design in the power supply field (Analog IC Design, Power ...
Principal Design Engineer
Torrance, CA ยท On-site
Principal Design Engineer (Principal Analog IC Designer) Reports to: VP of IC Design In Office ... Extensive previous experience in chip design in the power supply field (Analog IC Design, Power ...
Principal Design Engineer
Torrance, CA ยท On-site
$190K - $230K/yr
Principal Design Engineer (Principal Analog IC Designer) Reports to: VP of IC Design In Office ... Extensive previous experience in chip design in the power supply field (Analog IC Design, Power ...
Principal Design Engineer
Torrance, CA ยท On-site
$190K - $230K/yr
Principal Design Engineer (Principal Analog IC Designer) Reports to: VP of IC Design In Office ... Extensive previous experience in chip design in the power supply field (Analog IC Design, Power ...
Chip CAD DevOps Engineer, Google Cloud
Sunnyvale, CA ยท On-site
$62 - $84.75/hr
As a Chip CAD Engineer, you will be working with a highly creative team, innovating new ways to develop hardware, improve upon industry standards, and with the potential to evolve a new paradigm in ...
Chip CAD DevOps Engineer, Google Cloud
Sunnyvale, CA ยท On-site
$62 - $84.75/hr
As a Chip CAD Engineer, you will be working with a highly creative team, innovating new ways to develop hardware, improve upon industry standards, and with the potential to evolve a new paradigm in ...
RTL Design Engineer - AI Tools
San Francisco, CA ยท Remote
$100 - $175/hr
Position: RTL Design Engineers Type: Contract Compensation: $100-$175/hour Location: Remote ... Evaluate digital chip design workflows to enhance AI model training and evaluation . * Design and ...
Quick apply
RTL Design Engineer - AI Tools
San Francisco, CA ยท Remote
$100 - $175/hr
Position: RTL Design Engineers Type: Contract Compensation: $100-$175/hour Location: Remote ... Evaluate digital chip design workflows to enhance AI model training and evaluation . * Design and ...
Chip Design Engineer information
See California salary details
$40K - $50.6K
2% of jobs
$50.6K - $61.1K
11% of jobs
$66.8K is the 25th percentile. Wages below this are outliers.
$61.1K - $71.7K
23% of jobs
The median wage is $78.5K / yr.
$71.7K - $82.3K
22% of jobs
$82.3K - $92.9K
17% of jobs
$93.2K is the 75th percentile. Wages above this are outliers.
$92.9K - $103.5K
9% of jobs
$103.5K - $114.1K
6% of jobs
$114.1K - $124.7K
3% of jobs
$124.7K - $135.2K
3% of jobs
$135.2K - $145.8K
2% of jobs
$145.8K - $156.4K
1% of jobs
$40K
$87K
$156.4K
How much do chip design engineer jobs pay per year?
Are chip designers in demand?
What is the salary of microchip design engineer?
What engineer makes $500,000 a year?
What are some typical projects or daily tasks for a Chip Design Engineer?
As a Chip Design Engineer, your daily tasks often include designing and simulating integrated circuits, reviewing schematics, writing and verifying code in hardware description languages, and collaborating closely with layout engineers and verification teams. You may also participate in design reviews, troubleshoot potential issues, and optimize chip performance to meet specific requirements. Working with cross-functional teams, including software engineers and product managers, is common to ensure the chip integrates seamlessly with end products. This role provides opportunities to see your designs progress from concept to final manufacturing, offering valuable hands-on experience at each stage of development.
What are the key skills and qualifications needed to thrive in the Chip Design Engineer position, and why are they important?
To thrive as a Chip Design Engineer, you need a solid background in electrical engineering, digital and analog circuit design, and experience with VLSI principles, usually backed by a relevant degree. Proficiency with industry-standard tools like Cadence, Synopsys, and experience in HDL languages (such as Verilog or VHDL) is highly valued, as are certifications like Certified IC Designer. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help set you apart. These competencies are critical for developing reliable, high-performance chips in a collaborative and deadline-driven environment.
What is a Chip Design Engineer job?
A Chip Design Engineer is responsible for designing and developing integrated circuits (ICs) used in electronic devices. They work with hardware description languages (HDLs) like Verilog or VHDL to create digital or analog circuit designs. Their role includes logic design, verification, simulation, and testing to ensure performance and power efficiency. They collaborate with teams across hardware, software, and manufacturing to bring chips from concept to production. Chip Design Engineers are essential in industries like consumer electronics, automotive, and telecommunications.
How much do chip design engineers make?

Full-time
Posted 8 days ago
Job description
At Cognichip, weโre not just building AIโweโre redefining whatโs possible at the nexus of silicon design and machine learning. As a Staff Chip Design Engineer on our team, youโll tackle real-world scientific and coding challengesโdefining the processes for dataset collection, curation, and enhancement. Youโll fuse knowledge of chip design and ML into end-to-end silicon design flows. If you thrive on pushing the envelope of research and translating cutting-edge ideas into production-grade systems, this is your stage.
What you\'ll do- Serve as the domain experts, embedding chip design experience into a team creating AI chip design assistants
- Bridge research and production. Collaborate closely with ML and SW teams to integrate experimental models into scalable pipelines.
- Define data-processing pipelines, training orchestration, and evaluation frameworks to accelerate iteration on large-scale experiments.
- Analyze and iterate. Dive deep into large datasetsโexperimental logs, simulation outputs, and user interaction tracesโto diagnose model behavior, surface failure modes, and drive evidence-based improvements.
- Publish and present. Document findings in technical reports, contribute to open-source projects, and present work internally (and externally, when appropriate) to help shape the broader AI research community.
- Masters in Computer Science, Electrical Engineering, or a closely related field
- 10-15 years of experience in RTL design, or a combination of design and verification
- Proficiency in SystemVerilog and Python languages
- Excellent written and verbal communication skills, esp to convey chip design knowledge to scientists/engineers in other fields
- Comfortable working in a dynamic, research-heavy startup environment
- Demonstrated coursework or project experience in machine learning and/or deep learning
- Personal projects showcasing innovation, creativity, and continuous learning
- Knowledge of industry-standard communication protocols (SPI, I2C, AXI, Ethernet, PCIe, DDR5, etc)
- Knowledge of open-source tools and contribution practices (Verilator, CocoTB, Yosys, OpenSTA, etc)
- Experience with multiple areas of chip flow (RTL design, validation, synthesis, physical design, etc)
- Experience with FPGA development (Vivado, Vitis, Quartus, etc), front end, IP integration, and/or back end
Weโre a fast-moving AI startup with a collaborative, high-trust culture. Youโll work with top-tier engineers, scientists, and buildersโsolving hard problems that sit at the intersection of cloud computing, AI, and chip design. We value technical excellence, ownership, and the freedom to experiment. If youโre excited to build the future of engineering, youโll feel right at home.
LogisticsThis position is available in Silicon Valleyโs Redwood Shores, CA. We have a hybrid schedule with four days in office, one day remote. Cognichip accepts applications that need H1B transfer.
How to applyDonโt meet every single requirement? Feel over-qualified? Thatโs okayโif you\'re excited about our mission, weโd still love to hear from you. We are growing fast and need a world class team of various experience levels.