1

Asic Verification Engineer Jobs in California (NOW HIRING)

NVIDIA is seeking an outstanding ASIC Verification Engineer to verify the design and implementation of the world's leading SoC's and GPU's. This position offers the opportunity to have a real impact ...

NVIDIA is seeking an outstanding ASIC Verification Engineer to verify the design and implementation of the world's leading SoC's and GPU's. This position offers the opportunity to have a real impact ...

ASIC Verification Engineer High Speed Interconnect Product (HSIP) Group Broadcom is a global leader and innovator in semiconductor solutions for wired and wireless communications. The High Speed ...

next page

Showing results 1-20

Asic Verification Engineer information

See California salary details

$86.8K

$154K

$204.3K

How much do asic verification engineer jobs pay per year?

As of Sep 12, 2026, the average yearly pay for asic verification engineer in California is $154,033.00, according to ZipRecruiter salary data. Most workers in this role earn between $134,200.00 and $173,200.00 per year, depending on experience, location, and employer.

What is an ASIC Verification Engineer?

An ASIC Verification Engineer is a professional who specializes in testing and validating the design of Application-Specific Integrated Circuits (ASICs) to ensure they function correctly according to specifications. They develop testbenches, write test cases, and use simulation tools to detect and debug design errors before the chip is manufactured. Their work is critical in preventing costly mistakes and ensuring the final product meets performance and reliability standards. ASIC Verification Engineers often collaborate closely with design engineers to understand requirements and resolve issues.

What is an ASIC Verification Engineer?

An ASIC verification engineer works with system designers and architects to test performance and validate hardware components and systems. You plan and develop a verification environment while coordinating with developers and architects throughout the design process. Your duties involve working closely with these other teams during the design process. Your responsibilities may include using computer hardware languages such as Verilog. In this career, you work on hardware design and use algorithms, data structure analysis, and other advanced design techniques.

What are the key skills and qualifications needed to thrive as an ASIC Verification Engineer, and why are they important?

To thrive as an ASIC Verification Engineer, you need a solid background in digital design, computer architecture, and verification methodologies, typically supported by a degree in electrical engineering or a related field. Familiarity with tools and languages like SystemVerilog, UVM, simulation environments, and waveform viewers is essential, and certifications in verification or design may be beneficial. Strong analytical thinking, attention to detail, and effective communication are crucial soft skills for debugging complex designs and collaborating with design teams. These skills and qualities are vital to ensure that ASIC designs are thoroughly tested, compliant with specifications, and delivered with high quality and reliability.

What are some common challenges faced by ASIC Verification Engineers during the verification process?

ASIC Verification Engineers often encounter challenges such as dealing with complex designs, debugging intricate issues, and ensuring thorough coverage of all design specifications. Coordinating with design and RTL teams to clarify requirements and resolve discrepancies is a frequent part of the job. Additionally, managing tight project timelines while maintaining high verification quality requires effective time management and strong communication skills. Continuous learning is also important, as verification methodologies and tools evolve rapidly in this field.

What is the difference between Asic Verification Engineer vs Digital Design Engineer?

AspectAsic Verification EngineerDigital Design Engineer
Primary FocusVerifying ASIC designs for correctness and functionalityDesigning digital circuits and architectures
Skills & CertificationsHardware description languages (HDL), verification tools, scriptingHDL, digital logic, circuit design
Work EnvironmentVerification labs, simulation environmentsDesign teams, CAD tools, prototyping labs
Industry UsageSemiconductor, electronics manufacturingSemiconductor, consumer electronics, computing

While both roles require expertise in HDL and semiconductor industry experience, Asic Verification Engineers focus on testing and validating ASIC designs, ensuring they meet specifications. Digital Design Engineers primarily create and develop digital circuits. Both roles are essential in the chip development process but differ in their core responsibilities and daily tasks.

What are the most commonly searched types of Asic Verification Engineer jobs in California?

The most popular types of Asic Verification Engineer jobs in California are:

What job categories do people searching Asic Verification Engineer jobs in California look for?

The top searched job categories for Asic Verification Engineer jobs in California are:

What cities in California are hiring for Asic Verification Engineer jobs?

Cities in California with the most Asic Verification Engineer job openings:

Infographic showing various Asic Verification Engineer job openings in California as of September 2026, with employment types broken down into 1% Internship, 84% Full Time, 12% Part Time, and 3% Contract. Highlights an 86% Physical, 4% Hybrid, and 10% Remote job distribution, with an average salary of $154,033 per year, or $74.1 per hour.

ASIC Verification Engineer

Sunnyvale, CA • Hybrid

Hewlett Packard Enterprise Development LP
IT Services • 10K+ employees

Full-time

Re-posted 13 days ago


Hewlett Packard Enterprise rating

8.8

Company rating: 8.8 out of 10

Based on 28 frontline employees who took The Breakroom Quiz


Job description

ASIC Verification EngineerThis role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from an HPE office.

Who We Are:

Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today's complex world.Our culture thrives onfinding new and better ways to accelerate what's next.We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs.We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you.Open up opportunities with HPE.

Job Description:

This is a Hybrid role based in Sunnyvale, CA with an expectation that you'll be in the office 2 days per week.

HPE Networking is a leading provider of advanced routers and switches for the internet. We keep the world connected with speed, reliability, security, and ease of use. At HPE Networking Silicon group, we push the boundaries of what is possible in a piece of silicon die. We build cutting edge networking chips used to build our world-class routers and switches.

Bring your passion and there are no boundaries to what you can accomplish here. We are like a start-up in a big company. Year after year, our group builds the most powerful and highest density networking chips.

As part of our fast-paced silicon group, you will become an expert in building high-speed ASICs, from specifications to final netlist. We give you opportunities to work on complex modules and subsystems where you can challenge yourself and grow.

Open communications, empowerment, innovation, teamwork, and customer success are the foundations of team culture. Thus, you set your own limits for learning, achievements, and rewards.

Position Summary

We are seeking a highly motivated ASIC Verification Engineer to join our networking silicon development team.

Key Responsibilities:

  • Own and drive block-level or subsystem verification efforts, from creating test plans to achieving comprehensive coverage closure.
  • Develop, enhance, and maintain advanced UVM verification environments, including agents, sequences, scoreboards, virtual sequences, and register models.
  • Perform constraint-driven random testing, debug complex SoC designs, and ensure functional coverage and assertion goals are met.
  • Analyze simulation results using industry-leading simulation tools (e.g., Cadence Xcelium, Synopsys VCS, Mentor Questa) and debug waveforms to validate design functionality.
  • Collaborate with cross-functional teams to identify and resolve issues, ensuring high-quality ASIC/SoC deliverables.

Required Skills and Qualifications:

  • 5+ years of experience in ASIC/SoC verification with a proven track record of owning verification from test plan to coverage closure.
  • Strong expertise in SystemVerilog and UVM methodology, including developing environments from scratch.
  • Deep understanding of randomization, constraints, functional coverage, and assertions (SVA).
  • Hands-on experience in test planning, coverage analysis, and debugging of complex SoC designs.
  • Proficiency with industry-standard simulation tools (e.g., Cadence Xcelium, Synopsys VCS, Mentor Questa) and waveform debugging.

Preferred Skills and Experience:

  • Experience verifying networking ASICs or router datapath/control blocks, such as packet processing, forwarding engines, or fabric interfaces.
  • Familiarity with high-speed interconnects, buffers, or scheduling pipelines in large networking SoCs.
  • Exposure to emulation environments, hardware acceleration, or traffic-model integration.
  • Knowledge of coverage analytics, regression dashboards, and continuous-integration flows (e.g., Jenkins).
  • Understanding of low-power (UPF) or formal verification methodologies.
  • Own and drive block-level/subsystem/FullChip verification efforts, from creating test plans to achieving comprehensive coverage closure
  • Experience with post-silicon bring-up and debug is a plus.
  • Familiarity with emulation environments and debug flows is desirable.

What We Can Offer You:

Health & Wellbeing

We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing.

Personal & Professional Development

We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have - whether you want to become a knowledge expert in your field or apply your skills to another division.

Unconditional Inclusion

We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good.

Let's Stay Connected:

Follow @HPECareers on Instagram to see the latest on people, culture and tech at HPE.

#unitedstates#networking

Job:

Engineering

Job Level:

TCP_03"The expected salary/wage range for this position is provided below. Actual offer may vary from this range based upon geographic location, work experience, education/training, and/or skill level.
- United States of America: Annual Salary USD 120,000 - 243,000 in California
The listed salary range reflects base salary. Variable incentives may also be offered."

Information about employee benefits offered in the US can be found at https://myhperewards.com/main/new-hire-enrollment.html

HPE is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are made on the basis of qualifications, merit, and business need. Our goal is to be one global team that is representative of our customers, in an inclusive environment where we can continue to innovate and grow together. Please click here: Equal Employment Opportunity.

Hewlett Packard Enterprise is EEO Protected Veteran/ Individual with Disabilities.

HPE will comply with all applicable laws related to employer use of arrest and conviction records, including laws requiring employers to consider for employment qualified applicants with criminal histories.

Recruitment Fraud Alert

We have become aware of an increase in fraudulent recruitment activities in which individuals impersonate our company or authorized recruitment agencies to offer fake employment opportunities. These scams may occur through false websites, emails, social media, or chat-based applications and often aim to obtain personal information or money. Please note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge a candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process. We also never request personal information such as back account details, Social Security numbers, or national IDs via social media or chat applications.

All legitimate job opportunities will come through official company channels, and candidates are responsible for verifying the credentials of any third party claiming to represent the company. Any reliance on fraudulent communication is at the individual's own risk, and HPE disclaims legal liability for any resulting damages. If you suspect recruitment fraud, do not share personal information or make any payments and report the incident to your local authorities immediately.


What Hewlett Packard Enterprise employees say

Pay

Benefits

Hours and flexibility

Workplace

Get the full story on Breakroom