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Layout Design Engineer Jobs in California (NOW HIRING)

Superbeo

Analog Layout Design Engineer

Santa Clara, CA · On-site

$237K/yr

Analog Layout Design Engineer Job location: Santa Clara, CA, 95054 Job Duration: 3 Months, Contract to Hire * Experience with layout of cutting-edge high-performance, high-speed CMOS integrated ...

Eridu AI

Substrate Layout Design Engineer

Saratoga, CA · On-site

$240K - $275K/yr

Position Overview We are seeking an experienced Substrate Layout Design Engineer to support the development of an advanced multi-die organic based flip chip module that integrates multiple dies in a ...

Teledyne

Sr. ASIC Layout Design Engineer

Goleta, CA

$113K - $151K/yr

We are seeking an experienced Senior Analog/Mixed-Signal Layout Design Engineer to help develop the next generation of high-performance focal-plane array readout integrated circuits (ROICs). These ...

Monolithic Power Systems, Inc.

Layout Engineer

San Jose, CA · On-site +1

$70K - $110K/yr

Support off-site design and layout team and be able to work with other teams outside USA. * Keep ... AA Degree in Engineering (Bachelor's degree is preferred) or a related field of study or program ...

Innogrit

Design Engineer

San Jose, CA · On-site

Drive OVM/UVM design verification and support FPGA engineers for early prototyping. * Execute RTL ... Perform post-layout Hspice simulation to characterize the designed circuit. * Assist with test ...

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Layout Design Engineer information

See California salary details

$44.4K

$119.3K

$183.1K

How much do layout design engineer jobs pay per year?

As of Jun 9, 2026, the average yearly pay for layout design engineer in California is $119,266.00, according to ZipRecruiter salary data. Most workers in this role earn between $88,800.00 and $142,100.00 per year, depending on experience, location, and employer.

What is a Layout Design Engineer job?

A Layout Design Engineer is responsible for designing and optimizing the physical layout of integrated circuits (ICs) in semiconductor chips. They work closely with circuit designers to ensure that the layout meets performance, power, and area constraints while adhering to manufacturing and design rules. Their role involves using EDA tools for placement, routing, and verification of chip layouts. They also conduct design rule checks (DRC) and layout versus schematic (LVS) verification to ensure design accuracy.

What are the key skills and qualifications needed to thrive in the Layout Design Engineer position, and why are they important?

To thrive as a Layout Design Engineer, you need strong skills in electronic circuit design, physical layout principles, and a background in electrical or electronics engineering, typically supported by a relevant bachelor's degree. Proficiency with EDA tools such as Cadence, Mentor Graphics, or Synopsys, and knowledge of industry standards (e.g., IPC) are essential. Exceptional attention to detail, problem-solving, and effective teamwork and communication skills help set candidates apart. These capabilities ensure precise, manufacturable layouts and smooth collaboration with multidisciplinary teams to meet project goals and deadlines.

What does a typical day look like for a Layout Design Engineer?

A typical day for a Layout Design Engineer involves translating schematic designs into detailed physical layouts using specialized CAD tools, collaborating closely with circuit designers to optimize for performance and manufacturability. You may spend time reviewing design rule checks (DRC), participating in team meetings to discuss project progress or resolve technical challenges, and coordinating with fabrication or test engineers to ensure successful implementation. The role requires both independent focus and frequent teamwork, offering a dynamic mix of technical and collaborative tasks. Depending on the company, you might also be involved in process improvement initiatives or mentoring junior engineers as you gain experience.

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Layout Design Engineer jobs near you
Senior Layout Design Engineer

Senior Layout Design Engineer

Xoriant Corporation

San Jose, CA • Hybrid

Other

Posted 10 days ago

Job description

Job Description:

Job Title: "Senior Layout Design Engineer"

Location: San Jose, CA (Onsite, 5 days a week)

Duration: Long Term

Description

Client is looking for a talent that has strong background and hands-on experience on RF/Analog circuit layout design. The candidate will be developing next-generation RF transceivers and mixed-signal circuits for wireless communication systems along with circuit designers.

Requirements

  • Associate and Bachelor's Degree with 10+ years of relevant industry experience in Electrical Engineering, Technical, or related field preferred.
  • Extensive experience in analog/mixed-signal layout design of deep submicron CMOS circuits and recent experience on advance nodes including FinFET technologies.
  • High level of proficiency in interpretation of CALIBRE DRC, ERC, LVS, reports.
  • Extensive experience in analog/RF related circuit layout, including LNA/PA/PLLs and etc.
  • High level of proficiency in CADENCE or MENTOR GRAPHICS layout tools.
  • Good communication skills with design leads as well as engineers for schedule planning.
  • Being able to lead a small group of layout engineers to deliver a successful tapeout.
  • Programming knowledge in SKILL, Perl, and/or Python is a bonus.
  • You re inclusive, adapting your style to the situation and diverse global norms of our people.
  • An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
  • You re collaborative, building relationships, humbly offering support and openly welcoming approaches.
  • Innovative and creative, you proactively explore new ideas and adapt quickly to change.

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