Design Engineer III
Sunnyvale, CA · On-site
Design Engineer III Job Id: 56823-1 Location: Sunnyvale, CA Qualifications • BS in EE or ... Knowledge of multilayer PCB layout, fabrication and assembly techniques including blind/buried vias ...
Sunnyvale, CA · On-site
Design Engineer III Job Id: 56823-1 Location: Sunnyvale, CA Qualifications • BS in EE or ... Knowledge of multilayer PCB layout, fabrication and assembly techniques including blind/buried vias ...
Sunnyvale, CA · On-site
Design Engineer III Job Id: 56823-1 Location: Sunnyvale, CA Qualifications • BS in EE or ... Knowledge of multilayer PCB layout, fabrication and assembly techniques including blind/buried vias ...
Santa Clara, CA · On-site
$110K - $140K/yr
Description We are looking for qualified Analog design engineers who have a good understanding of ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
Santa Clara, CA · On-site
$110K - $140K/yr
Description We are looking for qualified Analog design engineers who have a good understanding of ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
$110K - $140K/yr
We are looking for qualified Analog design engineers who have a good understanding of analog ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
$110K - $140K/yr
We are looking for qualified Analog design engineers who have a good understanding of analog ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
Santa Clara, CA · On-site
$110K - $140K/yr
We are looking for qualified Analog design engineers who have a good understanding of analog ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
Santa Clara, CA · On-site
$110K - $140K/yr
We are looking for qualified Analog design engineers who have a good understanding of analog ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
We are looking for qualified Analog design engineers who have a good understanding of analog ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
Quick apply
We are looking for qualified Analog design engineers who have a good understanding of analog ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
Irvine, CA · On-site
$110K - $150K/yr
Description We are looking for Image Sensor Analog Design Engineer for design and development of ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
Irvine, CA · On-site
$110K - $150K/yr
Description We are looking for Image Sensor Analog Design Engineer for design and development of ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
We are looking for Image Sensor Analog Design Engineer for design and development of next ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
Quick apply
We are looking for Image Sensor Analog Design Engineer for design and development of next ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
$110K - $150K/yr
We are looking for Image Sensor Analog Design Engineer for design and development of next ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
$110K - $150K/yr
We are looking for Image Sensor Analog Design Engineer for design and development of next ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
$110K - $150K/yr
We are looking forImage Sensor Analog Design Engineer for design and development of next generation ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
$110K - $150K/yr
We are looking forImage Sensor Analog Design Engineer for design and development of next generation ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
Electrical Design Engineer Location: Oakland, CA Duration: 2+ years Onsite: Yes Must Have ... Cable Routing, Cable layout design, Background in Rail/Solar/Oil & Gas Only Key Skills ...
Quick apply
Electrical Design Engineer Location: Oakland, CA Duration: 2+ years Onsite: Yes Must Have ... Cable Routing, Cable layout design, Background in Rail/Solar/Oil & Gas Only Key Skills ...
We are looking for qualified Analog circuit design engineers who have a good understanding of ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
Quick apply
We are looking for qualified Analog circuit design engineers who have a good understanding of ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
Advanced Package Design Engineer Office Location: San Jose, CA Work Model: Onsite About SK hynix ... Create and maintain layout design rules, stack-ups, and layout guidelines * Collaborate with ...
Advanced Package Design Engineer Office Location: San Jose, CA Work Model: Onsite About SK hynix ... Create and maintain layout design rules, stack-ups, and layout guidelines * Collaborate with ...
Are you a Mask Layout Design Engineer? We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and multifaceted group of diverse individuals responsible for ...
Are you a Mask Layout Design Engineer? We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and multifaceted group of diverse individuals responsible for ...
Santa Clara, CA · On-site
$130K - $150K/yr
We are looking for qualified Analog circuit design engineers who have a good understanding of ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
Santa Clara, CA · On-site
$130K - $150K/yr
We are looking for qualified Analog circuit design engineers who have a good understanding of ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
Santa Clara, CA · On-site
$130K - $150K/yr
Perform the block level and transistor level layout design and optimization of sensor array readout ... Collaborate with verification, process, test, and application engineers to debug, characterize and ...
Santa Clara, CA · On-site
$130K - $150K/yr
Perform the block level and transistor level layout design and optimization of sensor array readout ... Collaborate with verification, process, test, and application engineers to debug, characterize and ...
Are you a Mask Layout Design Engineer? We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and multifaceted group of diverse individuals responsible for ...
Are you a Mask Layout Design Engineer? We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and multifaceted group of diverse individuals responsible for ...
$130K - $150K/yr
We are looking for qualified Analog circuit design engineers who have a good understanding of ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
$130K - $150K/yr
We are looking for qualified Analog circuit design engineers who have a good understanding of ... Perform the block level and transistor level layout design and optimization of sensor array readout ...
San Jose, CA · On-site
$110K - $155K/yr
Advanced Package Design Engineer Office Location: San Jose, CA Work Model: Onsite About SK hynix ... Create and maintain layout design rules, stack-ups, and layout guidelines * Collaborate with ...
San Jose, CA · On-site
$110K - $155K/yr
Advanced Package Design Engineer Office Location: San Jose, CA Work Model: Onsite About SK hynix ... Create and maintain layout design rules, stack-ups, and layout guidelines * Collaborate with ...
Electrical Design Engineer Location: Oakland, CA Duration: 2+ years Visa: Any Visa / TN accepted ... Cable Routing, Cable layout design, Background in Rail/Solar/Oil & Gas Only Key Skills ...
Quick apply
Electrical Design Engineer Location: Oakland, CA Duration: 2+ years Visa: Any Visa / TN accepted ... Cable Routing, Cable layout design, Background in Rail/Solar/Oil & Gas Only Key Skills ...
Sunnyvale, CA · On-site
Core Engineering - Design Engineer V PCB Layout Engineer, AR Product Team As a PCB Layout Engineer on Meta's AR Product Team, you will be responsible for driving world-class, complex PCB layouts that ...
Sunnyvale, CA · On-site
Core Engineering - Design Engineer V PCB Layout Engineer, AR Product Team As a PCB Layout Engineer on Meta's AR Product Team, you will be responsible for driving world-class, complex PCB layouts that ...
$44.4K - $57K
4% of jobs
$57K - $69.6K
2% of jobs
$69.6K - $82.2K
12% of jobs
$92.5K is the 25th percentile. Wages below this are outliers.
$82.2K - $94.8K
9% of jobs
$94.8K - $107.4K
11% of jobs
The median wage is $119.1K / yr.
$107.4K - $120K
14% of jobs
$120K - $132.6K
22% of jobs
$135K is the 75th percentile. Wages above this are outliers.
$132.6K - $145.3K
9% of jobs
$145.3K - $157.9K
9% of jobs
$157.9K - $170.5K
3% of jobs
$170.5K - $183.1K
6% of jobs
$44.4K
$119.3K
$183.1K
A Layout Design Engineer is responsible for designing and optimizing the physical layout of integrated circuits (ICs) in semiconductor chips. They work closely with circuit designers to ensure that the layout meets performance, power, and area constraints while adhering to manufacturing and design rules. Their role involves using EDA tools for placement, routing, and verification of chip layouts. They also conduct design rule checks (DRC) and layout versus schematic (LVS) verification to ensure design accuracy.
To thrive as a Layout Design Engineer, you need strong skills in electronic circuit design, physical layout principles, and a background in electrical or electronics engineering, typically supported by a relevant bachelor's degree. Proficiency with EDA tools such as Cadence, Mentor Graphics, or Synopsys, and knowledge of industry standards (e.g., IPC) are essential. Exceptional attention to detail, problem-solving, and effective teamwork and communication skills help set candidates apart. These capabilities ensure precise, manufacturable layouts and smooth collaboration with multidisciplinary teams to meet project goals and deadlines.
A typical day for a Layout Design Engineer involves translating schematic designs into detailed physical layouts using specialized CAD tools, collaborating closely with circuit designers to optimize for performance and manufacturability. You may spend time reviewing design rule checks (DRC), participating in team meetings to discuss project progress or resolve technical challenges, and coordinating with fabrication or test engineers to ensure successful implementation. The role requires both independent focus and frequent teamwork, offering a dynamic mix of technical and collaborative tasks. Depending on the company, you might also be involved in process improvement initiatives or mentoring junior engineers as you gain experience.
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It services
1 - 10 Employees
Omaha, NE, US
2014