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Chip Design Engineer Jobs (NOW HIRING)

Eridu AI

ASIC Chip Design Lead

Saratoga, CA · On-site

$250K - $280K/yr

The company is in execution mode and has a world-class engineering team with decades of experience ... Position Overview We are seeking a hands-on ASIC Chip Design Lead to own chip design execution from ...

ServerLogic

Senior ASIC Design Engineer

Beaverton, OR · On-site

Sr/ ASIC Design Engineer (5+ Years of Experience) DESCRIPTION OF POSITION/DUTIES - * Architect a ... Collaborate with other team members to integrate the block with the full chip * Use Verilog to ...

OMNIVISION

SoC Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor ... Perform chip bring-up, validation and debugging. Design, integrate and validate data pipeline ...

OMNIVISION

SoC Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor ... Perform chip bring-up, validation and debugging. Design, integrate and validate data pipeline ...

OMNIVISION

SoC Design Engineer

Santa Clara, CA · On-site

SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor ... Perform chip bring-up, validation and debugging. Design, integrate and validate data pipeline ...

Apple

CAD Engineer - Signoff Infrastructure

Austin, TX · On-site

We're seeking a CAD Engineer to join our team and develop full-stack web applications that power ... Signoff is the critical final verification stage in chip design where designs are validated against ...

Apple

CAD Engineer - Signoff Infrastructure

Austin, TX · On-site

We're seeking a CAD Engineer to join our team and develop full-stack web applications that power ... Signoff is the critical final verification stage in chip design where designs are validated against ...

Pied Piper

Semiconductor Chip Expert

Austin, TX

Semiconductor Chip ExpertLocation: Austin, TX, United States We are seeking a highly skilled ... Bachelor's degree in Engineering or related field * Expertise in software and hardware design

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Chip Design Engineer information

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$40.5K

$88.2K

$158.5K

How much do chip design engineer jobs pay per year?

As of Jul 26, 2026, the average yearly pay for chip design engineer in the United States is $88,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $68,000.00 and $98,500.00 per year, depending on experience, location, and employer.

Are chip designers in demand?

Chip design engineers are in high demand due to the growth of semiconductor technology, consumer electronics, and data centers. Skills in VHDL, Verilog, and CAD tools are valuable, and the industry offers competitive salaries with opportunities for advancement.

What is the salary of microchip design engineer?

The salary of a chip design engineer typically ranges from $80,000 to $150,000 annually, depending on experience, location, and company size. Entry-level positions may start lower, while experienced engineers with specialized skills in VHDL, Verilog, or FPGA design can earn higher salaries.

What engineer makes $500,000 a year?

A senior chip design engineer with extensive experience, specialized skills in advanced semiconductor technologies, and leadership responsibilities can earn $500,000 or more annually. Such roles often require advanced degrees, certifications, and a track record of successful project delivery in high-demand industries like semiconductor manufacturing or technology firms.

What are some typical projects or daily tasks for a Chip Design Engineer?

As a Chip Design Engineer, your daily tasks often include designing and simulating integrated circuits, reviewing schematics, writing and verifying code in hardware description languages, and collaborating closely with layout engineers and verification teams. You may also participate in design reviews, troubleshoot potential issues, and optimize chip performance to meet specific requirements. Working with cross-functional teams, including software engineers and product managers, is common to ensure the chip integrates seamlessly with end products. This role provides opportunities to see your designs progress from concept to final manufacturing, offering valuable hands-on experience at each stage of development.

What are the key skills and qualifications needed to thrive in the Chip Design Engineer position, and why are they important?

To thrive as a Chip Design Engineer, you need a solid background in electrical engineering, digital and analog circuit design, and experience with VLSI principles, usually backed by a relevant degree. Proficiency with industry-standard tools like Cadence, Synopsys, and experience in HDL languages (such as Verilog or VHDL) is highly valued, as are certifications like Certified IC Designer. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help set you apart. These competencies are critical for developing reliable, high-performance chips in a collaborative and deadline-driven environment.

What is a Chip Design Engineer job?

A Chip Design Engineer is responsible for designing and developing integrated circuits (ICs) used in electronic devices. They work with hardware description languages (HDLs) like Verilog or VHDL to create digital or analog circuit designs. Their role includes logic design, verification, simulation, and testing to ensure performance and power efficiency. They collaborate with teams across hardware, software, and manufacturing to bring chips from concept to production. Chip Design Engineers are essential in industries like consumer electronics, automotive, and telecommunications.

How much do chip design engineers make?

Chip design engineers typically earn a median annual salary ranging from $80,000 to $130,000, depending on experience, location, and industry. Senior engineers with specialized skills in VLSI design or FPGA development can earn higher salaries, often exceeding $150,000 annually.
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What cities are hiring for Chip Design Engineer jobs? Cities with the most Chip Design Engineer job openings:
What states have the most Chip Design Engineer jobs? States with the most job openings for Chip Design Engineer jobs include:
What job categories do people searching Chip Design Engineer jobs look for? The top searched job categories for Chip Design Engineer jobs are:
Chip Design Engineer jobs near you
Infographic showing various Chip Design Engineer job openings in the United States as of July 2026, with employment types broken down into 6% Internship, 71% Full Time, 6% Part Time, 6% Temporary, and 11% Contract. Highlights an 83% In-person, and 17% Remote job distribution, with an average salary of $88,150 per year, or $42.4 per hour.

ASIC Chip Design Lead

Eridu AI

Saratoga, CA • On-site

$250K - $280K/yr

Full-time

Posted 23 days ago

Job description

About Eridu
Eridu is a Silicon Valley-based hardware startup pioneering infrastructure solutions that accelerate AI data centers to deliver Faster AI. Today's AI performance is frequently limited by communication bottlenecks. Eridu introduces multiple industry-first innovations across silicon, packaging, software, and systems to deliver an order of magnitude improvement in performance and unlock greater GPU utilization to speed training job completion times and tokens-per-second for more profitable inference. We do this while simultaneously reducing capital and power costs and improving reliability.
The company's solutions and value proposition have been widely validated by leading hyperscalers.
Eridu has raised over $200M to date including its most recent, oversubscribed Series A round. The company is led by a veteran team of Silicon Valley executives who have delivered multiple billion dollar product lines and led multiple companies to billion dollar exits, including serial entrepreneur Drew Perkins, co-founder of Infinera (NASDAQ: INFN), Lightera (acq. by Ciena), Gainspeed (acq. by Nokia) and Mojo Vision (the world's leading micro-LED company). The company is in execution mode and has a world-class engineering team with decades of experience in state-of-the-art silicon, packaging, optics, software, and systems. Eridu is working with best-in-class supply chain partners including silicon, packaging and systems.
Visit our website eridu.ai to learn more.
Position Overview
We are seeking a hands-on ASIC Chip Design Lead to own chip design execution from micro-architecture through full-chip integration and timing signoff. This role sits between senior individual contributor and technical lead: you will personally drive RTL and micro-architecture while providing execution leadership across design, verification, and physical design teams.
This is a highly technical, roll-up-your-sleeves role for someone who has taken chips to tape-out, understands what breaks late in the cycle, and knows how to drive designs to closure in a fast-paced startup environment.
Responsibilities
Hands-on RTL Development
  • Write, review, and debug production-quality RTL in Verilog/SystemVerilog
  • Own RTL blocks end-to-end from specification through signoff
  • Make timing-, area-, and power-aware design decisions at the RTL and micro-architecture levels
  • Perform detailed code reviews and set a high technical bar for RTL quality
Micro-Architecture Specification
  • Draft detailed micro-architecture specifications derived from architecture documents and feature requirements
  • Translate high-level requirements into implementable pipelines, control logic, datapaths, interfaces, and corner-case handling
  • Clearly define performance, latency, and resource tradeoffs to unblock RTL and verification execution
Physical-Design-Aware Design & Timing Closure
  • Work closely with Physical Design to improve synthesis and place-and-route timing.
  • Iterate on RTL, hierarchy, micro-architecture, and floorplanning to address timing, congestion, and QoR issues
  • Analyze synthesis and P&R reports and proactively drive timing, area, and power improvements
Verification Collaboration & Debug
  • Partner with Design Verification to debug functional and performance issues
  • Review functional and code coverage and provide actionable feedback
  • Own bugs from discovery through fix, validation, and closure
Full-Chip Integration & Signoff
  • Own full-chip RTL integration and block roll-up
  • Run chip-level synthesis, define constraints, and close chip-level timing
  • Deliver timing-clean netlists to Physical Design that meet performance targets
Execution Discipline & Technical Leadership
  • Drive block- and chip-level design checklists as execution quality gates
  • Review checklist status with designers and proactively push closure of open items
  • Continuously refine design methodologies, checklists, and flows based on silicon learnings
  • Lead by technical authority and hands-on execution rather than coordination alone

Qualifications
  • Strong hands-on experience with RTL design and micro-architecture
  • Proven experience with full-chip integration and timing closure
  • Led at least one full-chip tape-out within the last 3 years, with direct responsibility for design signoff and PD handoff
  • Deep understanding of synthesis, static timing analysis, and physical-design collaboration
  • Experience refactoring and restructuring RTL to resolve timing, area, and congestion challenges
  • Comfortable working cross-functionally with architecture, verification, firmware, and physical design teams
  • Demonstrated ability to drive execution in ambiguous, fast-moving environments

Nice to Have
  • Silicon bring-up experience, including post-silicon debug and RTL-to-silicon correlation
  • Hands-on experience defining and refining SDC constraints and improving post-layout timing
  • Knowledge of high-performance networking architectures and Ethernet-based systems
  • Familiarity with Ultra Ethernet and/or UCIe chip-to-chip interconnect protocols
  • Experience with chiplet-based system design

Why Join Us?
At Eridu, you'll have the opportunity to shape the future of AI infrastructure, working with a world-class team on groundbreaking technology that pushes the boundaries of AI performance. Your contributions will directly impact the next generation of AI infrastructure solutions, transforming the performance of AI data centers.
The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles.
Notice to Recruiting Agencies
Eridu does not accept unsolicited resumes or candidate profiles from staffing agencies or third-party recruiters. Any candidate submitted to Eridu without prior written authorization from our recruiting team will be considered unsolicited and will become the property of Eridu. Eridu reserves the right to pursue and hire such candidates without any obligation to pay fees. Recruiting agencies are expressly instructed not to contact hiring managers, employees, or executives regarding open positions.
The pay range for this role is:
250,000 - 280,000 USD per year (Saratoga, CA)

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