Cognichip is seeking a Scientist AI & Chip Design Engineer to work at the intersection of AI/ML and chip design. The role involves building systems to enhance chip design workflows, including data ...
Cognichip is seeking a Scientist AI & Chip Design Engineer to work at the intersection of AI/ML and chip design. The role involves building systems to enhance chip design workflows, including data ...
ASIC Chip Design Lead
Saratoga, CA · On-site
$250K - $280K/yr
The company is in execution mode and has a world-class engineering team with decades of experience ... Position Overview We are seeking a hands-on ASIC Chip Design Lead to own chip design execution from ...
ASIC Chip Design Lead
Saratoga, CA · On-site
$250K - $280K/yr
The company is in execution mode and has a world-class engineering team with decades of experience ... Position Overview We are seeking a hands-on ASIC Chip Design Lead to own chip design execution from ...
Senior ASIC Design Engineer
Beaverton, OR · On-site
Sr/ ASIC Design Engineer (5+ Years of Experience) DESCRIPTION OF POSITION/DUTIES - * Architect a ... Collaborate with other team members to integrate the block with the full chip * Use Verilog to ...
Senior ASIC Design Engineer
Beaverton, OR · On-site
Sr/ ASIC Design Engineer (5+ Years of Experience) DESCRIPTION OF POSITION/DUTIES - * Architect a ... Collaborate with other team members to integrate the block with the full chip * Use Verilog to ...
Senior QPU Design Engineer
Bothell, WA · On-site
$126K - $240K/yr
Guiding the end to end chip design process, from requirements to layout and tape-out ... A degree in engineering, electronics or science, or equivalent industry experience in a technical ...
Senior QPU Design Engineer
Bothell, WA · On-site
$126K - $240K/yr
Guiding the end to end chip design process, from requirements to layout and tape-out ... A degree in engineering, electronics or science, or equivalent industry experience in a technical ...
SoC Design Engineer
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor ... Perform chip bring-up, validation and debugging. Design, integrate and validate data pipeline ...
SoC Design Engineer
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor ... Perform chip bring-up, validation and debugging. Design, integrate and validate data pipeline ...
As a software engineer, you will craft highly efficient software to automate and facilitate chip design and verification processes. What You'll be Doing: * Work as a team to build reliable, scalable ...
As a software engineer, you will craft highly efficient software to automate and facilitate chip design and verification processes. What You'll be Doing: * Work as a team to build reliable, scalable ...
SoC Design Engineer
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor ... Perform chip bring-up, validation and debugging. Design, integrate and validate data pipeline ...
SoC Design Engineer
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor ... Perform chip bring-up, validation and debugging. Design, integrate and validate data pipeline ...
Senior QPU Design Engineer
Bothell, WA · On-site
$126K - $240K/yr
Guiding the end to end chip design process, from requirements to layout and tape-out ... A degree in engineering, electronics or science, or equivalent industry experience in a technical ...
Senior QPU Design Engineer
Bothell, WA · On-site
$126K - $240K/yr
Guiding the end to end chip design process, from requirements to layout and tape-out ... A degree in engineering, electronics or science, or equivalent industry experience in a technical ...
As a software engineer, you will craft highly efficient software to automate and facilitate chip design and verification processes. What You'll be Doing: * Work as a team to build reliable, scalable ...
As a software engineer, you will craft highly efficient software to automate and facilitate chip design and verification processes. What You'll be Doing: * Work as a team to build reliable, scalable ...
As a software engineer, you will craft highly efficient software to automate and facilitate chip design and verification processes. What You'll be Doing: * Work as a team to build reliable, scalable ...
As a software engineer, you will craft highly efficient software to automate and facilitate chip design and verification processes. What You'll be Doing: * Work as a team to build reliable, scalable ...
Senior QPU Design Engineer
Bothell, WA · On-site
$126K - $240K/yr
Guiding the end to end chip design process, from requirements to layout and tape-out ... A degree in engineering, electronics or science, or equivalent industry experience in a technical ...
Quick apply
Senior QPU Design Engineer
Bothell, WA · On-site
$126K - $240K/yr
Guiding the end to end chip design process, from requirements to layout and tape-out ... A degree in engineering, electronics or science, or equivalent industry experience in a technical ...
SoC Design Engineer
Santa Clara, CA · On-site
SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor ... Perform chip bring-up, validation and debugging. Design, integrate and validate data pipeline ...
Quick apply
SoC Design Engineer
Santa Clara, CA · On-site
SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor ... Perform chip bring-up, validation and debugging. Design, integrate and validate data pipeline ...
As a software engineer, you will craft highly efficient software to automate and facilitate chip design and verification processes. What You'll be Doing: * Work as a team to build reliable, scalable ...
As a software engineer, you will craft highly efficient software to automate and facilitate chip design and verification processes. What You'll be Doing: * Work as a team to build reliable, scalable ...
We're seeking a CAD Engineer to join our team and develop full-stack web applications that power ... Signoff is the critical final verification stage in chip design where designs are validated against ...
We're seeking a CAD Engineer to join our team and develop full-stack web applications that power ... Signoff is the critical final verification stage in chip design where designs are validated against ...
As a software engineer, you will craft highly efficient software to automate and facilitate chip design and verification processes. What You'll be Doing: * Work as a team to build reliable, scalable ...
As a software engineer, you will craft highly efficient software to automate and facilitate chip design and verification processes. What You'll be Doing: * Work as a team to build reliable, scalable ...
SoC Design Engineer
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor ... Perform chip bring-up, validation and debugging. Design, integrate and validate data pipeline ...
SoC Design Engineer
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor ... Perform chip bring-up, validation and debugging. Design, integrate and validate data pipeline ...
We're seeking a CAD Engineer to join our team and develop full-stack web applications that power ... Signoff is the critical final verification stage in chip design where designs are validated against ...
We're seeking a CAD Engineer to join our team and develop full-stack web applications that power ... Signoff is the critical final verification stage in chip design where designs are validated against ...
Principal Physical Design Engineer
Sunnyvale, CA · On-site
$159K - $164K/yr
Principal Physical Design Engineer This role has been designed as 'Hybrid' with an expectation that ... Develop the chip-level clock network and clock stations in collaboration with clock experts.
Principal Physical Design Engineer
Sunnyvale, CA · On-site
$159K - $164K/yr
Principal Physical Design Engineer This role has been designed as 'Hybrid' with an expectation that ... Develop the chip-level clock network and clock stations in collaboration with clock experts.
Principal Physical Design Engineer
Sunnyvale, CA · Hybrid
$159K - $164K/yr
Principal Physical Design Engineer This role has been designed as 'Hybrid' with an expectation that ... Develop the chip-level clock network and clock stations in collaboration with clock experts.
Principal Physical Design Engineer
Sunnyvale, CA · Hybrid
$159K - $164K/yr
Principal Physical Design Engineer This role has been designed as 'Hybrid' with an expectation that ... Develop the chip-level clock network and clock stations in collaboration with clock experts.
Principal Physical Design Engineer
Sunnyvale, CA · Hybrid
$159K - $164K/yr
Principal Physical Design Engineer This role has been designed as 'Hybrid' with an expectation that ... Develop the chip-level clock network and clock stations in collaboration with clock experts.
Principal Physical Design Engineer
Sunnyvale, CA · Hybrid
$159K - $164K/yr
Principal Physical Design Engineer This role has been designed as 'Hybrid' with an expectation that ... Develop the chip-level clock network and clock stations in collaboration with clock experts.
Chip Design Engineer information
See salary details
$40.5K - $51.2K
2% of jobs
$51.2K - $62K
11% of jobs
$67.7K is the 25th percentile. Wages below this are outliers.
$62K - $72.7K
23% of jobs
The median wage is $79.6K / yr.
$72.7K - $83.4K
22% of jobs
$83.4K - $94.1K
17% of jobs
$94.4K is the 75th percentile. Wages above this are outliers.
$94.1K - $104.9K
9% of jobs
$104.9K - $115.6K
6% of jobs
$115.6K - $126.3K
3% of jobs
$126.3K - $137K
3% of jobs
$137K - $147.8K
2% of jobs
$147.8K - $158.5K
1% of jobs
$40.5K
$88.2K
$158.5K
How much do chip design engineer jobs pay per year?
As of Jun 12, 2026, the average yearly pay for chip design engineer in the United States is $88,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $68,000.00 and $98,500.00 per year, depending on experience, location, and employer.
What are some typical projects or daily tasks for a Chip Design Engineer?
As a Chip Design Engineer, your daily tasks often include designing and simulating integrated circuits, reviewing schematics, writing and verifying code in hardware description languages, and collaborating closely with layout engineers and verification teams. You may also participate in design reviews, troubleshoot potential issues, and optimize chip performance to meet specific requirements. Working with cross-functional teams, including software engineers and product managers, is common to ensure the chip integrates seamlessly with end products. This role provides opportunities to see your designs progress from concept to final manufacturing, offering valuable hands-on experience at each stage of development.
What are the key skills and qualifications needed to thrive in the Chip Design Engineer position, and why are they important?
To thrive as a Chip Design Engineer, you need a solid background in electrical engineering, digital and analog circuit design, and experience with VLSI principles, usually backed by a relevant degree. Proficiency with industry-standard tools like Cadence, Synopsys, and experience in HDL languages (such as Verilog or VHDL) is highly valued, as are certifications like Certified IC Designer. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help set you apart. These competencies are critical for developing reliable, high-performance chips in a collaborative and deadline-driven environment.
What is a Chip Design Engineer job?
A Chip Design Engineer is responsible for designing and developing integrated circuits (ICs) used in electronic devices. They work with hardware description languages (HDLs) like Verilog or VHDL to create digital or analog circuit designs. Their role includes logic design, verification, simulation, and testing to ensure performance and power efficiency. They collaborate with teams across hardware, software, and manufacturing to bring chips from concept to production. Chip Design Engineers are essential in industries like consumer electronics, automotive, and telecommunications.
More about Chip Design Engineer jobs
What cities are hiring for Chip Design Engineer jobs? Cities with the most Chip Design Engineer job openings:
What states have the most Chip Design Engineer jobs? States with the most job openings for Chip Design Engineer jobs include:
What job categories do people searching Chip Design Engineer jobs look for? The top searched job categories for Chip Design Engineer jobs are:
Full-time
Posted 9 days ago
Job description
Job Summary:
Cognichip is seeking a Scientist AI & Chip Design Engineer to work at the intersection of AI/ML and chip design. The role involves building systems to enhance chip design workflows, including data generation and ML model training, while collaborating with engineers across different domains.
Responsibilities:
• Build and iterate on data generation (including synthetic data) for chip-design tasks
• Train ML models
• Design robust evaluation methodology
• Integrate with hardware workflows
• Collaborate closely with engineers across AI + hardware + software, and own projects end-to-end
Qualifications:
Required:
• Baseline knowledge in both AI/ML and chip design
• Familiarity with deep learning + data/model development
• Basic understanding of circuit design and SystemVerilog implementations
• Deep strength in at least one of: Data pipelines / data engineering, Reinforcement learning (RL), UVM, Formal verification, SystemVerilog (advanced)
• Collaborative, take initiative, and can lead when needed
• Shown you can do exceptional work
• Built a product or system that people used
• Made major contributions to a respected codebase / repo
• Done meaningful work in a high-performing environment (such as top companies)
• Shipped a standout project end-to-end
• Strong publications—or similarly rigorous proof of ability
• Demonstrated ability to execute at a very high level
Company:
Cognichip is an AI-first deep tech company focused on transforming the semiconductor industry by revolutionizing how chips are designed. Founded in 2024, the company is headquartered in Redwood City, USA, with a team of 51-200 employees. The company is currently Growth Stage.
Cognichip is seeking a Scientist AI & Chip Design Engineer to work at the intersection of AI/ML and chip design. The role involves building systems to enhance chip design workflows, including data generation and ML model training, while collaborating with engineers across different domains.
Responsibilities:
• Build and iterate on data generation (including synthetic data) for chip-design tasks
• Train ML models
• Design robust evaluation methodology
• Integrate with hardware workflows
• Collaborate closely with engineers across AI + hardware + software, and own projects end-to-end
Qualifications:
Required:
• Baseline knowledge in both AI/ML and chip design
• Familiarity with deep learning + data/model development
• Basic understanding of circuit design and SystemVerilog implementations
• Deep strength in at least one of: Data pipelines / data engineering, Reinforcement learning (RL), UVM, Formal verification, SystemVerilog (advanced)
• Collaborative, take initiative, and can lead when needed
• Shown you can do exceptional work
• Built a product or system that people used
• Made major contributions to a respected codebase / repo
• Done meaningful work in a high-performing environment (such as top companies)
• Shipped a standout project end-to-end
• Strong publications—or similarly rigorous proof of ability
• Demonstrated ability to execute at a very high level
Company:
Cognichip is an AI-first deep tech company focused on transforming the semiconductor industry by revolutionizing how chips are designed. Founded in 2024, the company is headquartered in Redwood City, USA, with a team of 51-200 employees. The company is currently Growth Stage.