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Chip Design Engineer Jobs in Minneapolis, MN (NOW HIRING)

Faculty Positions

Minneapolis, MN ยท On-site

$110K - $130K/yr

Computer Engineering: Expertise in chip design and verification, design automation, computer architecture, and emerging computing platforms is of particular interest, including the fields of AI/ML ...

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Chip Design Engineer information

See Minneapolis, MN salary details

$42.3K

$92K

$165.4K

How much do chip design engineer jobs pay per year?

As of Aug 30, 2026, the average yearly pay for chip design engineer in Minneapolis, MN is $92,012.00, according to ZipRecruiter salary data. Most workers in this role earn between $71,000.00 and $102,800.00 per year, depending on experience, location, and employer.

What is a chip design engineer?

A Chip Design Engineer is responsible for designing and developing integrated circuits (ICs) used in electronic devices. They work with hardware description languages (HDLs) like Verilog or VHDL to create digital or analog circuit designs. Their role includes logic design, verification, simulation, and testing to ensure performance and power efficiency. They collaborate with teams across hardware, software, and manufacturing to bring chips from concept to production. Chip Design Engineers are essential in industries like consumer electronics, automotive, and telecommunications.

What are some typical projects or daily tasks for a chip design engineer?

As a Chip Design Engineer, your daily tasks often include designing and simulating integrated circuits, reviewing schematics, writing and verifying code in hardware description languages, and collaborating closely with layout engineers and verification teams. You may also participate in design reviews, troubleshoot potential issues, and optimize chip performance to meet specific requirements. Working with cross-functional teams, including software engineers and product managers, is common to ensure the chip integrates seamlessly with end products. This role provides opportunities to see your designs progress from concept to final manufacturing, offering valuable hands-on experience at each stage of development.

What are the key skills and qualifications needed to thrive as a chip design engineer?

To thrive as a Chip Design Engineer, you need a solid background in electrical engineering, digital and analog circuit design, and experience with VLSI principles, usually backed by a relevant degree. Proficiency with industry-standard tools like Cadence, Synopsys, and experience in HDL languages (such as Verilog or VHDL) is highly valued, as are certifications like Certified IC Designer. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help set you apart. These competencies are critical for developing reliable, high-performance chips in a collaborative and deadline-driven environment.

How much do chip design engineers make?

Chip design engineers typically earn a median annual salary ranging from $90,000 to $130,000, depending on experience, location, and industry. Senior engineers with specialized skills in VLSI design or FPGA development can earn higher salaries, often exceeding $150,000 annually.

What does a chip design engineer do?

A chip design engineer develops and designs integrated circuits and microchips used in electronic devices. They use electronic design automation (EDA) tools, create schematics, simulate circuit performance, and collaborate with manufacturing teams to ensure the chips meet specifications and quality standards.

What is the salary of chip design engineer?

The average salary of a chip design engineer varies by experience and location but typically ranges from $80,000 to $150,000 annually. Senior engineers with specialized skills in VLSI design and FPGA development can earn higher salaries, often exceeding $180,000. Certifications and proficiency in tools like Cadence or Synopsys can also influence compensation.

What are popular job titles related to Chip Design Engineer jobs in Minneapolis, MN?

For Chip Design Engineer jobs in Minneapolis, MN, the most frequently searched job titles are:

What job categories do people searching Chip Design Engineer jobs in Minneapolis, MN look for?

The top searched job categories for Chip Design Engineer jobs in Minneapolis, MN are:

Infographic showing various Chip Design Engineer job openings in Minneapolis, MN as of August 2026, with employment types broken down into 90% Full Time, 5% Contract, and 5% Nights. Highlights an 100% In-person job distribution, with an average salary of $92,020 per year, or $44.2 per hour.

ASIC Chip Lead / Design Engineer

Brooklyn Park, MN โ€ข On-site

Technical Link
IT Servicesย โ€ขย 1 - 10 employees

Other

Posted 4 days ago


Job description

ASIC Chip Lead / Design EngineerJob Description

As an ASIC Chip Lead and Design Engineer, you will play a pivotal role in the development of custom-designed Application-Specific Integrated Circuits (ASICs). Your expertise will span the entire chip design lifecycle, from conceptualization through implementation.

You will collaborate with cross-functional teams to ensure successful chip development while meeting performance, power, and area targets. The ideal candidate is a highly capable, hands-on engineer currently designing complex digital blocks with strong knowledge and experience across the complete ASIC/SoC design flow.

Additional experience with radiation-hardened design, analog/mixed-signal design and EDA, and standard-cell library development is highly desirable.

Additional responsibilities include evaluating customer requirements, estimating effort and expenses for potential new business, and identifying opportunities to improve internal design methodologies.

Essential Duties & ResponsibilitiesChip Architecture & Development
  • Lead the architectural design of ASICs based on high-level requirements and block diagrams.

  • Collaborate with system architects to define chip functionality, interfaces, and performance targets.

  • Develop detailed specifications for chip components.

RTL Design & Synthesis
  • Use Synopsys Design Compiler to create and synthesize RTL designs.

  • Optimize RTL code for area, power, and performance.

  • Implement and verify complex digital blocks.

Constraint Development
  • Develop timing constraints for the entire chip.

  • Work closely with physical design teams to ensure successful place-and-route.

RISC Processor Conformance
  • Constrain and verify RISC processors within the chip.

  • Optimize processor performance and power efficiency.

Physical Design Collaboration
  • Collaborate with physical design teams on floorplanning, placement, and routing.

  • Address design closure issues throughout the development process.

Verification Support
  • Work with verification engineers to ensure functional correctness.

  • Assist with testbench development and verification of chip functionality.

Development Environment
  • Utilize modern revision-control tools and best practices within a collaborative, multi-site design environment.

  • Work proficiently within UNIX/Linux environments, including shell scripting and utilities such as sed, awk, and grep.

  • Utilize high-level programming and scripting languages such as C/C++, Perl, Python, and Tcl.

  • Work effectively with standard Windows applications, including Word, Excel, PowerPoint, Visio, and Project.

Qualifications
  • Bachelor''s or Master''s degree in Electrical Engineering, Computer Science, or a related field.

  • 10+ years of direct industry experience in ASIC and/or SoC design.

  • Strong background in RTL-based digital IC design using Verilog/SystemVerilog.

  • Proficiency with Synopsys Design Compiler and other industry-standard EDA tools.

  • Strong understanding of digital design principles and the complete ASIC/SoC design flow.

  • Familiarity with RISC architectures, such as ARM or MIPS.

  • Proven track record of first-pass silicon success.

  • Excellent problem-solving skills and strong attention to detail.

  • Self-starter with the ability to assume technical leadership responsibilities.

  • Ability to work effectively within diverse, cross-functional engineering teams.

  • Willingness and ability to mentor less experienced engineers.

  • Experience with industry-standard development tools and methodologies.

Preferred Experience
  • Radiation-hardened (rad-hard) ASIC design.

  • Analog/mixed-signal design and EDA flows.

  • Standard-cell library development.