$140K - $156K/yr
... tasks for Ambarella's cutting edgelow powerAISoC from Netlist to GDSII. The Physical Design ... chip level. Requirements * BS/MS in EE/computer scienceor equivalent experience * 3- 5+ years ...
18 Ambarella Chip Design Engineer Jobs Hiring Near You
$140K - $156K/yr
... tasks for Ambarella's cutting edgelow powerAISoC from Netlist to GDSII. The Physical Design ... chip level. Requirements * BS/MS in EE/computer scienceor equivalent experience * 3- 5+ years ...
$195K - $226K/yr
Ambarella is a leading fabless semiconductor company at the forefront of edge AI-based computer ... Participating in chip bring-up and testing. * Analyzing and reviewing code coverage and functional ...
$195K - $226K/yr
Ambarella is a leading fabless semiconductor company at the forefront of edge AI-based computer ... Participating in chip bring-up and testing. * Analyzing and reviewing code coverage and functional ...
Microcode summer intern engineers at Ambarella are responsible for the design, implement and test ... Understand modern computer architecture including registers, interrupts, threads, on-chip memory ...
Microcode summer intern engineers at Ambarella are responsible for the design, implement and test ... Understand modern computer architecture including registers, interrupts, threads, on-chip memory ...
$18 - $23.50/hr
We are looking for talented engineers who possess a strong interest in VLSI design, programming and computer architecture. Ambarella designs complex SoCs which include custom DSP and computer vision ...
$18 - $23.50/hr
We are looking for talented engineers who possess a strong interest in VLSI design, programming and computer architecture. Ambarella designs complex SoCs which include custom DSP and computer vision ...
Ambarella's low-power systems-on-chip (SoCs) integrate proprietary and highly efficient perception ... Partner with engineering, IT, and business stakeholders to track initiative scope, implementation ...
Ambarella's low-power systems-on-chip (SoCs) integrate proprietary and highly efficient perception ... Partner with engineering, IT, and business stakeholders to track initiative scope, implementation ...
$103K - $142K/yr
Ambarella's low-power systems-on-chip (SoCs) integrate proprietary and highly efficient perception ... Oversee the endtoend application lifecycle, including requirements definition, design, development ...
$103K - $142K/yr
Ambarella's low-power systems-on-chip (SoCs) integrate proprietary and highly efficient perception ... Oversee the endtoend application lifecycle, including requirements definition, design, development ...
... design, implementation, and verification using Verilog, System Verilog, and any required programing ... Participating in chip bring-up and testing. Requirements : * Master's degree in Electrical ...
... design, implementation, and verification using Verilog, System Verilog, and any required programing ... Participating in chip bring-up and testing. Requirements : * Master's degree in Electrical ...
We are seeking a Software Engineer to develop and optimize low-level software and microcode for AI ... Develop deep expertise in Ambarella AI SoC and accelerator architecture. * Design, implement, and ...
We are seeking a Software Engineer to develop and optimize low-level software and microcode for AI ... Develop deep expertise in Ambarella AI SoC and accelerator architecture. * Design, implement, and ...
At Ambarella, we are looking for talented team members to help us deliver our advanced computer ... We offer a unique opportunity to push the envelope of algorithm design and collaborate across a ...
At Ambarella, we are looking for talented team members to help us deliver our advanced computer ... We offer a unique opportunity to push the envelope of algorithm design and collaborate across a ...
Algorithm engineer interns at Ambarella are responsible for developing highly efficient algorithms ... Design, train, and optimize Transformer models and variants. * Stay up to date with the latest ...
Algorithm engineer interns at Ambarella are responsible for developing highly efficient algorithms ... Design, train, and optimize Transformer models and variants. * Stay up to date with the latest ...
$135K - $170K/yr
... design, implementation, and verification using Verilog, System Verilog, and any required programing ... Participating in chip bring-up and testing. * Analyzing and reviewing code coverage and functional ...
$135K - $170K/yr
... design, implementation, and verification using Verilog, System Verilog, and any required programing ... Participating in chip bring-up and testing. * Analyzing and reviewing code coverage and functional ...
... of Ambarella chips for embedded Computer Vision application and Intelligent Automotive Control ... Compiler Design and * Implementation; Image Processing; Machine Learning; Embedded Firmware
... of Ambarella chips for embedded Computer Vision application and Intelligent Automotive Control ... Compiler Design and * Implementation; Image Processing; Machine Learning; Embedded Firmware
Ambarella has some exciting internship opportunities for self-motivated and creative students near ... design, image processing, video compression, and computer vision. Architecture interns study ...
Ambarella has some exciting internship opportunities for self-motivated and creative students near ... design, image processing, video compression, and computer vision. Architecture interns study ...
$140K - $150K/yr
Ambarella, a worldwide leader in edge AI semiconductors and software, is on a mission to bring ... Knowledge of Logic design and timing * Knowledge of Verilog and Python * Knowledge of Mentor ...
$140K - $150K/yr
Ambarella, a worldwide leader in edge AI semiconductors and software, is on a mission to bring ... Knowledge of Logic design and timing * Knowledge of Verilog and Python * Knowledge of Mentor ...
$230K - $265K/yr
Edge AI Silicon Product Marketing Director Ambarella (NASDAQ: AMBA) is a leading fabless ... This role will work closely with cross-functional teams, including engineering and sales to ...
$230K - $265K/yr
Edge AI Silicon Product Marketing Director Ambarella (NASDAQ: AMBA) is a leading fabless ... This role will work closely with cross-functional teams, including engineering and sales to ...
Design and testing of low-level control drivers for a variety of peripherals such as converters ... Work with mixed signal and digital design engineers to ensure that interfaces are properly designed
Design and testing of low-level control drivers for a variety of peripherals such as converters ... Work with mixed signal and digital design engineers to ensure that interfaces are properly designed
Logic Design to support DFT features * Automate DFT Flows (Scan, Compression& MBIST) used ... Knowledge of AI assisted programming
Logic Design to support DFT features * Automate DFT Flows (Scan, Compression& MBIST) used ... Knowledge of AI assisted programming
$18 - $23.50/hr
Strong fundamental in analog integrated circuit design * Good knowledge of digital logic design ... D. in electrical engineering * Will also consider summer interns
$18 - $23.50/hr
Strong fundamental in analog integrated circuit design * Good knowledge of digital logic design ... D. in electrical engineering * Will also consider summer interns
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Job description
AI Vision Processors For Edge ApplicationsOur solutions make cameras smarter by extracting valuable data from high-resolution video streams.
Job Description
The Physical Design Engineer willbe an integral part of the physical design team with all aspects of physical design implementation and verification tasks for Ambarella's cutting edgelow powerAISoC from Netlist to GDSII.
The Physical Design Engineer will be responsible for the following areas throughout all phase of SoC implementation process; floor-planning, auto place and route, static timing analysis, eco implementation, signal integrity analysis, EM/IR analysis, formal verification, and physical layout verification (LVS/DRC/DFM) at block and/or full chip level.
Requirements
- BS/MS in EE/computer scienceor equivalent experience
- 3- 5+ years' experience,
- Good understanding in VLSI digital design/Layout/Timing closure
- Basic knowledge on circuit design, device delays, and timing at gate-level
- Familiar with industry EDA tools such as Cadence Innovus/Quantus/Tempus, Synopsys Fusion Compiler/ICC2/StarRC/Primetime and Mentor Calibre.
- Proficient programming and scripting skills (Perl, Python, TCL, C-shell, make)
- Hardware Design Languages like Verilog, VHDL
- Self-motivated team worker, good verbal and written interpersonal skills.
- Experience with Cadence Innovus/Genus/Conformal and Synopsys Primetime/StarRC would be an added advantage.
- Solid understanding of hierarchical physical design strategies, methodologies and nanometer advanced node technology issues.
- Hands-on experience in STA including multi-mode multi-corner analysis and ability to analyze and fix critical timing issues.
- Proven track record of delivering tape-out quality GDSII with silicon success in sub 10 nm is a plus.
The base salary range is $140,000- $156,000. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.The successful candidate will have the opportunity to convert to a full-time regular position. We also offer new-hire RSU grants and the opportunity for annual RSU grants, as well as other highly competitive benefits.
About Ambarella
Sourced by ZipRecruiter
Industry
Semiconductor and electronic component manufacturing
Company size
501 - 1,000 Employees
Headquarters location
Santa Clara, CA, US
Year founded
2004