RF SoC Design Engineer
Tempe, AZ · On-site
RF SoC System Timing Design And Validation Engineer Job Responsibilities ... Help guide chip design for proper system timing and synchronization of the interactions between ...
Tempe, AZ · On-site
RF SoC System Timing Design And Validation Engineer Job Responsibilities ... Help guide chip design for proper system timing and synchronization of the interactions between ...
Tempe, AZ · On-site
RF SoC System Timing Design And Validation Engineer Job Responsibilities ... Help guide chip design for proper system timing and synchronization of the interactions between ...
RF SoC System Timing Design And Validation Engineer Job Responsibilities ... Help guide chip design for proper system timing and synchronization of the interactions between ...
RF SoC System Timing Design And Validation Engineer Job Responsibilities ... Help guide chip design for proper system timing and synchronization of the interactions between ...
Phoenix, AZ · On-site
$135K - $139K/yr
Python Programming Language - * Physical Design Develop & own physical design implementation of ... Exp. in Block-level & Full-chip floor-planning & power grid planning,w/Python, TCL,or Perl progr ...
Phoenix, AZ · On-site
$135K - $139K/yr
Python Programming Language - * Physical Design Develop & own physical design implementation of ... Exp. in Block-level & Full-chip floor-planning & power grid planning,w/Python, TCL,or Perl progr ...
Scottsdale, AZ · On-site
As a Principal Design Engineer located in Scottsdale, Arizona, you will have the opportunity to ... Chip layout experience for protection devices is desirable * Experience with Cadence environment ...
Scottsdale, AZ · On-site
As a Principal Design Engineer located in Scottsdale, Arizona, you will have the opportunity to ... Chip layout experience for protection devices is desirable * Experience with Cadence environment ...
Scottsdale, AZ · On-site
As a Principal Design Engineer located in Scottsdale, Arizona, you will have the opportunity to ... Chip layout experience for protection devices is desirable * Experience with Cadence environment ...
Scottsdale, AZ · On-site
As a Principal Design Engineer located in Scottsdale, Arizona, you will have the opportunity to ... Chip layout experience for protection devices is desirable * Experience with Cadence environment ...
Phoenix, AZ · On-site
$200K/yr
The Hard IP and Test Chip Development team, within Intel's Central Engineering Group, is ... As an Analog Design Engineer at Intel, you will play a pivotal role in developing cutting-edge ...
Phoenix, AZ · On-site
$200K/yr
The Hard IP and Test Chip Development team, within Intel's Central Engineering Group, is ... As an Analog Design Engineer at Intel, you will play a pivotal role in developing cutting-edge ...
The Hard IP and Test Chip Development team, within Intel's Central Engineering Group, is ... As an Analog Design Engineer at Intel, you will play a pivotal role in developing cutting-edge ...
The Hard IP and Test Chip Development team, within Intel's Central Engineering Group, is ... As an Analog Design Engineer at Intel, you will play a pivotal role in developing cutting-edge ...
Chandler, AZ · On-site
$198K/yr
Simulate and verify circuit and chip-level performance using Spectre and mixed-signal methodologies ... Engineering, or related field: * Bachelor's with 2+ years of relevant IC design experience.
Chandler, AZ · On-site
$198K/yr
Simulate and verify circuit and chip-level performance using Spectre and mixed-signal methodologies ... Engineering, or related field: * Bachelor's with 2+ years of relevant IC design experience.
$105K - $200K/yr
Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU required ... chip designs. Participates actively in the definition of architecture and microarchitecture ...
$105K - $200K/yr
Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU required ... chip designs. Participates actively in the definition of architecture and microarchitecture ...
Chandler, AZ · On-site
$133K/yr
In this role, you will contribute to the design of system-on-chip (SoC) devices, digital signal ... Degree in Electrical Engineering, Computer Engineering, or a related technical field. * Bachelor ...
Chandler, AZ · On-site
$133K/yr
In this role, you will contribute to the design of system-on-chip (SoC) devices, digital signal ... Degree in Electrical Engineering, Computer Engineering, or a related technical field. * Bachelor ...
Chandler, AZ · On-site
$198K/yr
Analog Design Engineer Job Responsibility: * Design high-performance analog and mixed-signal ... Translate chip-level requirements(data rate, BER, Jitter budget) into detailed block level ...
Chandler, AZ · On-site
$198K/yr
Analog Design Engineer Job Responsibility: * Design high-performance analog and mixed-signal ... Translate chip-level requirements(data rate, BER, Jitter budget) into detailed block level ...
Chandler, AZ · On-site +1
$200K - $250K/yr
Lead block- and chip-level integration, resolving interface and system issues * Ensure designs are ... engineering, Computer Engineering, or related field * 10+ years of experience in digital design ...
Chandler, AZ · On-site +1
$200K - $250K/yr
Lead block- and chip-level integration, resolving interface and system issues * Ensure designs are ... engineering, Computer Engineering, or related field * 10+ years of experience in digital design ...
Chandler, AZ · On-site
$198K/yr
Analog Design Engineer Job Responsibility: * Design high-performance analog and mixed-signal ... Translate chip-level requirements(data rate, BER, Jitter budget) into detailed block level ...
Chandler, AZ · On-site
$198K/yr
Analog Design Engineer Job Responsibility: * Design high-performance analog and mixed-signal ... Translate chip-level requirements(data rate, BER, Jitter budget) into detailed block level ...
Tempe, AZ · On-site
... Engineer to join our Advanced Silicon Packaging team. In this role, you will design and deliver ... chip modules. * Develop and maintain package CAD databases, ensuring accuracy and adherence to ...
Tempe, AZ · On-site
... Engineer to join our Advanced Silicon Packaging team. In this role, you will design and deliver ... chip modules. * Develop and maintain package CAD databases, ensuring accuracy and adherence to ...
Phoenix, AZ · On-site
$122K - $232K/yr
As a Physical Design Engineer, you will play a pivotal role in bringing Intel's innovative products ... Full chip physical design completion and verification for tapein/tapeout Preferred Qualifications:
Phoenix, AZ · On-site
$122K - $232K/yr
As a Physical Design Engineer, you will play a pivotal role in bringing Intel's innovative products ... Full chip physical design completion and verification for tapein/tapeout Preferred Qualifications:
$122K - $232K/yr
As a Physical Design Engineer, you will play a pivotal role in bringing Intel's innovative products ... Full chip physical design completion and verification for tapein/tapeout Preferred Qualifications:
$122K - $232K/yr
As a Physical Design Engineer, you will play a pivotal role in bringing Intel's innovative products ... Full chip physical design completion and verification for tapein/tapeout Preferred Qualifications:
The Hard IP and Test Chip Development team, within Intel's Central Engineering Group, is ... We are seeking an experienced Senior Analog Design Engineer to join our engineering team. The ...
The Hard IP and Test Chip Development team, within Intel's Central Engineering Group, is ... We are seeking an experienced Senior Analog Design Engineer to join our engineering team. The ...
Phoenix, AZ · On-site
$200K/yr
The Hard IP and Test Chip Development team, within Intel's Central Engineering Group, is ... Key Responsibilities Design and Development • Design and simulate analog and mixed-signal ...
Phoenix, AZ · On-site
$200K/yr
The Hard IP and Test Chip Development team, within Intel's Central Engineering Group, is ... Key Responsibilities Design and Development • Design and simulate analog and mixed-signal ...
Chandler, AZ · On-site
$198K/yr
Simulate and verify circuit and chip-level performance using Spectre and mixed-signal methodologies ... Engineering, or related field: * Bachelor's with 7+ years of relevant IC design experience.
Chandler, AZ · On-site
$198K/yr
Simulate and verify circuit and chip-level performance using Spectre and mixed-signal methodologies ... Engineering, or related field: * Bachelor's with 7+ years of relevant IC design experience.
Chandler, AZ · On-site
$198K/yr
Simulate and verify circuit and chip-level performance using Spectre and mixed-signal methodologies ... Engineering, or related field: * Bachelor's with 5+ years of relevant IC design experience.
Chandler, AZ · On-site
$198K/yr
Simulate and verify circuit and chip-level performance using Spectre and mixed-signal methodologies ... Engineering, or related field: * Bachelor's with 5+ years of relevant IC design experience.
$37.7K - $47.7K
2% of jobs
$47.7K - $57.7K
11% of jobs
$63.1K is the 25th percentile. Wages below this are outliers.
$57.7K - $67.7K
23% of jobs
The median wage is $74.2K / yr.
$67.7K - $77.7K
22% of jobs
$77.7K - $87.7K
17% of jobs
$88K is the 75th percentile. Wages above this are outliers.
$87.7K - $97.7K
9% of jobs
$97.7K - $107.7K
6% of jobs
$107.7K - $117.7K
3% of jobs
$117.7K - $127.7K
3% of jobs
$127.7K - $137.7K
2% of jobs
$137.7K - $147.7K
1% of jobs
$37.7K
$82.1K
$147.7K
As a Chip Design Engineer, your daily tasks often include designing and simulating integrated circuits, reviewing schematics, writing and verifying code in hardware description languages, and collaborating closely with layout engineers and verification teams. You may also participate in design reviews, troubleshoot potential issues, and optimize chip performance to meet specific requirements. Working with cross-functional teams, including software engineers and product managers, is common to ensure the chip integrates seamlessly with end products. This role provides opportunities to see your designs progress from concept to final manufacturing, offering valuable hands-on experience at each stage of development.
To thrive as a Chip Design Engineer, you need a solid background in electrical engineering, digital and analog circuit design, and experience with VLSI principles, usually backed by a relevant degree. Proficiency with industry-standard tools like Cadence, Synopsys, and experience in HDL languages (such as Verilog or VHDL) is highly valued, as are certifications like Certified IC Designer. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help set you apart. These competencies are critical for developing reliable, high-performance chips in a collaborative and deadline-driven environment.
A Chip Design Engineer is responsible for designing and developing integrated circuits (ICs) used in electronic devices. They work with hardware description languages (HDLs) like Verilog or VHDL to create digital or analog circuit designs. Their role includes logic design, verification, simulation, and testing to ensure performance and power efficiency. They collaborate with teams across hardware, software, and manufacturing to bring chips from concept to production. Chip Design Engineers are essential in industries like consumer electronics, automotive, and telecommunications.
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Semiconductor and electronic component manufacturing
11 - 50 Employees
Tempe, AZ, US
2012