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Layout Design Engineer Jobs in Arizona (NOW HIRING)

AVTC Group

PCB Design Engineer

Tucson, AZ · On-site

PCB Design Engineer Location: Tucson, AZ Work Type: Onsite Clearance: U.S. Citizenship required ... This role is responsible for PCB layout, schematic capture, component placement, routing, design ...

Texas Instruments

Layout Designer

Tucson, AZ · On-site

Associate's degree in Engineering or related field of study or program certificate in Advanced IC Mask Layout Design * Minimum of 5 years of experience. Preferred qualifications: * Ability to ...

Texas Instruments

Layout Designer

Tucson, AZ

Associate's degree in Engineering or related field of study or program certificate in Advanced IC Mask Layout Design * Minimum of 5 years of experience. Preferred qualifications: * Ability to ...

Kurita America Inc

Detail Design Engineer

Phoenix, AZ · On-site

$80K - $90K/yr

Uses specialized 3D modeling software to develop Piping layout and BIM coordination at construction site. * Uses specialized 3D modeling software to develop skid drawings to manufacture skids.

United Integrated Services

Design Engineer

Phoenix, AZ · On-site

The Design Engineer will be responsible for designing, developing, and implementing mechanical ... This role involves creating detailed mechanical schematics, equipment schedule, equipment layout ...

Texas Instruments

Layout Designer

Tucson, AZ · On-site

Associate's degree in Engineering or related field of study or program certificate in Advanced IC Mask Layout Design * Minimum of 5 years of experience. Preferred qualifications: * Ability to ...

Texas Instruments

Layout Designer

Tucson, AZ

May check design layouts and detailed drawings Why TI? * Engineer your future. We empower our ... Mask Layout Design * Minimum of 5 years of experience. Preferred qualifications: * Ability to ...

Kurita America Inc.

Detail Design Engineer

Phoenix, AZ

$80K - $90K/yr

Title: Detail Design Engineer Location: Phoenix Travel: N/A Pay: $80,000 to $90000 Note: Visa ... Uses AutoCad to draw process and instrument diagrams and layout drawings by both 2D and 3D for ...

onsemi

Design Engineer

Scottsdale, AZ

As a Principal Design Engineer located in Scottsdale, Arizona, you will have the opportunity to ... Chip layout experience for protection devices is desirable * Experience with Cadence environment ...

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Layout Design Engineer information

See Arizona salary details

$41.9K

$112.6K

$172.9K

How much do layout design engineer jobs pay per year?

As of Jul 19, 2026, the average yearly pay for layout design engineer in Arizona is $112,617.00, according to ZipRecruiter salary data. Most workers in this role earn between $83,900.00 and $134,200.00 per year, depending on experience, location, and employer.

What does a layout design engineer do?

A layout design engineer develops and optimizes integrated circuit layouts to ensure proper functionality, performance, and manufacturability. They use electronic design automation (EDA) tools and work closely with circuit designers to translate schematics into physical layouts, adhering to design rules and specifications. This role often requires knowledge of semiconductor fabrication processes and attention to detail to minimize errors and improve device performance.

What engineers make $300,000 a year?

Senior engineers in specialized fields such as petroleum, aerospace, or software engineering can earn $300,000 or more annually, especially with extensive experience, advanced skills, and leadership roles. High-level positions often require advanced degrees, certifications, and a strong track record of project management or technical expertise.

What engineers make 200,000 a year?

Senior engineers in fields such as software, petroleum, aerospace, and electrical engineering often earn $200,000 or more annually, especially with extensive experience, advanced skills, and relevant certifications. High-level managerial or specialized roles in these disciplines tend to have compensation at or above this level.

What is a Layout Design Engineer job?

A Layout Design Engineer is responsible for designing and optimizing the physical layout of integrated circuits (ICs) in semiconductor chips. They work closely with circuit designers to ensure that the layout meets performance, power, and area constraints while adhering to manufacturing and design rules. Their role involves using EDA tools for placement, routing, and verification of chip layouts. They also conduct design rule checks (DRC) and layout versus schematic (LVS) verification to ensure design accuracy.

What engineer makes $500,000 a year?

A senior or specialized engineer, such as a petroleum engineer, aerospace engineer, or software engineer in high-paying industries, can earn $500,000 or more annually. These roles often require advanced skills, extensive experience, and sometimes leadership or executive responsibilities.

What are the key skills and qualifications needed to thrive in the Layout Design Engineer position, and why are they important?

To thrive as a Layout Design Engineer, you need strong skills in electronic circuit design, physical layout principles, and a background in electrical or electronics engineering, typically supported by a relevant bachelor's degree. Proficiency with EDA tools such as Cadence, Mentor Graphics, or Synopsys, and knowledge of industry standards (e.g., IPC) are essential. Exceptional attention to detail, problem-solving, and effective teamwork and communication skills help set candidates apart. These capabilities ensure precise, manufacturable layouts and smooth collaboration with multidisciplinary teams to meet project goals and deadlines.

What does a typical day look like for a Layout Design Engineer?

A typical day for a Layout Design Engineer involves translating schematic designs into detailed physical layouts using specialized CAD tools, collaborating closely with circuit designers to optimize for performance and manufacturability. You may spend time reviewing design rule checks (DRC), participating in team meetings to discuss project progress or resolve technical challenges, and coordinating with fabrication or test engineers to ensure successful implementation. The role requires both independent focus and frequent teamwork, offering a dynamic mix of technical and collaborative tasks. Depending on the company, you might also be involved in process improvement initiatives or mentoring junior engineers as you gain experience.

What are popular job titles related to Layout Design Engineer jobs in Arizona? For Layout Design Engineer jobs in Arizona, the most frequently searched job titles are:
What job categories do people searching Layout Design Engineer jobs in Arizona look for? The top searched job categories for Layout Design Engineer jobs in Arizona are:
Layout Design Engineer jobs near you
Infographic showing various Layout Design Engineer job openings in Arizona as of July 2026, with employment types broken down into 89% Full Time, 8% Part Time, and 3% Contract. Highlights an 87% Physical, 3% Hybrid, and 10% Remote job distribution, with an average salary of $112,617 per year, or $54.1 per hour.
Principal Layout Designer

Principal Layout Designer

Microchip Technology

Chandler, AZ • On-site

Full-time

Posted 13 days ago

Microchip Technology rating

8.0

Company rating: 8.0 out of 10

Based on 32 frontline employees who took The Breakroom Quiz

47th of 143 rated electronics manufacturers

Job description

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.
People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it's won us countless awards for diversity and workplace excellence.
Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.
Visit our careers page to see what exciting opportunities and company perks await!
Job Description:
The Networking Connectivity Solutions team is looking for a highly skilled Principal Layout Designer that can contribute to the layout and physical verification of high frequency (up to 10Gbps) physical layer interfaces for USB and Ethernet based standards. The candidate should be a self-driven individual who is capable and excited to learn about new technologies. This position is at Microchip Technology Inc. located in Chandler, Arizona.
Job responsibilities and duties include:
  • Block and cell development including floor-planning, layout creation and optimization
  • Perform custom layout design using analog layout techniques
  • Perform physical verification and electromigration check
  • Work directly with Design Engineering to release custom designs to stream out
  • Operate effectively in a team environment while contributing to the team's success
  • Experienced self-driven individual who is capable of working at a high level with minimal direct supervision.

Requirements/Qualifications:
Job requirements are as follows:
  • Education: (Engineering/Technology/Technical School) with 10+ years' experience in custom analog CMOS layout design
  • Experience with Cadence, Pegasus and Calibre EDA tools
  • Knowledge of Advanced CMOS process and Foundry Design rules, including geometries 28nm and below
  • Strong problem-solving skills and significant experience in physical verification
  • Programming skills with Cadence SKILL is preferred, but not required
  • High level of attention to detail
  • Excellent technical, verbal, and interpersonal skills
  • Ability and willingness to work on multiple projects and technologies at any given time

Travel Time:
0% - 25%
Physical Attributes:
Hearing, Seeing, Talking, Works Alone, Works Around Others
Physical Requirements:
90% Sitting, 10% Standing/Walking
Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.
To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

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