Layout Design Intern
Tucson, AZ · On-site
You will support the design engineers to reach goals in precision, speed, area, reliability, power ... Writing layout specifications, checking dimensions, and verifying completed art work * Verifying ...
Tucson, AZ · On-site
You will support the design engineers to reach goals in precision, speed, area, reliability, power ... Writing layout specifications, checking dimensions, and verifying completed art work * Verifying ...
Tucson, AZ · On-site
You will support the design engineers to reach goals in precision, speed, area, reliability, power ... Writing layout specifications, checking dimensions, and verifying completed art work * Verifying ...
We are seeking a Package Layout Design Engineer to join our hardware team and contribute to the physical design of advanced IC packages for next-generation machine learning and data center ASICs. In ...
We are seeking a Package Layout Design Engineer to join our hardware team and contribute to the physical design of advanced IC packages for next-generation machine learning and data center ASICs. In ...
We are seeking a Package Layout Design Engineer to join our hardware team and contribute to the physical design of advanced IC packages for next-generation machine learning and data center ASICs. In ...
We are seeking a Package Layout Design Engineer to join our hardware team and contribute to the physical design of advanced IC packages for next-generation machine learning and data center ASICs. In ...
You will work as a team with layout designers and engineers, local and/or globally to complete full chip projects. Responsibilities include all aspects of IC mask design from creating full chip floor ...
You will work as a team with layout designers and engineers, local and/or globally to complete full chip projects. Responsibilities include all aspects of IC mask design from creating full chip floor ...
You will work as a team with layout designers and engineers, local and/or globally to complete full chip projects. Responsibilities include all aspects of IC mask design from creating full chip floor ...
You will work as a team with layout designers and engineers, local and/or globally to complete full chip projects. Responsibilities include all aspects of IC mask design from creating full chip floor ...
We are seeking a Package Layout Design Engineer to join our hardware team and contribute to the physical design of advanced IC packages for next-generation machine learning and data center ASICs. In ...
We are seeking a Package Layout Design Engineer to join our hardware team and contribute to the physical design of advanced IC packages for next-generation machine learning and data center ASICs. In ...
Chandler, AZ · On-site
$110 - $176/hr
Layout & Post-Layout Validation: Supervise layout design and verify post-layout design using SPICE ... MS or PhD in Electrical Engineering * 6+ years of mixed-signal and analog design experience. Design ...
New
Chandler, AZ · On-site
$110 - $176/hr
Layout & Post-Layout Validation: Supervise layout design and verify post-layout design using SPICE ... MS or PhD in Electrical Engineering * 6+ years of mixed-signal and analog design experience. Design ...
New
Chandler, AZ · On-site
$198K/yr
Layout & Post-Layout Validation: Supervise layout design and verify post-layout design using SPICE ... MS or PhD in Electrical Engineering * 6+ years of mixed-signal and analog design experience. Design ...
Chandler, AZ · On-site
$198K/yr
Layout & Post-Layout Validation: Supervise layout design and verify post-layout design using SPICE ... MS or PhD in Electrical Engineering * 6+ years of mixed-signal and analog design experience. Design ...
Layout & Post-Layout Validation: Supervise layout design and verify post-layout design using SPICE ... MS or PhD in Electrical Engineering * 6+ years of mixed-signal and analog design experience. Design ...
Layout & Post-Layout Validation: Supervise layout design and verify post-layout design using SPICE ... MS or PhD in Electrical Engineering * 6+ years of mixed-signal and analog design experience. Design ...
Proactively work with design engineers to achieve efficient circuit performance * Design analog & mixed-signal layouts * Understand device matching techniques * Understand signal conditioning ...
Proactively work with design engineers to achieve efficient circuit performance * Design analog & mixed-signal layouts * Understand device matching techniques * Understand signal conditioning ...
Tempe, AZ · On-site
... engineering teams. Key Responsibilities ... Execute package layout design and development for advanced package technologies, including power ...
Tempe, AZ · On-site
... engineering teams. Key Responsibilities ... Execute package layout design and development for advanced package technologies, including power ...
... engineering teams. Key Responsibilities ... Execute package layout design and development for advanced package technologies, including power ...
... engineering teams. Key Responsibilities ... Execute package layout design and development for advanced package technologies, including power ...
Tucson, AZ · On-site
Associate's degree in Engineering or related field of study or program certificate in Advanced IC Mask Layout Design * Minimum of 5 years of experience. Preferred qualifications: * Ability to ...
Tucson, AZ · On-site
Associate's degree in Engineering or related field of study or program certificate in Advanced IC Mask Layout Design * Minimum of 5 years of experience. Preferred qualifications: * Ability to ...
Tucson, AZ · On-site
Associate's degree in Engineering or related field of study or program certificate in Advanced IC Mask Layout Design * Minimum of 5 years of experience. Preferred qualifications: * Ability to ...
Tucson, AZ · On-site
Associate's degree in Engineering or related field of study or program certificate in Advanced IC Mask Layout Design * Minimum of 5 years of experience. Preferred qualifications: * Ability to ...
May check design layouts and detailed drawings Why TI? * Engineer your future. We empower our ... Mask Layout Design * Minimum of 5 years of experience. Preferred qualifications: * Ability to ...
May check design layouts and detailed drawings Why TI? * Engineer your future. We empower our ... Mask Layout Design * Minimum of 5 years of experience. Preferred qualifications: * Ability to ...
Phoenix, AZ · On-site
$105K - $149K/yr
As a Silicon Packaging Design Engineer, you will play a pivotal role in driving the development of ... Drive the physical layout and routing of package designs, ensuring alignment with silicon, package ...
Phoenix, AZ · On-site
$105K - $149K/yr
As a Silicon Packaging Design Engineer, you will play a pivotal role in driving the development of ... Drive the physical layout and routing of package designs, ensuring alignment with silicon, package ...
Phoenix, AZ · On-site
$105K - $149K/yr
As a Silicon Packaging Design Engineer, you will play a pivotal role in driving the development of ... Drive the physical layout and routing of package designs, ensuring alignment with silicon, package ...
Phoenix, AZ · On-site
$105K - $149K/yr
As a Silicon Packaging Design Engineer, you will play a pivotal role in driving the development of ... Drive the physical layout and routing of package designs, ensuring alignment with silicon, package ...
Associate's degree in Engineering or related field of study or program certificate in Advanced IC Mask Layout Design * Minimum of 5 years of experience. Preferred qualifications: * Ability to ...
Associate's degree in Engineering or related field of study or program certificate in Advanced IC Mask Layout Design * Minimum of 5 years of experience. Preferred qualifications: * Ability to ...
Chandler, AZ · On-site
$138K/yr
C2C / W2 Openings: 4 We are seeking experienced IC Packaging Design Engineers with strong expertise in package substrate design and advanced package layout. The ideal candidate should have hands-on ...
Chandler, AZ · On-site
$138K/yr
C2C / W2 Openings: 4 We are seeking experienced IC Packaging Design Engineers with strong expertise in package substrate design and advanced package layout. The ideal candidate should have hands-on ...
Associate's degree in Engineering or related field of study or program certificate in Advanced IC Mask Layout Design * Minimum of 5 years of experience. Preferred qualifications: * Ability to ...
Associate's degree in Engineering or related field of study or program certificate in Advanced IC Mask Layout Design * Minimum of 5 years of experience. Preferred qualifications: * Ability to ...
$41.9K - $53.8K
4% of jobs
$53.8K - $65.7K
2% of jobs
$65.7K - $77.6K
12% of jobs
$87.3K is the 25th percentile. Wages below this are outliers.
$77.6K - $89.5K
9% of jobs
$89.5K - $101.4K
11% of jobs
The median wage is $112.4K / yr.
$101.4K - $113.4K
14% of jobs
$113.4K - $125.3K
22% of jobs
$127.5K is the 75th percentile. Wages above this are outliers.
$125.3K - $137.2K
9% of jobs
$137.2K - $149.1K
9% of jobs
$149.1K - $161K
3% of jobs
$161K - $172.9K
6% of jobs
$41.9K
$112.6K
$172.9K
A Layout Design Engineer is responsible for designing and optimizing the physical layout of integrated circuits (ICs) in semiconductor chips. They work closely with circuit designers to ensure that the layout meets performance, power, and area constraints while adhering to manufacturing and design rules. Their role involves using EDA tools for placement, routing, and verification of chip layouts. They also conduct design rule checks (DRC) and layout versus schematic (LVS) verification to ensure design accuracy.
A typical day for a Layout Design Engineer involves translating schematic designs into detailed physical layouts using specialized CAD tools, collaborating closely with circuit designers to optimize for performance and manufacturability. You may spend time reviewing design rule checks (DRC), participating in team meetings to discuss project progress or resolve technical challenges, and coordinating with fabrication or test engineers to ensure successful implementation. The role requires both independent focus and frequent teamwork, offering a dynamic mix of technical and collaborative tasks. Depending on the company, you might also be involved in process improvement initiatives or mentoring junior engineers as you gain experience.
To thrive as a Layout Design Engineer, you need strong skills in electronic circuit design, physical layout principles, and a background in electrical or electronics engineering, typically supported by a relevant bachelor's degree. Proficiency with EDA tools such as Cadence, Mentor Graphics, or Synopsys, and knowledge of industry standards (e.g., IPC) are essential. Exceptional attention to detail, problem-solving, and effective teamwork and communication skills help set candidates apart. These capabilities ensure precise, manufacturable layouts and smooth collaboration with multidisciplinary teams to meet project goals and deadlines.
For Layout Design Engineer jobs in Arizona, the most frequently searched job titles are:
The top searched job categories for Layout Design Engineer jobs in Arizona are:

8.1
Based on 86 frontline employees who took The Breakroom Quiz
50th of 159 rated electronics manufacturers
Change the world. Love your job.
Texas Instruments is currently seeking a Layout Design Intern to join the team. In this role, you will have the opportunity to work in a team that creates semiconductors that go into exciting and cutting-edge technologies like smart phones, cars, satellites, robotics, and numerous other applications. You will develop and prepare multi-dimensional layouts and detailed drawings of semiconductor devices from schematics and related geometry provided by design engineering.
About the job
This position will require the creation and management of integrated circuit (IC) layouts from start to finish. Using CAD software, you will floorplan, design, implement and verify analog integrated circuits. You will support the design engineers to reach goals in precision, speed, area, reliability, power and ESD requirements. You will also work with PE/Packaging engineers to assure reliable production capability and proper data preparation for fab hand-off, documentation, and archive.
Some of your responsibilities will include, but will not be limited to:
Texas Instruments will not sponsor job applicants for visas or work authorization for this position.
Minimum requirements
Minimum 3.0 out of 4.0 GPA
Preferred qualifications:
Strong time management skills that enable on-time project delivery
Put your talent to work with us as a Layout Design Intern- change the world, love your job!
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As a global semiconductor company, we design, manufacture, test and sell analog and embedded processing chips to nearly 100,000 customers. Our products enable electronics everywhere and in things you experience every day - from health care, smart homes and connected cars to drones, smart phones and more. Our passion to create a better and more sustainable world by making electronics more affordable through semiconductors drives us to make our technology smaller, more efficient, more reliable and more affordable.
Semiconductor and electronic component manufacturing
10,000+ Employees
Dallas, TX, US
1930