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Layout Design Engineer Jobs in Arizona (NOW HIRING)

Intel

Silicon Packaging Design Engineer

Phoenix, AZ

$135K/yr

Key Responsibilities: - Design and implement physical layout and routing of silicon interposers and ... Engineering, or a STEM related field Experience listed above should be in the following:

onsemi

Design Engineer

Scottsdale, AZ · On-site

As a Principal Design Engineer located in Scottsdale, Arizona, you will have the opportunity to ... Design, layout and verification of protection and small signal products to meet the specifications ...

ISAT Total Support

Design Engineer

Phoenix, AZ · On-site

... layout on projects for all trades, configurations, and for the CBC, IBC, and UFC. * Product ... of engineering or design experience preferred (open to entry-level with strong aptitude)

Cirrus Logic

Analog Design Engineer

Chandler, AZ · On-site

$198K/yr

Lead or support layout implementation, post-layout simulation, and performance optimization ... Engineering, or related field: * Bachelor's with 2+ years of relevant IC design experience.

Renesas Electronics

Device Design Engineer

Tempe, AZ · On-site

We are seeking a Device Design Engineer to develop cutting edge switching power MOSFETs for 12V to ... Develop intelligent process and layout experiments for engineering lots to minimize development ...

Intel Corporation

Senior Analog Design Engineer

Phoenix, AZ · On-site

$200K/yr

The position also involves providing guidance to layout engineers and mentoring junior analog ... Core analog design principles, including noise, linearity, matching, and stability. * Hands-on ...

Viasat, Inc.

MMIC Design Engineer

Tempe, AZ · On-site

$149K - $224K/yr

What you'll do We are seeking a highly motivated MMIC Design Engineer to design, develop, and ... MMIC Layout and Verification * Electromagnetic Simulation * Device Modeling and Characterization

New

Viasat, Inc.

MMIC Design Engineer

Tempe, AZ

$149K - $224K/yr

MMIC Layout and Verification * Electromagnetic Simulation * Device Modeling and Characterization ... Engineering, RF Engineering, or a related field. * 3+ years of experience in RF/MMIC design ...

New

Intel

Analog Engineer

Phoenix, AZ

$200K/yr

As an Analog Circuit Design Engineer, you will be at the forefront of designing and developing ... Collaborate with architecture and layout teams to design circuits that maximize functionality ...

Intel

Physical Design Engineer

Phoenix, AZ · On-site

$135K - $139K/yr

... layout verification, electrical rule checking, and structural design checking. * Analyze results ... Bachelor's degree in Electrical Engineering, Computer Engineering, or a related specialized field ...

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All JobsLayout Design Engineer JobsLayout Design Engineer Jobs in Arizona

Layout Design Engineer information

See Arizona salary details

$41.9K

$112.6K

$172.9K

How much do layout design engineer jobs pay per year?

As of Jul 21, 2026, the average yearly pay for layout design engineer in Arizona is $112,617.00, according to ZipRecruiter salary data. Most workers in this role earn between $83,900.00 and $134,200.00 per year, depending on experience, location, and employer.

What does a layout design engineer do?

A layout design engineer develops and optimizes integrated circuit layouts to ensure proper functionality, performance, and manufacturability. They use electronic design automation (EDA) tools and work closely with circuit designers to translate schematics into physical layouts, adhering to design rules and specifications. This role often requires knowledge of semiconductor fabrication processes and attention to detail to minimize errors and improve device performance.

What engineers make $300,000 a year?

Senior engineers in specialized fields such as petroleum, aerospace, or software engineering can earn $300,000 or more annually, especially with extensive experience, advanced skills, and leadership roles. High-level positions often require advanced degrees, certifications, and a strong track record of project management or technical expertise.

What engineers make 200,000 a year?

Senior engineers in fields such as software, petroleum, aerospace, and electrical engineering often earn $200,000 or more annually, especially with extensive experience, advanced skills, and relevant certifications. High-level managerial or specialized roles in these disciplines tend to have compensation at or above this level.

What is a Layout Design Engineer job?

A Layout Design Engineer is responsible for designing and optimizing the physical layout of integrated circuits (ICs) in semiconductor chips. They work closely with circuit designers to ensure that the layout meets performance, power, and area constraints while adhering to manufacturing and design rules. Their role involves using EDA tools for placement, routing, and verification of chip layouts. They also conduct design rule checks (DRC) and layout versus schematic (LVS) verification to ensure design accuracy.

What engineer makes $500,000 a year?

A senior or specialized engineer, such as a petroleum engineer, aerospace engineer, or software engineer in high-paying industries, can earn $500,000 or more annually. These roles often require advanced skills, extensive experience, and sometimes leadership or executive responsibilities.

What are the key skills and qualifications needed to thrive in the Layout Design Engineer position, and why are they important?

To thrive as a Layout Design Engineer, you need strong skills in electronic circuit design, physical layout principles, and a background in electrical or electronics engineering, typically supported by a relevant bachelor's degree. Proficiency with EDA tools such as Cadence, Mentor Graphics, or Synopsys, and knowledge of industry standards (e.g., IPC) are essential. Exceptional attention to detail, problem-solving, and effective teamwork and communication skills help set candidates apart. These capabilities ensure precise, manufacturable layouts and smooth collaboration with multidisciplinary teams to meet project goals and deadlines.

What does a typical day look like for a Layout Design Engineer?

A typical day for a Layout Design Engineer involves translating schematic designs into detailed physical layouts using specialized CAD tools, collaborating closely with circuit designers to optimize for performance and manufacturability. You may spend time reviewing design rule checks (DRC), participating in team meetings to discuss project progress or resolve technical challenges, and coordinating with fabrication or test engineers to ensure successful implementation. The role requires both independent focus and frequent teamwork, offering a dynamic mix of technical and collaborative tasks. Depending on the company, you might also be involved in process improvement initiatives or mentoring junior engineers as you gain experience.

What are popular job titles related to Layout Design Engineer jobs in Arizona? For Layout Design Engineer jobs in Arizona, the most frequently searched job titles are:
What job categories do people searching Layout Design Engineer jobs in Arizona look for? The top searched job categories for Layout Design Engineer jobs in Arizona are:
Layout Design Engineer jobs near you
Infographic showing various Layout Design Engineer job openings in Arizona as of July 2026, with employment types broken down into 89% Full Time, 8% Part Time, and 3% Contract. Highlights an 87% Physical, 3% Hybrid, and 10% Remote job distribution, with an average salary of $112,617 per year, or $54.1 per hour.
Silicon Packaging Design Engineer

Silicon Packaging Design Engineer

Intel

Phoenix, AZ

$135K/yr

Full-time

Medical, Retirement, PTO

Re-posted 25 days ago

Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

11th of 143 rated electronics manufacturers

Job description

Job Details:Job Description: 

Intel seeks a motivated and innovative Silicon Packaging Design Engineer to join our team, driving the end-to-end development of silicon interposer and bridge designs that define the future of computing and connectivity. As a key contributor to Intel's cutting-edge technology, you will play a pivotal role in bridging silicon and hardware design, optimizing package performance, and delivering high-impact solutions that meet performance, cost, and manufacturability goals. Your expertise will directly contribute to Intel's mission to create world-changing technology that improves lives and connects communities worldwide.
Key Responsibilities:


- Design and implement physical layout and routing of silicon interposers and embedded bridges.
- Perform substrate fit and routing studies to evaluate design tradeoffs in performance, cost, and manufacturability.
- Collaborate closely with silicon, technology development and hardware teams to optimize system-level design, including silicon-package-board integration and pinout.
- Propose design updates changes for rules and conduct internal and external reviews to ensure design feasibility.
- Analyze design data and resolve design rule checks (DRCs) to achieve optimized and manufacturable package designs.
- Utilize industry-leading electronic design automation (EDA) tools, including Virtuoso, Innovus, FusionCompiler, ICvalidator, and Calibre, to create robust package layouts.
- Document processes and design specifications in the product lifecycle management system to ensure traceability and efficient collaboration.
- Conduct reviews with partner teams to close milestone requirements

Qualifications:

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:


- Bachelor's degree with 3+ years of experience OR Master's degree with 2+ years of experience in Electrical Engineering, Computer Engineering, or a STEM related field

Experience listed above should be in the following:

  • Proficiency in custom layout and Auto-place-and-route EDA tools including Virtuoso, Innovus, FusionCompiler, ICvalidator, and/or Calibre.
  • Experience with silicon physical layout design and development, routing interconnects, and/or review tools.

Additionally, the candidate should have at least one of the following:

  • 1+ year of experience with Analog/Mixed Signal fundamentals for signal integrity assessments and I/O fundamentals.
  • 1+ year of experience of Power Distribution and power integrity assessments.
  • 1+ year of experience of reliability requirements for interconnects.


Preferred Qualifications:

  • Familiarity with industry-leading silicon physical design methodologies and workflows.
  • Ability to effectively collaborate across multi-disciplinary teams and communicate technical concepts clearly.
  • A passion for innovation, problem-solving, and continuous improvement in a fast-paced environment.
  • Prior experience in optimizing silicon performance and conducting tradeoff studies for advanced packaging designs.

Join Intel and become an integral part of shaping tomorrow's technology today. Apply now to seize the opportunity to innovate, lead, and create meaningful impact on a global scale

Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Arizona, PhoenixAdditional Locations:US, Oregon, HillsboroBusiness group:Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $105,650.00-200,340.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968

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