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Chip Design Engineer Jobs in Arizona (NOW HIRING)

Cirrus Logic

Staff Analog Design Engineer

Chandler, AZ · On-site

$198K/yr

Simulate and verify circuit and chip-level performance using Spectre and mixed-signal methodologies ... Engineering, or related field: * Bachelor's with 7+ years of relevant IC design experience.

Cirrus Logic

Senior Analog Design Engineer

Chandler, AZ · On-site

$198K/yr

Simulate and verify circuit and chip-level performance using Spectre and mixed-signal methodologies ... Engineering, or related field: * Bachelor's with 5+ years of relevant IC design experience.

Cirrus Logic

Staff Digital Design Engineer

Chandler, AZ · On-site

$133K/yr

In this role, you will contribute to the design of system-on-chip (SoC) devices, digital signal ... Degree in Electrical Engineering, Computer Engineering, or a related technical field. * Bachelor ...

Cirrus Logic

Senior Digital Design Engineer

Chandler, AZ · On-site

$133K/yr

In this role, you will contribute to the design of system-on-chip (SoC) devices, digital signal ... Degree in Electrical Engineering, Computer Engineering, or a related technical field. * Bachelor ...

Raytheon

RF Design Engineer II

Tucson, AZ

Testing or designing RF hybrid (chip and wire) technologies * High speed data converter test ... High power RF design or test experience * Scripting experience (Matlab or Python) * Some front line ...

Raytheon

RF Design Engineer II

Tucson, AZ

Testing or designing RF hybrid (chip and wire) technologies * High speed data converter test ... High power RF design or test experience * Scripting experience (Matlab or Python) * Some front line ...

Raytheon

Senior RF Design Engineer

Tucson, AZ

Testing or designing RF hybrid (chip and wire) technologies * High speed data converter test ... High power RF design or test experience * Scripting experience (Matlab or Python) * Some front line ...

Raytheon

RF Design Engineer II

Phoenix, AZ

Testing or designing RF hybrid (chip and wire) technologies * High speed data converter test ... High power RF design or test experience * Scripting experience (Matlab or Python) * Some front line ...

Raytheon

Senior RF Design Engineer

Phoenix, AZ

Testing or designing RF hybrid (chip and wire) technologies * High speed data converter test ... High power RF design or test experience * Scripting experience (Matlab or Python) * Some front line ...

Raytheon

Senior RF Design Engineer

Tucson, AZ

Testing or designing RF hybrid (chip and wire) technologies * High speed data converter test ... High power RF design or test experience * Scripting experience (Matlab or Python) * Some front line ...

Raytheon Technologies

RF Design Engineer II

Tucson, AZ · On-site

Testing or designing RF hybrid (chip and wire) technologies * High speed data converter test ... High power RF design or test experience * Scripting experience (Matlab or Python) * Some front line ...

Intel

Collateral Design and DFM Engineer

Phoenix, AZ

$128K - $153K/yr

About MDCE Manufacturing Development and Customer Engineering (MDCE) is Intel's newest organization ... Hands-on experience in advanced node test chip design and scribe line optimization for 3nm-16nm ...

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Chip Design Engineer information

See Arizona salary details

$37.7K

$82.1K

$147.7K

How much do chip design engineer jobs pay per year?

As of Jul 6, 2026, the average yearly pay for chip design engineer in Arizona is $82,145.00, according to ZipRecruiter salary data. Most workers in this role earn between $63,400.00 and $91,800.00 per year, depending on experience, location, and employer.

Are chip designers in demand?

Chip design engineers are in high demand due to the growth of semiconductor technology, consumer electronics, and data centers. Skills in VHDL, Verilog, and CAD tools are valuable, and the industry offers competitive salaries with opportunities for advancement.

What is the salary of microchip design engineer?

The salary of a chip design engineer typically ranges from $80,000 to $150,000 annually, depending on experience, location, and company size. Entry-level positions may start lower, while experienced engineers with specialized skills in VHDL, Verilog, or FPGA design can earn higher salaries.

What engineer makes $500,000 a year?

A senior chip design engineer with extensive experience, specialized skills in advanced semiconductor technologies, and leadership responsibilities can earn $500,000 or more annually. Such roles often require advanced degrees, certifications, and a track record of successful project delivery in high-demand industries like semiconductor manufacturing or technology firms.

What are some typical projects or daily tasks for a Chip Design Engineer?

As a Chip Design Engineer, your daily tasks often include designing and simulating integrated circuits, reviewing schematics, writing and verifying code in hardware description languages, and collaborating closely with layout engineers and verification teams. You may also participate in design reviews, troubleshoot potential issues, and optimize chip performance to meet specific requirements. Working with cross-functional teams, including software engineers and product managers, is common to ensure the chip integrates seamlessly with end products. This role provides opportunities to see your designs progress from concept to final manufacturing, offering valuable hands-on experience at each stage of development.

What are the key skills and qualifications needed to thrive in the Chip Design Engineer position, and why are they important?

To thrive as a Chip Design Engineer, you need a solid background in electrical engineering, digital and analog circuit design, and experience with VLSI principles, usually backed by a relevant degree. Proficiency with industry-standard tools like Cadence, Synopsys, and experience in HDL languages (such as Verilog or VHDL) is highly valued, as are certifications like Certified IC Designer. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help set you apart. These competencies are critical for developing reliable, high-performance chips in a collaborative and deadline-driven environment.

What is a Chip Design Engineer job?

A Chip Design Engineer is responsible for designing and developing integrated circuits (ICs) used in electronic devices. They work with hardware description languages (HDLs) like Verilog or VHDL to create digital or analog circuit designs. Their role includes logic design, verification, simulation, and testing to ensure performance and power efficiency. They collaborate with teams across hardware, software, and manufacturing to bring chips from concept to production. Chip Design Engineers are essential in industries like consumer electronics, automotive, and telecommunications.

How much do chip design engineers make?

Chip design engineers typically earn a median annual salary ranging from $80,000 to $130,000, depending on experience, location, and industry. Senior engineers with specialized skills in VLSI design or FPGA development can earn higher salaries, often exceeding $150,000 annually.
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Chip Design Engineer jobs near you
Infographic showing various Chip Design Engineer job openings in Arizona as of July 2026, with employment types broken down into 5% Internship, 74% Full Time, 7% Part Time, 5% Temporary, and 9% Contract. Highlights an 86% In-person, and 14% Remote job distribution, with an average salary of $82,145 per year, or $39.5 per hour.
Physical Design Engineer- Foundry Services

Physical Design Engineer- Foundry Services

Intel

Phoenix, AZ

$122K - $232K/yr

Full-time

Medical, Retirement, PTO

Posted 3 days ago

Intel rating

8.7

Company rating: 8.7 out of 10

Based on 145 frontline employees who took The Breakroom Quiz

11th of 141 rated electronics manufacturers

Job description

Job Details:Job Description: 

The Role and Impact:
This job requires a US Citizenship. As a Physical Design Engineer, you will play a pivotal role in bringing Intel's innovative products to life by transforming design concepts into manufacturable solutions. This role is integral to the development of Si Interposers and Bridge designs, ensuring they meet high-performance, power efficiency, and area optimization goals. Your expertise will directly impact Intel's ability to deliver cutting-edge technology to a global market while advancing industry-leading methodologies and design flows.
Key Responsibilities:

  • Perform physical design implementation of Si Interposer designs, progressing from Floor planning on to create a database ready for manufacturing.

  • Conduct all aspects of the physical design flow, including place and route, floor planning, Routing and Physical design verification.

  • Execute Signal Integrity analysis, power analysis, and reliability analysis to ensure design integrity.

  • Perform verification and signoff, including formal equivalence verification, reliability verification, layout verification, electrical rule checking, and structural design checking.

  • Analyze results of verification efforts, recommending and implementing fixes for violations.

  • Optimize designs for product-level parameters such as signal integrity, power, reliability, density and area.

  • Utilize industry-standard EDA tools for physical design processes, including placing, routing, and analysis.

  • Design and manage multiple power domains, static and dynamic power integrity, and report generation.

  • Participate in the development and automation of physical design methodologies and flows to improve efficiency and scalability.

  • Collaborate with cross-functional teams to enable seamless integration of physical design across multiple projects.

  • Ability to drive enhancements in physical design methodologies and automation.

  • Excellent communication and collaboration skills to work effectively within cross-functional teams.

  • Passion for solving complex design challenges and contributing to innovative solutions.

#cj

Qualifications:

Minimum Qualifications:

  • US Citizenship

  • Ability to obtain and maintain a US Government TS/SCI Security Clearance with Polygraph

  • Bachelor's degree in Electrical Engineering, Computer Engineering, with 4+ years of experience or 3+ years of experience with a Master's degree a related field.

Experience in the following:

  • Experience in EDA tools for custom physical design and Auto-place-n-route, including virtuoso, Innovus or ICC/ICC2/fusion, icvalidator or calibre, UPF, RTL, SPICE, OASIS, and ODB++.

  • Experience with physical Design including at least 2 of the following: floor planning, route optimization/shielding and Signal Integrity analysis, power delivery design/analysis for multi-power domains and reliability verification.

  • Full chip physical design completion and verification for tapein/tapeout

Preferred Qualifications:

  • Experience optimizing designs for signal integrity and power integrity

  • Experience in chip-level design and tape-in assembly for advanced technology nodes.

Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Arizona, PhoenixAdditional Locations:Business group:Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

What Intel employees say

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Hours and flexibility

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About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968

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